63 #ifndef TIVX_SOC_AM62A_H_ 64 #define TIVX_SOC_AM62A_H_ 76 #include <TI/j7_nodes.h> 93 #define TIVX_TARGET_A72_0 "A72-0" 98 #define TIVX_TARGET_A72_1 "A72-1" 103 #define TIVX_TARGET_A72_2 "A72-2" 108 #define TIVX_TARGET_A72_3 "A72-3" 122 #define TIVX_TARGET_DSP_C7_1 "DSP_C7-1" 129 #define TIVX_TARGET_DSP_C7_1_PRI_1 TIVX_TARGET_DSP_C7_1 135 #define TIVX_TARGET_DSP_C7_1_PRI_2 "DSP_C7-1_PRI_2" 141 #define TIVX_TARGET_DSP_C7_1_PRI_3 "DSP_C7-1_PRI_3" 147 #define TIVX_TARGET_DSP_C7_1_PRI_4 "DSP_C7-1_PRI_4" 153 #define TIVX_TARGET_DSP_C7_1_PRI_5 "DSP_C7-1_PRI_5" 159 #define TIVX_TARGET_DSP_C7_1_PRI_6 "DSP_C7-1_PRI_6" 165 #define TIVX_TARGET_DSP_C7_1_PRI_7 "DSP_C7-1_PRI_7" 171 #define TIVX_TARGET_DSP_C7_1_PRI_8 "DSP_C7-1_PRI_8" 179 #define TIVX_TARGET_DSP1 TIVX_TARGET_DSP_C7_1 187 #define TIVX_TARGET_MCU1_0 "MCU1-0" 193 #define TIVX_TARGET_DSP2 TIVX_TARGET_DSP1 201 #define TIVX_TARGET_IPU1_0 "MCU1-0" 206 #define TIVX_TARGET_VPAC_LDC1 "VPAC_LDC1" 211 #define TIVX_TARGET_VPAC_MSC1 "VPAC_MSC1" 216 #define TIVX_TARGET_VPAC_MSC2 "VPAC_MSC2" 221 #define TIVX_TARGET_VPAC_VISS1 "VPAC_VISS1" 237 typedef enum _tivx_cpu_id_e {
Interface to TI extension APIs.
The LDC kernels in this kernel extension.
The VISS kernels in this kernel extension.
The MSC kernels in this kernel extension.
The list of supported kernels in this kernel extension.
tivx_cpu_id_e
CPU ID for supported CPUs.