PDK API Guide for J721E
Data Structures | Macros | Typedefs | Functions
vhwa_common.h File Reference
VHWA Driver » Common

Introduction

File containning defination for common configuration/API used across all VHWA modules.

Go to the source code of this file.

Data Structures

struct  Vhwa_LutConfig
 Companding Lut configuration Structure LUT based companding is used at many places in RAWFE This structure is common and used for configuring these Luts. More...
 
struct  Vhwa_FocoPrms
 These are advanced parameters adn should not be modified in most cases. Used by DMPAC module. More...
 
struct  Vhwa_HtsLimiter
 Bandwith limiter configuration for HTS. This is used to slowed down the HTS by introducing clock cycles between internal start signals. These are advanced parameters and should not be modified in most cases. More...
 

Macros

#define VHWA_IOCTL_COMMON_IOCTL_BASE   (FVID2_VHWA_DRV_IOCTL_BASE)
 
#define VHWA_IOCTL_COMMON_IOCTL_NUM   (0x0000000AU)
 
#define VHWA_IOCTL_COMMON_IOCTL_END
 
#define VHWA_IOCTL_NF_IOCTL_BASE   (VHWA_IOCTL_COMMON_IOCTL_END)
 
#define VHWA_IOCTL_NF_IOCTL_NUM   (0x0000000AU)
 
#define VHWA_IOCTL_NF_IOCTL_END
 
#define VHWA_IOCTL_LDC_IOCTL_BASE   (VHWA_IOCTL_NF_IOCTL_END)
 
#define VHWA_IOCTL_LDC_IOCTL_NUM   (0x0000000AU)
 
#define VHWA_IOCTL_LDC_IOCTL_END
 
#define VHWA_IOCTL_MSC_IOCTL_BASE   (VHWA_IOCTL_LDC_IOCTL_END)
 
#define VHWA_IOCTL_MSC_IOCTL_NUM   (0x0000000AU)
 
#define VHWA_IOCTL_MSC_IOCTL_END
 
#define VHWA_IOCTL_RFE_IOCTL_BASE   (VHWA_IOCTL_MSC_IOCTL_END)
 
#define VHWA_IOCTL_RFE_IOCTL_NUM   (0x0000000AU)
 
#define VHWA_IOCTL_RFE_IOCTL_END
 
#define VHWA_IOCTL_FCP_IOCTL_BASE   (VHWA_IOCTL_RFE_IOCTL_END)
 
#define VHWA_IOCTL_FCP_IOCTL_NUM   (0x0000000AU)
 
#define VHWA_IOCTL_FCP_IOCTL_END
 
#define VHWA_IOCTL_NSF4_IOCTL_BASE   (VHWA_IOCTL_FCP_IOCTL_END)
 
#define VHWA_IOCTL_NSF4_IOCTL_NUM   (0x0000000AU)
 
#define VHWA_IOCTL_NSF4_IOCTL_END
 
#define VHWA_IOCTL_GLBCE_IOCTL_BASE   (VHWA_IOCTL_NSF4_IOCTL_END)
 
#define VHWA_IOCTL_GLBCE_IOCTL_NUM   (0x0000000AU)
 
#define VHWA_IOCTL_GLBCE_IOCTL_END
 
#define VHWA_IOCTL_H3A_IOCTL_BASE   (VHWA_IOCTL_GLBCE_IOCTL_END)
 
#define VHWA_IOCTL_H3A_IOCTL_NUM   (0x0000000AU)
 
#define VHWA_IOCTL_H3A_IOCTL_END
 
#define VHWA_IOCTL_CAC_IOCTL_BASE   (VHWA_IOCTL_H3A_IOCTL_END)
 
#define VHWA_IOCTL_CAC_IOCTL_NUM   (0x0000000AU)
 
#define VHWA_IOCTL_CAC_IOCTL_END
 
#define VHWA_IOCTL_DOF_IOCTL_BASE   (VHWA_IOCTL_CAC_IOCTL_END)
 
#define VHWA_IOCTL_DOF_IOCTL_NUM   (0x0000000AU)
 
#define VHWA_IOCTL_DOF_IOCTL_END
 
#define VHWA_IOCTL_SDE_IOCTL_BASE   (VHWA_IOCTL_DOF_IOCTL_BASE)
 
#define VHWA_IOCTL_SDE_IOCTL_NUM   (0x0000000AU)
 
#define VHWA_IOCTL_SDE_IOCTL_END
 
#define VHWA_IOCTL_M2M_MSC_IOCTL_BASE   (VHWA_IOCTL_DOF_IOCTL_END)
 
#define VHWA_IOCTL_M2M_MSC_IOCTL_NUM   (0x00000008U)
 
#define VHWA_IOCTL_M2M_MSC_IOCTL_END
 
#define VHWA_IOCTL_M2M_LDC_IOCTL_BASE   (VHWA_IOCTL_M2M_MSC_IOCTL_END)
 
#define VHWA_IOCTL_M2M_LDC_IOCTL_NUM   (0x00000008U)
 
#define VHWA_IOCTL_M2M_LDC_IOCTL_END
 
#define VHWA_IOCTL_M2M_VISS_IOCTL_BASE   (VHWA_IOCTL_M2M_LDC_IOCTL_END)
 
#define VHWA_IOCTL_M2M_VISS_IOCTL_NUM   (0x0000000AU)
 
#define VHWA_IOCTL_M2M_VISS_IOCTL_END
 
#define VHWA_IOCTL_M2M_NF_IOCTL_BASE   (VHWA_IOCTL_M2M_VISS_IOCTL_END)
 
#define VHWA_IOCTL_M2M_NF_IOCTL_NUM   (0x00000008U)
 
#define VHWA_IOCTL_M2M_NF_IOCTL_END
 
#define VHWA_IOCTL_M2M_DOF_IOCTL_BASE   (VHWA_IOCTL_M2M_NF_IOCTL_END)
 
#define VHWA_IOCTL_M2M_DOF_IOCTL_NUM   (0x00000010U)
 
#define VHWA_IOCTL_M2M_DOF_IOCTL_END
 
#define VHWA_IOCTL_M2M_SDE_IOCTL_BASE   (VHWA_IOCTL_M2M_DOF_IOCTL_END)
 
#define VHWA_IOCTL_M2M_SDE_IOCTL_NUM   (0x00000008U)
 
#define VHWA_IOCTL_M2M_SDE_IOCTL_END
 
#define VHWA_IOCTL_FC_IOCTL_BASE   (VHWA_IOCTL_M2M_SDE_IOCTL_END)
 
#define VHWA_IOCTL_FC_IOCTL_NUM   (0x00000010U)
 
#define VHWA_IOCTL_FC_IOCTL_END
 
#define VHWA_IOCTL_FC_VISS_IOCTL_BASE   (VHWA_IOCTL_FC_IOCTL_END)
 
#define VHWA_IOCTL_FC_VISS_IOCTL_NUM   (0x0000004U)
 
#define VHWA_IOCTL_FC_VISS_IOCTL_END
 
#define VHWA_IOCTL_FC_MSC_IOCTL_BASE   (VHWA_IOCTL_FC_VISS_IOCTL_END)
 
#define VHWA_IOCTL_FC_MSC_IOCTL_NUM   (0x0000004U)
 
#define VHWA_IOCTL_FC_MSC_IOCTL_END
 
VHWA FVID2 Driver IDs

FVID2 Driver IDs for VHWA Drivers

#define FVID2_VHWA_M2M_LDC_DRV_ID   (FVID2_VHWA_DRV_BASE + 0x00U)
 FVID2 Driver Id for LDC Memory to Memory. More...
 
#define FVID2_VHWA_M2M_NF_DRV_ID   (FVID2_VHWA_M2M_LDC_DRV_ID + 0x01U)
 FVID2 Driver Id for NF Memory to Memory. More...
 
#define FVID2_VHWA_M2M_MSC_DRV_ID   (FVID2_VHWA_M2M_NF_DRV_ID + 0x01U)
 FVID2 Driver Id for MSC Memory to Memory. More...
 
#define FVID2_VHWA_M2M_VISS_DRV_ID   (FVID2_VHWA_M2M_MSC_DRV_ID + 0x01U)
 FVID2 Driver Id for VISS Memory to Memory. More...
 
#define FVID2_VHWA_M2M_DOF_DRV_ID   (FVID2_VHWA_M2M_VISS_DRV_ID + 0x01U)
 FVID2 Driver Id for DOF Memory to Memory. More...
 
#define FVID2_VHWA_M2M_SDE_DRV_ID   (FVID2_VHWA_M2M_DOF_DRV_ID + 0x01U)
 FVID2 Driver Id for SDE Memory to Memory. More...
 
#define FVID2_VHWA_M2M_VISS_OTF_DRV_ID   (FVID2_VHWA_M2M_SDE_DRV_ID + 0x01U)
 FVID2 Driver Id for VISS-OTF Memory to Memory. More...
 
#define FVID2_VHWA_M2M_FC_DRV_ID   (FVID2_VHWA_M2M_SDE_DRV_ID + 0x01U)
 FVID2 Driver Id for Flex-connect Memory to Memory. More...
 
VHWA Output IRQ Numbers

VHWA VPAC module outputs 6 IRQs and DMPAC outputs 2 IRQs. These Irq numbers should be passed as init parameters along with the core irq number to enable them in INTD module.

#define VHWA_M2M_IRQ_NUM_0   (0u)
 
#define VHWA_M2M_IRQ_NUM_1   (1u)
 
#define VHWA_M2M_IRQ_NUM_2   (2u)
 
#define VHWA_M2M_IRQ_NUM_3   (3u)
 
#define VHWA_M2M_IRQ_NUM_4   (4u)
 
#define VHWA_M2M_IRQ_NUM_5   (5u)
 
#define VHWA_M2M_DMPAC_IRQ_NUM_0   (0u)
 
#define VHWA_M2M_DMPAC_IRQ_NUM_1   (1u)
 

Typedefs

typedef uint64_t(* Vhwa_GetTimeStamp) (void)
 

Functions

uint32_t Vhwa_calcHorzSizeInBytes (uint32_t width, uint32_t ccsf)
 Function to width of image in Bytes. More...