Introduction

Files
file	csl_dssCommon.h
	DSS Common CSL FL interface file.

Data Structures
struct	CSL_DssGlobalMFlagCfg
	DSS Global MFLAG Config parameters. More...

struct	CSL_DssCbaCfg
	DSS CBA Config parameters. More...

Functions
void	CSL_dssModuleReset (CSL_dss_commRegs *commRegs)
	Reset the DSS Module. Application should make sure Video Ports are disabled before calling this API. More...

void	CSL_dssEnableDispcIntr (CSL_dss_commRegs *commRegs, uint32_t intrMask, uint32_t intrEnable)
	Enable/disable the interrupts at DSS top level. More...

void	CSL_dssEnablePipeIntr (CSL_dss_commRegs *commRegs, uint32_t vidPipeId, uint32_t intrMask, uint32_t intrEnable)
	Enable/disable the interrupts for Video Pipe. More...

void	CSL_dssEnableVpIntr (CSL_dss_commRegs *commRegs, uint32_t portId, uint32_t intrMask, uint32_t intrEnable)
	Enable/disable the interrupts for Video Port. More...

void	CSL_dssEnableWbIntr (CSL_dss_commRegs *commRegs, uint32_t wbPipeId, uint32_t intrMask, uint32_t intrEnable)
	Enable/disable the interrupts for Write Back Pipe. More...

void	CSL_dssClearDispcIntr (CSL_dss_commRegs *commRegs, uint32_t intrMask)
	Clear the interrupts at DSS top level. More...

void	CSL_dssClearPipeIntr (CSL_dss_commRegs *commRegs, uint32_t vidPipeId, uint32_t intrMask)
	Clear the interrupts for Video Pipe. More...

void	CSL_dssClearVpIntr (CSL_dss_commRegs *commRegs, uint32_t portId, uint32_t intrMask)
	Clear the interrupts for Video Port. More...

void	CSL_dssClearWbIntr (CSL_dss_commRegs *commRegs, uint32_t wbPipeId, uint32_t intrMask)
	Clear the interrupts for Write Back Pipe. More...

uint32_t	CSL_dssGetDispcIntrStatus (const CSL_dss_commRegs *commRegs)
	Get the top level interrupt status of DSS. More...

uint32_t	CSL_dssGetPipeIntrStatus (const CSL_dss_commRegs *commRegs, uint32_t vidPipeId)
	Get the interrupt status of Video Pipe. More...

uint32_t	CSL_dssGetVpIntrStatus (const CSL_dss_commRegs *commRegs, uint32_t portId)
	Get the interrupt status of Video Port. More...

uint32_t	CSL_dssGetWbIntrStatus (const CSL_dss_commRegs *commRegs, uint32_t wbPipeId)
	Get the interrupt status of Write Back Pipe. More...

void	CSL_dssSetGlobalMflagConfig (CSL_dss_commRegs commRegs, const CSL_DssGlobalMFlagCfg mflagCfg)
	Set the global MFLAG configuration. More...

void	CSL_dssGlobalVpEnable (CSL_dss_commRegs *commRegs, uint32_t portIdMask, uint32_t enable)
	Enable the global VP enable bit. This allows setting multiple outputs synchronously. The 'OR' result of different masks can be used as input parameter. More...

void	CSL_dssGlobalVpGoBitEnable (CSL_dss_commRegs *commRegs, uint32_t portIdMask)
	Enable the global VP go bit. This allows setting multiple outputs synchronously. The 'OR' result of different masks can be used as input parameter. More...

void	CSL_dssSetCbaConfig (CSL_dss_commRegs commRegs, const CSL_DssCbaCfg cbaCfg)
	Set the CBA configuration. More...

int32_t	CSL_dssConnectVpToDpi (CSL_dss_commRegs *commRegs, uint32_t portId, uint32_t dpiId)
	This API can be used to select the VP connection to DPI. More...

void	CSL_dssSetWbInputCh (CSL_dss_commRegs *commRegs, uint32_t inputCh)
	This API is used to set the write back input channel. More...

static void	CSL_dssGlobalMFlagCfgInit (CSL_DssGlobalMFlagCfg *mflagCfg)
	CSL_DssGlobalMFlagCfg structure init function. More...

static void	CSL_dssCbaCfgInit (CSL_DssCbaCfg *cbaCfg)
	CSL_DssCbaCfg structure init function. More...

Typedefs
typedef CSL_dss_common_mRegs	CSL_dss_commRegs
	DSS Common Registers. More...

DISPC Interrupt Mask

#define	CSL_DSS_DISPC_INTR_WB_MASK ((uint32_t) 0x4000U)
	Write Back Pipeline Interrupt. More...

#define	CSL_DSS_DISPC_INTR_VIDL2_MASK ((uint32_t) 0x80U)
	Video Lite Pipeline 2 Interrupt. More...

#define	CSL_DSS_DISPC_INTR_VID2_MASK ((uint32_t) 0x40U)
	Video PipeLine 2 Interrupt. More...

#define	CSL_DSS_DISPC_INTR_VIDL1_MASK ((uint32_t) 0x20U)
	Video Lite Pipeline 1 Interrupt. More...

#define	CSL_DSS_DISPC_INTR_VID1_MASK ((uint32_t) 0x10U)
	Video PipeLine 1 Interrupt. More...

#define	CSL_DSS_DISPC_INTR_VP4_MASK ((uint32_t) 0x08U)
	Video Port 4 Interrupt. More...

#define	CSL_DSS_DISPC_INTR_VP3_MASK ((uint32_t) 0x04U)
	Video Port 3 Interrupt. More...

#define	CSL_DSS_DISPC_INTR_VP2_MASK ((uint32_t) 0x02U)
	Video Port 2 Interrupt. More...

#define	CSL_DSS_DISPC_INTR_VP1_MASK ((uint32_t) 0x01U)
	Video Port 1 Interrupt. More...

Video Pipeline Interrupt Mask

#define	CSL_DSS_VID_PIPE_INTR_FBDC_ILLEGALTILE_MASK ((uint32_t) CSL_DSS_COMMON_M_VID_IRQENABLE_0_FBDC_ILLEGALTILEREQ_EN_MASK)
	Interrupt due to FBDC illegal tile request. More...

#define	CSL_DSS_VID_PIPE_INTR_FBDC_CORRUPTTILE_MASK ((uint32_t) CSL_DSS_COMMON_M_VID_IRQENABLE_0_FBDC_CORRUPTTILE_EN_MASK)
	Interrupt due to FBDC corrupted tile detection. More...

#define	CSL_DSS_VID_PIPE_INTR_SAFETYVIOLATION_MASK ((uint32_t) CSL_DSS_COMMON_M_VID_IRQENABLE_0_SAFETYREGION_EN_MASK)
	Interrupt due to safety violation. More...

#define	CSL_DSS_VID_PIPE_INTR_WINDOWEND_MASK ((uint32_t) CSL_DSS_COMMON_M_VID_IRQENABLE_0_VIDENDWINDOW_EN_MASK)
	Interrupt due to video window end. More...

#define	CSL_DSS_VID_PIPE_INTR_BUFUNDERFLOW_MASK ((uint32_t) CSL_DSS_COMMON_M_VID_IRQENABLE_0_VIDBUFFERUNDERFLOW_EN_MASK)
	Interrupt due to buffer underflow. More...

#define	CSL_DSS_VID_PIPE_INTR_ALL_MASK
	All Video Pipe interrupts. More...

Video Port Interrupt Mask

#define	CSL_DSS_VP_INTR_FRAMEDONE_MASK ((uint32_t) CSL_DSS_COMMON_M_VP_IRQENABLE_0_VPFRAMEDONE_EN_MASK)
	Frame Done for Video Port. More...

#define	CSL_DSS_VP_INTR_VSYNC_MASK ((uint32_t) CSL_DSS_COMMON_M_VP_IRQENABLE_0_VPVSYNC_EN_MASK)
	Vertical Synchronization for Video Port. More...

#define	CSL_DSS_VP_INTR_ODDVSYNC_MASK ((uint32_t) CSL_DSS_COMMON_M_VP_IRQENABLE_0_VPVSYNC_ODD_EN_MASK)
	VSYNC for odd field from interlace mode only. More...

#define	CSL_DSS_VP_INTR_PROGLINENUM_MASK ((uint32_t) CSL_DSS_COMMON_M_VP_IRQENABLE_0_VPPROGRAMMEDLINENUMBER_EN_MASK)
	Display scan has reached the programmed user line number. More...

#define	CSL_DSS_VP_INTR_SYNCLOST_MASK ((uint32_t) CSL_DSS_COMMON_M_VP_IRQENABLE_0_VPSYNCLOST_EN_MASK)
	Synchronization Lost for Video Port. More...

#define	CSL_DSS_VP_INTR_ACBIASCOUNT_MASK ((uint32_t) CSL_DSS_COMMON_M_VP_IRQENABLE_0_ACBIASCOUNTSTATUS_EN_MASK)
	AC Bias transition counter has decremented to zero. More...

#define	CSL_DSS_VP_INTR_SAFETYVIOLATION_REGION0_MASK ((uint32_t) 0x40U)
	Interrupt due to region 0 safety violation. More...

#define	CSL_DSS_VP_INTR_SAFETYVIOLATION_REGION1_MASK ((uint32_t) 0x80U)
	Interrupt due to region 1 safety violation. More...

#define	CSL_DSS_VP_INTR_SAFETYVIOLATION_REGION2_MASK ((uint32_t) 0x100U)
	Interrupt due to region 2 safety violation. More...

#define	CSL_DSS_VP_INTR_SAFETYVIOLATION_REGION3_MASK ((uint32_t) 0x200U)
	Interrupt due to region 3 safety violation. More...

#define	CSL_DSS_VP_INTR_SECURITYVIOLATION_MASK ((uint32_t) CSL_DSS_COMMON_M_VP_IRQENABLE_0_SECURITYVIOLATION_EN_MASK)
	Interrupt due to security violation. More...

#define	CSL_DSS_VP_INTR_GOBITCLEAR_MASK ((uint32_t) CSL_DSS_COMMON_M_VP_IRQENABLE_0_VPSYNC_EN_MASK)
	Go bit clear interrupt for VP. More...

#define	CSL_DSS_VP_INTR_SAFETYVIOLATION_REGION4_MASK ((uint32_t) 0x2000U)
	Interrupt due to region 4 safety violation. More...

#define	CSL_DSS_VP_INTR_SAFETYVIOLATION_REGION5_MASK ((uint32_t) 0x4000U)
	Interrupt due to region 5 safety violation. More...

#define	CSL_DSS_VP_INTR_SAFETYVIOLATION_REGION6_MASK ((uint32_t) 0x8000U)
	Interrupt due to region 6 safety violation. More...

#define	CSL_DSS_VP_INTR_SAFETYVIOLATION_REGION7_MASK ((uint32_t) 0x10000U)
	Interrupt due to region 7 safety violation. More...

#define	CSL_DSS_VP_INTR_ALL_MASK
	All Video Port interrupts. More...

Write back Pipeline Interrupt Mask

#define	CSL_DSS_WB_PIPE_INTR_WBSYNC_MASK ((uint32_t) CSL_DSS_COMMON_M_WB_IRQENABLE_WBSYNC_EN_MASK)
	Interrupt due to completion of write back sync. More...

#define	CSL_DSS_WB_PIPE_INTR_SECURITYVIOLATION_MASK ((uint32_t) CSL_DSS_COMMON_M_WB_IRQENABLE_SECURITYVIOLATION_EN_MASK)
	Interrupt due to security violation. More...

#define	CSL_DSS_WB_PIPE_INTR_FRAMEDONE_MASK ((uint32_t) CSL_DSS_COMMON_M_WB_IRQENABLE_WBFRAMEDONE_EN_MASK)
	Interrupt due to write back frame completion. More...

#define	CSL_DSS_WB_PIPE_INTR_INCOMPLETE_MASK ((uint32_t) CSL_DSS_COMMON_M_WB_IRQENABLE_WBUNCOMPLETEERROR_EN_MASK)
	Interrupt due to buffer flush before full drain (Only Capture WB) More...

#define	CSL_DSS_WB_PIPE_INTR_OVERFLOW_MASK ((uint32_t) CSL_DSS_COMMON_M_WB_IRQENABLE_WBBUFFEROVERFLOW_EN_MASK)
	Interrupt due to buffer overflow. More...

#define	CSL_DSS_WB_PIPE_INTR_ALL_MASK
	All Write Back Pipe interrupts. More...

Mflag Start Mode

#define	CSL_DSS_MFLAG_START_NORMAL ((uint32_t) CSL_DSS_COMMON_M_DISPC_GLOBAL_MFLAG_ATTRIBUTE_MFLAG_START_VAL_MFLAGNORMALSTARTMODE)
	Mflag of each pipe is kept at 0 until preload is reached. More...

#define	CSL_DSS_MFLAG_START_FORCED ((uint32_t) CSL_DSS_COMMON_M_DISPC_GLOBAL_MFLAG_ATTRIBUTE_MFLAG_START_VAL_MFLAGFORCESTARTMODE)
	Mflag is driven as per Mflag Ctrl. More...

Mflag Control

#define	CSL_DSS_MFLAG_CTRL_DISABLED ((uint32_t) CSL_DSS_COMMON_M_DISPC_GLOBAL_MFLAG_ATTRIBUTE_MFLAG_CTRL_VAL_MFLAGDIS)
	Mflag is disabled. More...

#define	CSL_DSS_MFLAG_CTRL_FORCE_ENABLE ((uint32_t) CSL_DSS_COMMON_M_DISPC_GLOBAL_MFLAG_ATTRIBUTE_MFLAG_CTRL_VAL_MFLAGFORCE)
	Mflag is force enabled. More...

#define	CSL_DSS_MFLAG_CTRL_DYNAMIC ((uint32_t) CSL_DSS_COMMON_M_DISPC_GLOBAL_MFLAG_ATTRIBUTE_MFLAG_CTRL_VAL_MFLAGEN)
	Mflag signal is set dynamically as per rules. More...

Write back input channel.

#define	CSL_DSS_WB_INPUT_DISABLED ((uint32_t) CSL_DSS_COMMON_M_DISPC_CONNECTIONS_WB_CONN_VAL_NULL)
	Write back input is disabled. More...

#define	CSL_DSS_WB_INPUT_VIDL2 ((uint32_t) CSL_DSS_COMMON_M_DISPC_CONNECTIONS_WB_CONN_VAL_VIDL2)
	Write back input is VIDL2. More...

#define	CSL_DSS_WB_INPUT_OVERLAY1 ((uint32_t) CSL_DSS_COMMON_M_DISPC_CONNECTIONS_WB_CONN_VAL_OVR1)
	Write back input is overlay 1. More...

#define	CSL_DSS_WB_INPUT_OVERLAY2 ((uint32_t) CSL_DSS_COMMON_M_DISPC_CONNECTIONS_WB_CONN_VAL_OVR2)
	Write back input is overlay 2. More...

#define	CSL_DSS_WB_INPUT_OVERLAY3 ((uint32_t) CSL_DSS_COMMON_M_DISPC_CONNECTIONS_WB_CONN_VAL_OVR3)
	Write back input is overlay 3. More...

#define	CSL_DSS_WB_INPUT_OVERLAY4 ((uint32_t) CSL_DSS_COMMON_M_DISPC_CONNECTIONS_WB_CONN_VAL_OVR4)
	Write back input is overlay 4. More...

Macro Definition Documentation

◆ CSL_DSS_DISPC_INTR_WB_MASK

#define CSL_DSS_DISPC_INTR_WB_MASK ((uint32_t) 0x4000U)

Write Back Pipeline Interrupt.

◆ CSL_DSS_DISPC_INTR_VIDL2_MASK

#define CSL_DSS_DISPC_INTR_VIDL2_MASK ((uint32_t) 0x80U)

Video Lite Pipeline 2 Interrupt.

◆ CSL_DSS_DISPC_INTR_VID2_MASK

#define CSL_DSS_DISPC_INTR_VID2_MASK ((uint32_t) 0x40U)

Video PipeLine 2 Interrupt.

◆ CSL_DSS_DISPC_INTR_VIDL1_MASK

#define CSL_DSS_DISPC_INTR_VIDL1_MASK ((uint32_t) 0x20U)

Video Lite Pipeline 1 Interrupt.

◆ CSL_DSS_DISPC_INTR_VID1_MASK

#define CSL_DSS_DISPC_INTR_VID1_MASK ((uint32_t) 0x10U)

Video PipeLine 1 Interrupt.

◆ CSL_DSS_DISPC_INTR_VP4_MASK

#define CSL_DSS_DISPC_INTR_VP4_MASK ((uint32_t) 0x08U)

Video Port 4 Interrupt.

◆ CSL_DSS_DISPC_INTR_VP3_MASK

#define CSL_DSS_DISPC_INTR_VP3_MASK ((uint32_t) 0x04U)

Video Port 3 Interrupt.

◆ CSL_DSS_DISPC_INTR_VP2_MASK

#define CSL_DSS_DISPC_INTR_VP2_MASK ((uint32_t) 0x02U)

Video Port 2 Interrupt.

◆ CSL_DSS_DISPC_INTR_VP1_MASK

#define CSL_DSS_DISPC_INTR_VP1_MASK ((uint32_t) 0x01U)

Video Port 1 Interrupt.

◆ CSL_DSS_VID_PIPE_INTR_FBDC_ILLEGALTILE_MASK

#define CSL_DSS_VID_PIPE_INTR_FBDC_ILLEGALTILE_MASK ((uint32_t) CSL_DSS_COMMON_M_VID_IRQENABLE_0_FBDC_ILLEGALTILEREQ_EN_MASK)

Interrupt due to FBDC illegal tile request.

◆ CSL_DSS_VID_PIPE_INTR_FBDC_CORRUPTTILE_MASK

#define CSL_DSS_VID_PIPE_INTR_FBDC_CORRUPTTILE_MASK ((uint32_t) CSL_DSS_COMMON_M_VID_IRQENABLE_0_FBDC_CORRUPTTILE_EN_MASK)

Interrupt due to FBDC corrupted tile detection.

◆ CSL_DSS_VID_PIPE_INTR_SAFETYVIOLATION_MASK

#define CSL_DSS_VID_PIPE_INTR_SAFETYVIOLATION_MASK ((uint32_t) CSL_DSS_COMMON_M_VID_IRQENABLE_0_SAFETYREGION_EN_MASK)

Interrupt due to safety violation.

◆ CSL_DSS_VID_PIPE_INTR_WINDOWEND_MASK

#define CSL_DSS_VID_PIPE_INTR_WINDOWEND_MASK ((uint32_t) CSL_DSS_COMMON_M_VID_IRQENABLE_0_VIDENDWINDOW_EN_MASK)

Interrupt due to video window end.

◆ CSL_DSS_VID_PIPE_INTR_BUFUNDERFLOW_MASK

#define CSL_DSS_VID_PIPE_INTR_BUFUNDERFLOW_MASK ((uint32_t) CSL_DSS_COMMON_M_VID_IRQENABLE_0_VIDBUFFERUNDERFLOW_EN_MASK)

Interrupt due to buffer underflow.

◆ CSL_DSS_VID_PIPE_INTR_ALL_MASK

#define CSL_DSS_VID_PIPE_INTR_ALL_MASK

Value:

(CSL_DSS_VID_PIPE_INTR_FBDC_ILLEGALTILE_MASK | \
                             CSL_DSS_VID_PIPE_INTR_FBDC_CORRUPTTILE_MASK | \
                             CSL_DSS_VID_PIPE_INTR_SAFETYVIOLATION_MASK | \
                             CSL_DSS_VID_PIPE_INTR_WINDOWEND_MASK | \
                             CSL_DSS_VID_PIPE_INTR_BUFUNDERFLOW_MASK)

All Video Pipe interrupts.

◆ CSL_DSS_VP_INTR_FRAMEDONE_MASK

#define CSL_DSS_VP_INTR_FRAMEDONE_MASK ((uint32_t) CSL_DSS_COMMON_M_VP_IRQENABLE_0_VPFRAMEDONE_EN_MASK)

Frame Done for Video Port.

◆ CSL_DSS_VP_INTR_VSYNC_MASK

#define CSL_DSS_VP_INTR_VSYNC_MASK ((uint32_t) CSL_DSS_COMMON_M_VP_IRQENABLE_0_VPVSYNC_EN_MASK)

Vertical Synchronization for Video Port.

◆ CSL_DSS_VP_INTR_ODDVSYNC_MASK

#define CSL_DSS_VP_INTR_ODDVSYNC_MASK ((uint32_t) CSL_DSS_COMMON_M_VP_IRQENABLE_0_VPVSYNC_ODD_EN_MASK)

VSYNC for odd field from interlace mode only.

◆ CSL_DSS_VP_INTR_PROGLINENUM_MASK

#define CSL_DSS_VP_INTR_PROGLINENUM_MASK ((uint32_t) CSL_DSS_COMMON_M_VP_IRQENABLE_0_VPPROGRAMMEDLINENUMBER_EN_MASK)

Display scan has reached the programmed user line number.

◆ CSL_DSS_VP_INTR_SYNCLOST_MASK

#define CSL_DSS_VP_INTR_SYNCLOST_MASK ((uint32_t) CSL_DSS_COMMON_M_VP_IRQENABLE_0_VPSYNCLOST_EN_MASK)

Synchronization Lost for Video Port.

◆ CSL_DSS_VP_INTR_ACBIASCOUNT_MASK

#define CSL_DSS_VP_INTR_ACBIASCOUNT_MASK ((uint32_t) CSL_DSS_COMMON_M_VP_IRQENABLE_0_ACBIASCOUNTSTATUS_EN_MASK)

AC Bias transition counter has decremented to zero.

◆ CSL_DSS_VP_INTR_SAFETYVIOLATION_REGION0_MASK

#define CSL_DSS_VP_INTR_SAFETYVIOLATION_REGION0_MASK ((uint32_t) 0x40U)

Interrupt due to region 0 safety violation.

◆ CSL_DSS_VP_INTR_SAFETYVIOLATION_REGION1_MASK

#define CSL_DSS_VP_INTR_SAFETYVIOLATION_REGION1_MASK ((uint32_t) 0x80U)

Interrupt due to region 1 safety violation.

◆ CSL_DSS_VP_INTR_SAFETYVIOLATION_REGION2_MASK

#define CSL_DSS_VP_INTR_SAFETYVIOLATION_REGION2_MASK ((uint32_t) 0x100U)

Interrupt due to region 2 safety violation.

◆ CSL_DSS_VP_INTR_SAFETYVIOLATION_REGION3_MASK

#define CSL_DSS_VP_INTR_SAFETYVIOLATION_REGION3_MASK ((uint32_t) 0x200U)

Interrupt due to region 3 safety violation.

◆ CSL_DSS_VP_INTR_SECURITYVIOLATION_MASK

#define CSL_DSS_VP_INTR_SECURITYVIOLATION_MASK ((uint32_t) CSL_DSS_COMMON_M_VP_IRQENABLE_0_SECURITYVIOLATION_EN_MASK)

Interrupt due to security violation.

◆ CSL_DSS_VP_INTR_GOBITCLEAR_MASK

#define CSL_DSS_VP_INTR_GOBITCLEAR_MASK ((uint32_t) CSL_DSS_COMMON_M_VP_IRQENABLE_0_VPSYNC_EN_MASK)

Go bit clear interrupt for VP.

◆ CSL_DSS_VP_INTR_SAFETYVIOLATION_REGION4_MASK

#define CSL_DSS_VP_INTR_SAFETYVIOLATION_REGION4_MASK ((uint32_t) 0x2000U)

Interrupt due to region 4 safety violation.

◆ CSL_DSS_VP_INTR_SAFETYVIOLATION_REGION5_MASK

#define CSL_DSS_VP_INTR_SAFETYVIOLATION_REGION5_MASK ((uint32_t) 0x4000U)

Interrupt due to region 5 safety violation.

◆ CSL_DSS_VP_INTR_SAFETYVIOLATION_REGION6_MASK

#define CSL_DSS_VP_INTR_SAFETYVIOLATION_REGION6_MASK ((uint32_t) 0x8000U)

Interrupt due to region 6 safety violation.

◆ CSL_DSS_VP_INTR_SAFETYVIOLATION_REGION7_MASK

#define CSL_DSS_VP_INTR_SAFETYVIOLATION_REGION7_MASK ((uint32_t) 0x10000U)

Interrupt due to region 7 safety violation.

◆ CSL_DSS_VP_INTR_ALL_MASK

#define CSL_DSS_VP_INTR_ALL_MASK

Value:

(CSL_DSS_VP_INTR_FRAMEDONE_MASK | \
                             CSL_DSS_VP_INTR_VSYNC_MASK | \
                             CSL_DSS_VP_INTR_ODDVSYNC_MASK | \
                             CSL_DSS_VP_INTR_PROGLINENUM_MASK | \
                             CSL_DSS_VP_INTR_SYNCLOST_MASK | \
                             CSL_DSS_VP_INTR_ACBIASCOUNT_MASK | \
                             CSL_DSS_VP_INTR_SAFETYVIOLATION_REGION0_MASK | \
                             CSL_DSS_VP_INTR_SAFETYVIOLATION_REGION1_MASK | \
                             CSL_DSS_VP_INTR_SAFETYVIOLATION_REGION2_MASK | \
                             CSL_DSS_VP_INTR_SAFETYVIOLATION_REGION3_MASK | \
                             CSL_DSS_VP_INTR_SECURITYVIOLATION_MASK | \
                             CSL_DSS_VP_INTR_GOBITCLEAR_MASK | \
                             CSL_DSS_VP_INTR_SAFETYVIOLATION_REGION4_MASK | \
                             CSL_DSS_VP_INTR_SAFETYVIOLATION_REGION5_MASK | \
                             CSL_DSS_VP_INTR_SAFETYVIOLATION_REGION6_MASK | \
                             CSL_DSS_VP_INTR_SAFETYVIOLATION_REGION7_MASK)

All Video Port interrupts.

◆ CSL_DSS_WB_PIPE_INTR_WBSYNC_MASK

#define CSL_DSS_WB_PIPE_INTR_WBSYNC_MASK ((uint32_t) CSL_DSS_COMMON_M_WB_IRQENABLE_WBSYNC_EN_MASK)

Interrupt due to completion of write back sync.

◆ CSL_DSS_WB_PIPE_INTR_SECURITYVIOLATION_MASK

#define CSL_DSS_WB_PIPE_INTR_SECURITYVIOLATION_MASK ((uint32_t) CSL_DSS_COMMON_M_WB_IRQENABLE_SECURITYVIOLATION_EN_MASK)

Interrupt due to security violation.

◆ CSL_DSS_WB_PIPE_INTR_FRAMEDONE_MASK

#define CSL_DSS_WB_PIPE_INTR_FRAMEDONE_MASK ((uint32_t) CSL_DSS_COMMON_M_WB_IRQENABLE_WBFRAMEDONE_EN_MASK)

Interrupt due to write back frame completion.

◆ CSL_DSS_WB_PIPE_INTR_INCOMPLETE_MASK

#define CSL_DSS_WB_PIPE_INTR_INCOMPLETE_MASK ((uint32_t) CSL_DSS_COMMON_M_WB_IRQENABLE_WBUNCOMPLETEERROR_EN_MASK)

Interrupt due to buffer flush before full drain (Only Capture WB)

◆ CSL_DSS_WB_PIPE_INTR_OVERFLOW_MASK

#define CSL_DSS_WB_PIPE_INTR_OVERFLOW_MASK ((uint32_t) CSL_DSS_COMMON_M_WB_IRQENABLE_WBBUFFEROVERFLOW_EN_MASK)

Interrupt due to buffer overflow.

◆ CSL_DSS_WB_PIPE_INTR_ALL_MASK

#define CSL_DSS_WB_PIPE_INTR_ALL_MASK

Value:

(CSL_DSS_WB_PIPE_INTR_WBSYNC_MASK | \
                             CSL_DSS_WB_PIPE_INTR_SECURITYVIOLATION_MASK | \
                             CSL_DSS_WB_PIPE_INTR_FRAMEDONE_MASK | \
                             CSL_DSS_WB_PIPE_INTR_UNCOMPLETE_MASK | \
                             CSL_DSS_WB_PIPE_INTR_OVERFLOW_MASK)

All Write Back Pipe interrupts.

◆ CSL_DSS_MFLAG_START_NORMAL

#define CSL_DSS_MFLAG_START_NORMAL ((uint32_t) CSL_DSS_COMMON_M_DISPC_GLOBAL_MFLAG_ATTRIBUTE_MFLAG_START_VAL_MFLAGNORMALSTARTMODE)

Mflag of each pipe is kept at 0 until preload is reached.

◆ CSL_DSS_MFLAG_START_FORCED

#define CSL_DSS_MFLAG_START_FORCED ((uint32_t) CSL_DSS_COMMON_M_DISPC_GLOBAL_MFLAG_ATTRIBUTE_MFLAG_START_VAL_MFLAGFORCESTARTMODE)

Mflag is driven as per Mflag Ctrl.

◆ CSL_DSS_MFLAG_CTRL_DISABLED

#define CSL_DSS_MFLAG_CTRL_DISABLED ((uint32_t) CSL_DSS_COMMON_M_DISPC_GLOBAL_MFLAG_ATTRIBUTE_MFLAG_CTRL_VAL_MFLAGDIS)

Mflag is disabled.

◆ CSL_DSS_MFLAG_CTRL_FORCE_ENABLE

#define CSL_DSS_MFLAG_CTRL_FORCE_ENABLE ((uint32_t) CSL_DSS_COMMON_M_DISPC_GLOBAL_MFLAG_ATTRIBUTE_MFLAG_CTRL_VAL_MFLAGFORCE)

Mflag is force enabled.

◆ CSL_DSS_MFLAG_CTRL_DYNAMIC

#define CSL_DSS_MFLAG_CTRL_DYNAMIC ((uint32_t) CSL_DSS_COMMON_M_DISPC_GLOBAL_MFLAG_ATTRIBUTE_MFLAG_CTRL_VAL_MFLAGEN)

Mflag signal is set dynamically as per rules.

◆ CSL_DSS_WB_INPUT_DISABLED

#define CSL_DSS_WB_INPUT_DISABLED ((uint32_t) CSL_DSS_COMMON_M_DISPC_CONNECTIONS_WB_CONN_VAL_NULL)

Write back input is disabled.

◆ CSL_DSS_WB_INPUT_VIDL2

#define CSL_DSS_WB_INPUT_VIDL2 ((uint32_t) CSL_DSS_COMMON_M_DISPC_CONNECTIONS_WB_CONN_VAL_VIDL2)

Write back input is VIDL2.

◆ CSL_DSS_WB_INPUT_OVERLAY1

#define CSL_DSS_WB_INPUT_OVERLAY1 ((uint32_t) CSL_DSS_COMMON_M_DISPC_CONNECTIONS_WB_CONN_VAL_OVR1)

Write back input is overlay 1.

◆ CSL_DSS_WB_INPUT_OVERLAY2

#define CSL_DSS_WB_INPUT_OVERLAY2 ((uint32_t) CSL_DSS_COMMON_M_DISPC_CONNECTIONS_WB_CONN_VAL_OVR2)

Write back input is overlay 2.

◆ CSL_DSS_WB_INPUT_OVERLAY3

#define CSL_DSS_WB_INPUT_OVERLAY3 ((uint32_t) CSL_DSS_COMMON_M_DISPC_CONNECTIONS_WB_CONN_VAL_OVR3)

Write back input is overlay 3.

◆ CSL_DSS_WB_INPUT_OVERLAY4

#define CSL_DSS_WB_INPUT_OVERLAY4 ((uint32_t) CSL_DSS_COMMON_M_DISPC_CONNECTIONS_WB_CONN_VAL_OVR4)

Write back input is overlay 4.

Typedef Documentation

◆ CSL_dss_commRegs

typedef CSL_dss_common_mRegs CSL_dss_commRegs

DSS Common Registers.

DSS7 has four common blocks, hence define a generic structure to have common APIs

Function Documentation

◆ CSL_dssModuleReset()

void CSL_dssModuleReset ( CSL_dss_commRegs * commRegs )

Reset the DSS Module. Application should make sure Video Ports are disabled before calling this API.

Parameters

commRegs Pointer to a CSL_dss_commRegs structure containing the common configuration

Returns: None

◆ CSL_dssEnableDispcIntr()

void CSL_dssEnableDispcIntr	(	CSL_dss_commRegs *	commRegs,
		uint32_t	intrMask,
		uint32_t	intrEnable
	)

Enable/disable the interrupts at DSS top level.

Parameters

commRegs	Pointer to a CSL_dss_commRegs structure containing the common configuration
intrMask	Interrupt Mask. Refer CSL_DssDispcIntrMask for values
intrEnable	Enable/Disable the interrupt TRUE: Enable interrupt FALSE: Disable interrupt

Returns: None

◆ CSL_dssEnablePipeIntr()

void CSL_dssEnablePipeIntr	(	CSL_dss_commRegs *	commRegs,
		uint32_t	vidPipeId,
		uint32_t	intrMask,
		uint32_t	intrEnable
	)

Enable/disable the interrupts for Video Pipe.

Parameters

commRegs	Pointer to a CSL_dss_commRegs structure containing the common configuration
vidPipeId	Video Pipe for which interrupt should be configured. Valid Values: CSL_DSS_VID_PIPE_ID_VID1 CSL_DSS_VID_PIPE_ID_VIDL1 CSL_DSS_VID_PIPE_ID_VID2 CSL_DSS_VID_PIPE_ID_VIDL2
intrMask	Interrupt Mask. Refer CSL_DssVidPipeIntrMask for values
intrEnable	Enable/Disable the interrupt TRUE: Enable interrupt FALSE: Disable interrupt

Returns: None

◆ CSL_dssEnableVpIntr()

void CSL_dssEnableVpIntr	(	CSL_dss_commRegs *	commRegs,
		uint32_t	portId,
		uint32_t	intrMask,
		uint32_t	intrEnable
	)

Enable/disable the interrupts for Video Port.

Parameters

commRegs	Pointer to a CSL_dss_commRegs structure containing the common configuration
portId	Video Port for which interrupt should be configured. Valid Values: CSL_DSS_VP_ID_1 CSL_DSS_VP_ID_2 CSL_DSS_VP_ID_3 CSL_DSS_VP_ID_4
intrMask	Interrupt Mask. Refer CSL_DssVpIntrMask for values
intrEnable	Enable/Disable the interrupt TRUE: Enable interrupt FALSE: Disable interrupt

Returns: None

◆ CSL_dssEnableWbIntr()

void CSL_dssEnableWbIntr	(	CSL_dss_commRegs *	commRegs,
		uint32_t	wbPipeId,
		uint32_t	intrMask,
		uint32_t	intrEnable
	)

Enable/disable the interrupts for Write Back Pipe.

Parameters

commRegs	Pointer to a CSL_dss_commRegs structure containing the common configuration
wbPipeId	Write back Pipe for which interrupt should be configured. Valid Values: CSL_DSS_WB_PIPE_ID_1
intrMask	Interrupt Mask. Refer CSL_DssWbPipeIntrMask for values
intrEnable	Enable/Disable the interrupt TRUE: Enable interrupt FALSE: Disable interrupt

Returns: None

◆ CSL_dssClearDispcIntr()

void CSL_dssClearDispcIntr	(	CSL_dss_commRegs *	commRegs,
		uint32_t	intrMask
	)

Clear the interrupts at DSS top level.

Parameters

commRegs	Pointer to a CSL_dss_commRegs structure containing the common configuration
intrMask	Interrupt Mask. Refer CSL_DssDispcIntrMask for values

Returns: None

◆ CSL_dssClearPipeIntr()

void CSL_dssClearPipeIntr	(	CSL_dss_commRegs *	commRegs,
		uint32_t	vidPipeId,
		uint32_t	intrMask
	)

Clear the interrupts for Video Pipe.

Parameters

commRegs	Pointer to a CSL_dss_commRegs structure containing the common configuration
vidPipeId	Video Pipe for which interrupt should be cleared. Valid Values: CSL_DSS_VID_PIPE_ID_VID1 CSL_DSS_VID_PIPE_ID_VIDL1 CSL_DSS_VID_PIPE_ID_VID2 CSL_DSS_VID_PIPE_ID_VIDL2
intrMask	Interrupt Mask. Refer CSL_DssVidPipeIntrMask for values

Returns: None

◆ CSL_dssClearVpIntr()

void CSL_dssClearVpIntr	(	CSL_dss_commRegs *	commRegs,
		uint32_t	portId,
		uint32_t	intrMask
	)

Clear the interrupts for Video Port.

Parameters

commRegs	Pointer to a CSL_dss_commRegs structure containing the common configuration
portId	Video Port for which interrupt should be cleared. Valid Values: CSL_DSS_VP_ID_1 CSL_DSS_VP_ID_2 CSL_DSS_VP_ID_3 CSL_DSS_VP_ID_4
intrMask	Interrupt Mask. Refer CSL_DssVpIntrMask for values

Returns: None

◆ CSL_dssClearWbIntr()

void CSL_dssClearWbIntr	(	CSL_dss_commRegs *	commRegs,
		uint32_t	wbPipeId,
		uint32_t	intrMask
	)

Clear the interrupts for Write Back Pipe.

Parameters

commRegs	Pointer to a CSL_dss_commRegs structure containing the common configuration
wbPipeId	Write back Pipe for which interrupt should be cleared. Valid Values: CSL_DSS_WB_PIPE_ID_1
intrMask	Interrupt Mask. Refer CSL_DssWbPipeIntrMask for values

Returns: None

◆ CSL_dssGetDispcIntrStatus()

uint32_t CSL_dssGetDispcIntrStatus ( const CSL_dss_commRegs * commRegs )

Get the top level interrupt status of DSS.

Parameters

commRegs Pointer to a CSL_dss_commRegs structure containing the common configuration

Returns: Interrupt status

◆ CSL_dssGetPipeIntrStatus()

uint32_t CSL_dssGetPipeIntrStatus	(	const CSL_dss_commRegs *	commRegs,
		uint32_t	vidPipeId
	)

Get the interrupt status of Video Pipe.

Parameters

commRegs	Pointer to a CSL_dss_commRegs structure containing the common configuration
vidPipeId	Video Pipe for which interrupt status should be read. Valid Values: CSL_DSS_VID_PIPE_ID_VID1 CSL_DSS_VID_PIPE_ID_VIDL1 CSL_DSS_VID_PIPE_ID_VID2 CSL_DSS_VID_PIPE_ID_VIDL2

Returns: Interrupt status

◆ CSL_dssGetVpIntrStatus()

uint32_t CSL_dssGetVpIntrStatus	(	const CSL_dss_commRegs *	commRegs,
		uint32_t	portId
	)

Get the interrupt status of Video Port.

Parameters

commRegs	Pointer to a CSL_dss_commRegs structure containing the common configuration
portId	Video Port for which interrupt status should be read. Valid Values: CSL_DSS_VP_ID_1 CSL_DSS_VP_ID_2 CSL_DSS_VP_ID_3 CSL_DSS_VP_ID_4

Returns: Interrupt status

◆ CSL_dssGetWbIntrStatus()

uint32_t CSL_dssGetWbIntrStatus	(	const CSL_dss_commRegs *	commRegs,
		uint32_t	wbPipeId
	)

Get the interrupt status of Write Back Pipe.

Parameters

commRegs	Pointer to a CSL_dss_commRegs structure containing the common configuration
wbPipeId	Write Back Pipe for which interrupt status should be read. Valid Values: CSL_DSS_WB_PIPE_ID_1

Returns: Interrupt status

◆ CSL_dssSetGlobalMflagConfig()

void CSL_dssSetGlobalMflagConfig	(	CSL_dss_commRegs *	commRegs,
		const CSL_DssGlobalMFlagCfg *	mflagCfg
	)

Set the global MFLAG configuration.

Parameters

commRegs	Pointer to a CSL_dss_commRegs structure containing the common configuration
mflagCfg	Pointer to CSL_DssGlobalMFlagCfg structure. This parameter should not be NULL

Returns: None

◆ CSL_dssGlobalVpEnable()

void CSL_dssGlobalVpEnable	(	CSL_dss_commRegs *	commRegs,
		uint32_t	portIdMask,
		uint32_t	enable
	)

Enable the global VP enable bit. This allows setting multiple outputs synchronously. The 'OR' result of different masks can be used as input parameter.

Parameters

commRegs	Pointer to a CSL_dss_commRegs structure containing the common configuration
portIdMask	Video Port for which enable bit should be set. Refer CSL_DssVpIdMask for details.
enable	Enable/Disable the ports TRUE: Enable ports synchronously FALSE: Disable ports synchronously

Returns: None

◆ CSL_dssGlobalVpGoBitEnable()

void CSL_dssGlobalVpGoBitEnable	(	CSL_dss_commRegs *	commRegs,
		uint32_t	portIdMask
	)

Enable the global VP go bit. This allows setting multiple outputs synchronously. The 'OR' result of different masks can be used as input parameter.

Parameters

commRegs	Pointer to a CSL_dss_commRegs structure containing the common configuration
portIdMask	Video Port for which go bit should be set. Refer CSL_DssVpIdMask for details.

Returns: None

◆ CSL_dssSetCbaConfig()

void CSL_dssSetCbaConfig	(	CSL_dss_commRegs *	commRegs,
		const CSL_DssCbaCfg *	cbaCfg
	)

Set the CBA configuration.

Parameters

commRegs	Pointer to a CSL_dss_commRegs structure containing the common configuration
cbaCfg	Pointer to CSL_DssCbaCfg structure. This parameter should not be NULL

Returns: None

◆ CSL_dssConnectVpToDpi()

int32_t CSL_dssConnectVpToDpi	(	CSL_dss_commRegs *	commRegs,
		uint32_t	portId,
		uint32_t	dpiId
	)

This API can be used to select the VP connection to DPI.

Parameters

commRegs	Pointer to a CSL_dss_commRegs structure containing the common configuration
portId	Video Port Id. Possible values are: CSL_DSS_VP_ID_2 or CSL_DSS_VP_ID_4
dpiId	DPI Id. Possible values are: CSL_DSS_DPI_ID_DPI_0 or CSL_DSS_DPI_ID_DPI_1

Returns: CSL_ErrType_t

◆ CSL_dssSetWbInputCh()

void CSL_dssSetWbInputCh	(	CSL_dss_commRegs *	commRegs,
		uint32_t	inputCh
	)

This API is used to set the write back input channel.

Parameters

commRegs	Pointer to a CSL_dss_commRegs structure containing the common configuration
inputCh	Write back input channel. Refer CSL_DssWbInputCh for details.

Returns: None

◆ CSL_dssGlobalMFlagCfgInit()

static void CSL_dssGlobalMFlagCfgInit ( CSL_DssGlobalMFlagCfg * mflagCfg )

inlinestatic

CSL_DssGlobalMFlagCfg structure init function.

Parameters

mflagCfg Pointer to CSL_DssGlobalMFlagCfg structure

Returns: None

◆ CSL_dssCbaCfgInit()

static void CSL_dssCbaCfgInit ( CSL_DssCbaCfg * cbaCfg )

inlinestatic

CSL_DssCbaCfg structure init function.

Parameters

cbaCfg Pointer to CSL_DssCbaCfg structure

Returns: None

Introduction

Files

Data Structures

Functions

Typedefs

DISPC Interrupt Mask

Video Pipeline Interrupt Mask

Video Port Interrupt Mask

Write back Pipeline Interrupt Mask

Mflag Start Mode

Mflag Control

Write back input channel.

Macro Definition Documentation

◆ CSL_DSS_DISPC_INTR_WB_MASK

◆ CSL_DSS_DISPC_INTR_VIDL2_MASK

◆ CSL_DSS_DISPC_INTR_VID2_MASK

◆ CSL_DSS_DISPC_INTR_VIDL1_MASK

◆ CSL_DSS_DISPC_INTR_VID1_MASK

◆ CSL_DSS_DISPC_INTR_VP4_MASK

◆ CSL_DSS_DISPC_INTR_VP3_MASK

◆ CSL_DSS_DISPC_INTR_VP2_MASK

◆ CSL_DSS_DISPC_INTR_VP1_MASK

◆ CSL_DSS_VID_PIPE_INTR_FBDC_ILLEGALTILE_MASK

◆ CSL_DSS_VID_PIPE_INTR_FBDC_CORRUPTTILE_MASK

◆ CSL_DSS_VID_PIPE_INTR_SAFETYVIOLATION_MASK

◆ CSL_DSS_VID_PIPE_INTR_WINDOWEND_MASK

◆ CSL_DSS_VID_PIPE_INTR_BUFUNDERFLOW_MASK

◆ CSL_DSS_VID_PIPE_INTR_ALL_MASK

◆ CSL_DSS_VP_INTR_FRAMEDONE_MASK

◆ CSL_DSS_VP_INTR_VSYNC_MASK

◆ CSL_DSS_VP_INTR_ODDVSYNC_MASK

◆ CSL_DSS_VP_INTR_PROGLINENUM_MASK

◆ CSL_DSS_VP_INTR_SYNCLOST_MASK

◆ CSL_DSS_VP_INTR_ACBIASCOUNT_MASK

◆ CSL_DSS_VP_INTR_SAFETYVIOLATION_REGION0_MASK

◆ CSL_DSS_VP_INTR_SAFETYVIOLATION_REGION1_MASK

◆ CSL_DSS_VP_INTR_SAFETYVIOLATION_REGION2_MASK

◆ CSL_DSS_VP_INTR_SAFETYVIOLATION_REGION3_MASK

◆ CSL_DSS_VP_INTR_SECURITYVIOLATION_MASK

◆ CSL_DSS_VP_INTR_GOBITCLEAR_MASK

◆ CSL_DSS_VP_INTR_SAFETYVIOLATION_REGION4_MASK

◆ CSL_DSS_VP_INTR_SAFETYVIOLATION_REGION5_MASK

◆ CSL_DSS_VP_INTR_SAFETYVIOLATION_REGION6_MASK

◆ CSL_DSS_VP_INTR_SAFETYVIOLATION_REGION7_MASK

◆ CSL_DSS_VP_INTR_ALL_MASK

◆ CSL_DSS_WB_PIPE_INTR_WBSYNC_MASK

◆ CSL_DSS_WB_PIPE_INTR_SECURITYVIOLATION_MASK

◆ CSL_DSS_WB_PIPE_INTR_FRAMEDONE_MASK

◆ CSL_DSS_WB_PIPE_INTR_INCOMPLETE_MASK

◆ CSL_DSS_WB_PIPE_INTR_OVERFLOW_MASK

◆ CSL_DSS_WB_PIPE_INTR_ALL_MASK

◆ CSL_DSS_MFLAG_START_NORMAL

◆ CSL_DSS_MFLAG_START_FORCED

◆ CSL_DSS_MFLAG_CTRL_DISABLED

◆ CSL_DSS_MFLAG_CTRL_FORCE_ENABLE

◆ CSL_DSS_MFLAG_CTRL_DYNAMIC

◆ CSL_DSS_WB_INPUT_DISABLED

◆ CSL_DSS_WB_INPUT_VIDL2

◆ CSL_DSS_WB_INPUT_OVERLAY1

◆ CSL_DSS_WB_INPUT_OVERLAY2

◆ CSL_DSS_WB_INPUT_OVERLAY3

◆ CSL_DSS_WB_INPUT_OVERLAY4

Typedef Documentation

◆ CSL_dss_commRegs

Function Documentation

◆ CSL_dssModuleReset()

◆ CSL_dssEnableDispcIntr()

◆ CSL_dssEnablePipeIntr()

◆ CSL_dssEnableVpIntr()

◆ CSL_dssEnableWbIntr()

◆ CSL_dssClearDispcIntr()

◆ CSL_dssClearPipeIntr()

◆ CSL_dssClearVpIntr()

◆ CSL_dssClearWbIntr()

◆ CSL_dssGetDispcIntrStatus()

◆ CSL_dssGetPipeIntrStatus()

◆ CSL_dssGetVpIntrStatus()

◆ CSL_dssGetWbIntrStatus()

◆ CSL_dssSetGlobalMflagConfig()

◆ CSL_dssGlobalVpEnable()