47 #ifndef CSL_DSSCOMMON_H_ 48 #define CSL_DSSCOMMON_H_ 78 #define CSL_DSS_DISPC_INTR_WB_MASK ((uint32_t) 0x4000U) 80 #define CSL_DSS_DISPC_INTR_VIDL2_MASK ((uint32_t) 0x80U) 82 #define CSL_DSS_DISPC_INTR_VID2_MASK ((uint32_t) 0x40U) 84 #define CSL_DSS_DISPC_INTR_VIDL1_MASK ((uint32_t) 0x20U) 86 #define CSL_DSS_DISPC_INTR_VID1_MASK ((uint32_t) 0x10U) 88 #define CSL_DSS_DISPC_INTR_VP4_MASK ((uint32_t) 0x08U) 90 #define CSL_DSS_DISPC_INTR_VP3_MASK ((uint32_t) 0x04U) 92 #define CSL_DSS_DISPC_INTR_VP2_MASK ((uint32_t) 0x02U) 94 #define CSL_DSS_DISPC_INTR_VP1_MASK ((uint32_t) 0x01U) 104 #define CSL_DSS_VID_PIPE_INTR_FBDC_ILLEGALTILE_MASK \ 105 ((uint32_t) CSL_DSS_COMMON_M_VID_IRQENABLE_0_FBDC_ILLEGALTILEREQ_EN_MASK) 107 #define CSL_DSS_VID_PIPE_INTR_FBDC_CORRUPTTILE_MASK \ 108 ((uint32_t) CSL_DSS_COMMON_M_VID_IRQENABLE_0_FBDC_CORRUPTTILE_EN_MASK) 110 #define CSL_DSS_VID_PIPE_INTR_SAFETYVIOLATION_MASK \ 111 ((uint32_t) CSL_DSS_COMMON_M_VID_IRQENABLE_0_SAFETYREGION_EN_MASK) 113 #define CSL_DSS_VID_PIPE_INTR_WINDOWEND_MASK \ 114 ((uint32_t) CSL_DSS_COMMON_M_VID_IRQENABLE_0_VIDENDWINDOW_EN_MASK) 116 #define CSL_DSS_VID_PIPE_INTR_BUFUNDERFLOW_MASK \ 117 ((uint32_t) CSL_DSS_COMMON_M_VID_IRQENABLE_0_VIDBUFFERUNDERFLOW_EN_MASK) 119 #define CSL_DSS_VID_PIPE_INTR_ALL_MASK \ 120 (CSL_DSS_VID_PIPE_INTR_FBDC_ILLEGALTILE_MASK | \ 121 CSL_DSS_VID_PIPE_INTR_FBDC_CORRUPTTILE_MASK | \ 122 CSL_DSS_VID_PIPE_INTR_SAFETYVIOLATION_MASK | \ 123 CSL_DSS_VID_PIPE_INTR_WINDOWEND_MASK | \ 124 CSL_DSS_VID_PIPE_INTR_BUFUNDERFLOW_MASK) 134 #define CSL_DSS_VP_INTR_FRAMEDONE_MASK \ 135 ((uint32_t) CSL_DSS_COMMON_M_VP_IRQENABLE_0_VPFRAMEDONE_EN_MASK) 137 #define CSL_DSS_VP_INTR_VSYNC_MASK \ 138 ((uint32_t) CSL_DSS_COMMON_M_VP_IRQENABLE_0_VPVSYNC_EN_MASK) 140 #define CSL_DSS_VP_INTR_ODDVSYNC_MASK \ 141 ((uint32_t) CSL_DSS_COMMON_M_VP_IRQENABLE_0_VPVSYNC_ODD_EN_MASK) 143 #define CSL_DSS_VP_INTR_PROGLINENUM_MASK \ 144 ((uint32_t) CSL_DSS_COMMON_M_VP_IRQENABLE_0_VPPROGRAMMEDLINENUMBER_EN_MASK) 146 #define CSL_DSS_VP_INTR_SYNCLOST_MASK \ 147 ((uint32_t) CSL_DSS_COMMON_M_VP_IRQENABLE_0_VPSYNCLOST_EN_MASK) 149 #define CSL_DSS_VP_INTR_ACBIASCOUNT_MASK \ 150 ((uint32_t) CSL_DSS_COMMON_M_VP_IRQENABLE_0_ACBIASCOUNTSTATUS_EN_MASK) 152 #define CSL_DSS_VP_INTR_SAFETYVIOLATION_REGION0_MASK \ 155 #define CSL_DSS_VP_INTR_SAFETYVIOLATION_REGION1_MASK \ 158 #define CSL_DSS_VP_INTR_SAFETYVIOLATION_REGION2_MASK \ 161 #define CSL_DSS_VP_INTR_SAFETYVIOLATION_REGION3_MASK \ 164 #define CSL_DSS_VP_INTR_SECURITYVIOLATION_MASK \ 165 ((uint32_t) CSL_DSS_COMMON_M_VP_IRQENABLE_0_SECURITYVIOLATION_EN_MASK) 167 #define CSL_DSS_VP_INTR_GOBITCLEAR_MASK \ 168 ((uint32_t) CSL_DSS_COMMON_M_VP_IRQENABLE_0_VPSYNC_EN_MASK) 170 #define CSL_DSS_VP_INTR_SAFETYVIOLATION_REGION4_MASK \ 173 #define CSL_DSS_VP_INTR_SAFETYVIOLATION_REGION5_MASK \ 176 #define CSL_DSS_VP_INTR_SAFETYVIOLATION_REGION6_MASK \ 179 #define CSL_DSS_VP_INTR_SAFETYVIOLATION_REGION7_MASK \ 180 ((uint32_t) 0x10000U) 182 #define CSL_DSS_VP_INTR_ALL_MASK \ 183 (CSL_DSS_VP_INTR_FRAMEDONE_MASK | \ 184 CSL_DSS_VP_INTR_VSYNC_MASK | \ 185 CSL_DSS_VP_INTR_ODDVSYNC_MASK | \ 186 CSL_DSS_VP_INTR_PROGLINENUM_MASK | \ 187 CSL_DSS_VP_INTR_SYNCLOST_MASK | \ 188 CSL_DSS_VP_INTR_ACBIASCOUNT_MASK | \ 189 CSL_DSS_VP_INTR_SAFETYVIOLATION_REGION0_MASK | \ 190 CSL_DSS_VP_INTR_SAFETYVIOLATION_REGION1_MASK | \ 191 CSL_DSS_VP_INTR_SAFETYVIOLATION_REGION2_MASK | \ 192 CSL_DSS_VP_INTR_SAFETYVIOLATION_REGION3_MASK | \ 193 CSL_DSS_VP_INTR_SECURITYVIOLATION_MASK | \ 194 CSL_DSS_VP_INTR_GOBITCLEAR_MASK | \ 195 CSL_DSS_VP_INTR_SAFETYVIOLATION_REGION4_MASK | \ 196 CSL_DSS_VP_INTR_SAFETYVIOLATION_REGION5_MASK | \ 197 CSL_DSS_VP_INTR_SAFETYVIOLATION_REGION6_MASK | \ 198 CSL_DSS_VP_INTR_SAFETYVIOLATION_REGION7_MASK) 208 #define CSL_DSS_WB_PIPE_INTR_WBSYNC_MASK \ 209 ((uint32_t) CSL_DSS_COMMON_M_WB_IRQENABLE_WBSYNC_EN_MASK) 211 #define CSL_DSS_WB_PIPE_INTR_SECURITYVIOLATION_MASK \ 212 ((uint32_t) CSL_DSS_COMMON_M_WB_IRQENABLE_SECURITYVIOLATION_EN_MASK) 214 #define CSL_DSS_WB_PIPE_INTR_FRAMEDONE_MASK \ 215 ((uint32_t) CSL_DSS_COMMON_M_WB_IRQENABLE_WBFRAMEDONE_EN_MASK) 217 #define CSL_DSS_WB_PIPE_INTR_INCOMPLETE_MASK \ 218 ((uint32_t) CSL_DSS_COMMON_M_WB_IRQENABLE_WBUNCOMPLETEERROR_EN_MASK) 220 #define CSL_DSS_WB_PIPE_INTR_OVERFLOW_MASK \ 221 ((uint32_t) CSL_DSS_COMMON_M_WB_IRQENABLE_WBBUFFEROVERFLOW_EN_MASK) 223 #define CSL_DSS_WB_PIPE_INTR_ALL_MASK \ 224 (CSL_DSS_WB_PIPE_INTR_WBSYNC_MASK | \ 225 CSL_DSS_WB_PIPE_INTR_SECURITYVIOLATION_MASK | \ 226 CSL_DSS_WB_PIPE_INTR_FRAMEDONE_MASK | \ 227 CSL_DSS_WB_PIPE_INTR_UNCOMPLETE_MASK | \ 228 CSL_DSS_WB_PIPE_INTR_OVERFLOW_MASK) 238 #define CSL_DSS_MFLAG_START_NORMAL \ 239 ((uint32_t) CSL_DSS_COMMON_M_DISPC_GLOBAL_MFLAG_ATTRIBUTE_MFLAG_START_VAL_MFLAGNORMALSTARTMODE) 241 #define CSL_DSS_MFLAG_START_FORCED \ 242 ((uint32_t) CSL_DSS_COMMON_M_DISPC_GLOBAL_MFLAG_ATTRIBUTE_MFLAG_START_VAL_MFLAGFORCESTARTMODE) 252 #define CSL_DSS_MFLAG_CTRL_DISABLED \ 253 ((uint32_t) CSL_DSS_COMMON_M_DISPC_GLOBAL_MFLAG_ATTRIBUTE_MFLAG_CTRL_VAL_MFLAGDIS) 255 #define CSL_DSS_MFLAG_CTRL_FORCE_ENABLE \ 256 ((uint32_t) CSL_DSS_COMMON_M_DISPC_GLOBAL_MFLAG_ATTRIBUTE_MFLAG_CTRL_VAL_MFLAGFORCE) 258 #define CSL_DSS_MFLAG_CTRL_DYNAMIC \ 259 ((uint32_t) CSL_DSS_COMMON_M_DISPC_GLOBAL_MFLAG_ATTRIBUTE_MFLAG_CTRL_VAL_MFLAGEN) 269 #define CSL_DSS_WB_INPUT_DISABLED \ 270 ((uint32_t) CSL_DSS_COMMON_M_DISPC_CONNECTIONS_WB_CONN_VAL_NULL) 272 #define CSL_DSS_WB_INPUT_VIDL2 \ 273 ((uint32_t) CSL_DSS_COMMON_M_DISPC_CONNECTIONS_WB_CONN_VAL_VIDL2) 275 #define CSL_DSS_WB_INPUT_OVERLAY1 \ 276 ((uint32_t) CSL_DSS_COMMON_M_DISPC_CONNECTIONS_WB_CONN_VAL_OVR1) 278 #define CSL_DSS_WB_INPUT_OVERLAY2 \ 279 ((uint32_t) CSL_DSS_COMMON_M_DISPC_CONNECTIONS_WB_CONN_VAL_OVR2) 281 #define CSL_DSS_WB_INPUT_OVERLAY3 \ 282 ((uint32_t) CSL_DSS_COMMON_M_DISPC_CONNECTIONS_WB_CONN_VAL_OVR3) 284 #define CSL_DSS_WB_INPUT_OVERLAY4 \ 285 ((uint32_t) CSL_DSS_COMMON_M_DISPC_CONNECTIONS_WB_CONN_VAL_OVR4) 349 uint32_t intrEnable);
372 uint32_t intrEnable);
395 uint32_t intrEnable);
415 uint32_t intrEnable);
581 uint32_t portIdMask);
void CSL_dssSetGlobalMflagConfig(CSL_dss_commRegs *commRegs, const CSL_DssGlobalMFlagCfg *mflagCfg)
Set the global MFLAG configuration.
static void CSL_dssCbaCfgInit(CSL_DssCbaCfg *cbaCfg)
CSL_DssCbaCfg structure init function.
Definition: csl_dssCommon.h:665
DSS CBA Config parameters.
Definition: csl_dssCommon.h:309
void CSL_dssGlobalVpGoBitEnable(CSL_dss_commRegs *commRegs, uint32_t portIdMask)
Enable the global VP go bit. This allows setting multiple outputs synchronously. The 'OR' result of d...
#define CSL_DSS_MFLAG_CTRL_DISABLED
Mflag is disabled.
Definition: csl_dssCommon.h:252
void CSL_dssModuleReset(CSL_dss_commRegs *commRegs)
Reset the DSS Module. Application should make sure Video Ports are disabled before calling this API.
void CSL_dssClearPipeIntr(CSL_dss_commRegs *commRegs, uint32_t vidPipeId, uint32_t intrMask)
Clear the interrupts for Video Pipe.
uint32_t CSL_dssGetPipeIntrStatus(const CSL_dss_commRegs *commRegs, uint32_t vidPipeId)
Get the interrupt status of Video Pipe.
CSL_dss_common_mRegs CSL_dss_commRegs
DSS Common Registers.
Definition: csl_dssCommon.h:69
uint32_t priHigh
Definition: csl_dssCommon.h:311
void CSL_dssEnablePipeIntr(CSL_dss_commRegs *commRegs, uint32_t vidPipeId, uint32_t intrMask, uint32_t intrEnable)
Enable/disable the interrupts for Video Pipe.
static void CSL_dssGlobalMFlagCfgInit(CSL_DssGlobalMFlagCfg *mflagCfg)
CSL_DssGlobalMFlagCfg structure init function.
Definition: csl_dssCommon.h:655
uint32_t CSL_dssGetVpIntrStatus(const CSL_dss_commRegs *commRegs, uint32_t portId)
Get the interrupt status of Video Port.
void CSL_dssEnableVpIntr(CSL_dss_commRegs *commRegs, uint32_t portId, uint32_t intrMask, uint32_t intrEnable)
Enable/disable the interrupts for Video Port.
#define NULL
Define NULL if not defined.
Definition: csl_types.h:107
void CSL_dssSetWbInputCh(CSL_dss_commRegs *commRegs, uint32_t inputCh)
This API is used to set the write back input channel.
#define CSL_DSS_MFLAG_START_NORMAL
Mflag of each pipe is kept at 0 until preload is reached.
Definition: csl_dssCommon.h:238
void CSL_dssClearDispcIntr(CSL_dss_commRegs *commRegs, uint32_t intrMask)
Clear the interrupts at DSS top level.
DSS Global MFLAG Config parameters.
Definition: csl_dssCommon.h:295
uint32_t globalMflagCtrl
Definition: csl_dssCommon.h:301
uint32_t priLow
Definition: csl_dssCommon.h:314
uint32_t CSL_dssGetWbIntrStatus(const CSL_dss_commRegs *commRegs, uint32_t wbPipeId)
Get the interrupt status of Write Back Pipe.
uint32_t globalMflagStart
Definition: csl_dssCommon.h:297
void CSL_dssEnableDispcIntr(CSL_dss_commRegs *commRegs, uint32_t intrMask, uint32_t intrEnable)
Enable/disable the interrupts at DSS top level.
void CSL_dssGlobalVpEnable(CSL_dss_commRegs *commRegs, uint32_t portIdMask, uint32_t enable)
Enable the global VP enable bit. This allows setting multiple outputs synchronously....
void CSL_dssEnableWbIntr(CSL_dss_commRegs *commRegs, uint32_t wbPipeId, uint32_t intrMask, uint32_t intrEnable)
Enable/disable the interrupts for Write Back Pipe.
int32_t CSL_dssConnectVpToDpi(CSL_dss_commRegs *commRegs, uint32_t portId, uint32_t dpiId)
This API can be used to select the VP connection to DPI.
uint32_t CSL_dssGetDispcIntrStatus(const CSL_dss_commRegs *commRegs)
Get the top level interrupt status of DSS.
void CSL_dssClearVpIntr(CSL_dss_commRegs *commRegs, uint32_t portId, uint32_t intrMask)
Clear the interrupts for Video Port.
void CSL_dssClearWbIntr(CSL_dss_commRegs *commRegs, uint32_t wbPipeId, uint32_t intrMask)
Clear the interrupts for Write Back Pipe.
void CSL_dssSetCbaConfig(CSL_dss_commRegs *commRegs, const CSL_DssCbaCfg *cbaCfg)
Set the CBA configuration.