PDK Documentation
|
Functions | |
void | CSL_MDIO_getVersionInfo (CSL_mdioHandle hMdioRegs, CSL_MDIO_VERSION *mdioVersionInfo) |
uint16_t | CSL_MDIO_getClkDivVal (CSL_mdioHandle hMdioRegs) |
void | CSL_MDIO_setClkDivVal (CSL_mdioHandle hMdioRegs, uint16_t clkDivVal) |
uint32_t | CSL_MDIO_isStateMachineEnabled (CSL_mdioHandle hMdioRegs) |
void | CSL_MDIO_enableStateMachine (CSL_mdioHandle hMdioRegs) |
void | CSL_MDIO_disableStateMachine (CSL_mdioHandle hMdioRegs) |
uint32_t | CSL_MDIO_isPhyAlive (CSL_mdioHandle hMdioRegs, uint32_t phyAddr) |
uint32_t | CSL_MDIO_isPhyLinked (CSL_mdioHandle hMdioRegs, uint32_t phyAddr) |
uint32_t | CSL_MDIO_isUnmaskedLinkStatusChangeIntSet (CSL_mdioHandle hMdioRegs, uint32_t index) |
void | CSL_MDIO_clearUnmaskedLinkStatusChangeInt (CSL_mdioHandle hMdioRegs, uint32_t index) |
uint32_t | CSL_MDIO_phyRegRead (uint32_t baseAddr, uint32_t phyAddr, uint32_t regNum, uint16_t *pData) |
void | CSL_MDIO_phyRegWrite (uint32_t baseAddr, uint32_t phyAddr, uint32_t regNum, uint16_t wrVal) |
This API writes a PHY register using MDIO. More... | |
uint32_t | CSL_MDIO_phyLinkStatus (uint32_t baseAddr, uint32_t phyAddr) |
This API reads the link status of all PHY connected to this MDIO. The bit corresponding to the PHY address will be set if the PHY link is active. More... | |
void | CSL_MDIO_enableLinkStatusChangeInterrupt (CSL_mdioHandle hMdioRegs, Uint32 index, Uint32 phyAddr) |
Enable MDIO link interrupt (MDIO_LINKINT) for PHY monitoring. More... | |
void | CSL_MDIO_disableLinkStatusChangeInterrupt (CSL_mdioHandle hMdioRegs, Uint32 index, Uint32 phyAddr) |
Disable MDIO link interrupt (MDIO_LINKINT) for PHY monitoring. More... | |
void | CSL_MDIO_enableFaultDetect (CSL_mdioHandle hMdioRegs) |
void | CSL_MDIO_disableFaultDetect (CSL_mdioHandle hMdioRegs) |
void | CSL_MDIO_enablePreamble (CSL_mdioHandle hMdioRegs) |
void | CSL_MDIO_disablePreamble (CSL_mdioHandle hMdioRegs) |
uint32_t | CSL_MDIO_phyRegRead2 (CSL_mdioHandle hMdioRegs, uint32_t userGroup, uint32_t phyAddr, uint32_t regNum, uint16_t *pData) |
void | CSL_MDIO_phyRegWrite2 (CSL_mdioHandle hMdioRegs, uint32_t userGroup, uint32_t phyAddr, uint32_t regNum, uint16_t wrVal) |
This API writes a PHY register using MDIO. More... | |
void | CSL_MDIO_setClause45EnableMask (CSL_mdioHandle hMdioRegs, uint32_t clause45EnableMask) |
Set Clause-45 enable mask. Each bit in the mask is associated with a PHY address, i.e. bit 0 is associated with PHY address 0, etc. More... | |
uint32_t | CSL_MDIO_getClause45EnableMask (CSL_mdioHandle hMdioRegs) |
Get Clause-45 enable mask. Each bit in the mask is associated with a PHY address, i.e. bit 0 is associated with PHY address 0, etc. More... | |
int32_t | CSL_MDIO_phyInitiateRegWriteC45 (CSL_mdioHandle hMdioRegs, uint32_t userGroup, uint32_t phyAddr, uint32_t mmdNum, uint32_t regAddr, uint16_t wrVal) |
Initiate a non-blocking write transaction with PHY using Clause-45 frame. The user should call CSL_MDIO_isPhyRegAccessComplete() to query the transaction status. More... | |
int32_t | CSL_MDIO_phyInitiateRegReadC45 (CSL_mdioHandle hMdioRegs, uint32_t userGroup, uint32_t phyAddr, uint32_t mmdNum, uint32_t regAddr) |
Initiate a non-blocking register read transaction with PHY using Clause-45 frame. The user should call CSL_MDIO_isPhyRegAccessComplete() to query the transaction status, and once it's complete, get the value read from register via CSL_MDIO_phyGetRegReadVal(). More... | |
int32_t | CSL_MDIO_phyRegInitiateWriteC22 (CSL_mdioHandle hMdioRegs, uint32_t userGroup, uint32_t phyAddr, uint32_t regAddr, uint16_t wrVal) |
Initiate a non-blocking write transaction with PHY using Clause-22 frame. The user should call CSL_MDIO_isPhyRegAccessComplete() to query the transaction status. More... | |
int32_t | CSL_MDIO_phyInitiateRegReadC22 (CSL_mdioHandle hMdioRegs, uint32_t userGroup, uint32_t phyAddr, uint32_t regAddr) |
Initiate a non-blocking register read transaction with PHY using Clause-22 frame. The user should call CSL_MDIO_isPhyRegAccessComplete() to query the transaction status, and once it's complete, get the value read from register via CSL_MDIO_phyGetRegReadVal(). More... | |
int32_t | CSL_MDIO_phyGetRegReadVal (CSL_mdioHandle hMdioRegs, uint32_t userGroup, uint16_t *pData) |
Get the value read from a PHY register from a transaction previously initiated through either CSL_MDIO_phyInitiateRegReadC22() or CSL_MDIO_phyInitiateRegReadC45(). More... | |
uint32_t | CSL_MDIO_isPhyRegAccessComplete (CSL_mdioHandle hMdioRegs, uint32_t userGroup) |
Check if there is a transaction going on in MDIO. More... | |
uint32_t | CSL_MDIO_phyLinkStatus2 (CSL_mdioHandle hMdioRegs, uint32_t phyAddr) |
This API reads the link status of all PHY connected to this MDIO. The bit corresponding to the PHY address will be set if the PHY link is active. More... | |
uint32_t | CSL_MDIO_isStatusChangeModeInterruptEnabled (CSL_mdioHandle hMdioRegs) |
Check if the MDIO link interrupt (MDIO_LINKINT) is enabled. More... | |
void | CSL_MDIO_enableStatusChangeModeInterrupt (CSL_mdioHandle hMdioRegs) |
Enable MDIO link interrupt (MDIO_LINKINT) More... | |
void | CSL_MDIO_disableStatusChangeModeInterrupt (CSL_mdioHandle hMdioRegs) |
Disable MDIO link interrupt (MDIO_LINKINT) More... | |
Uint32 | CSL_MDIO_getLinkStatusChangePhyAddr (CSL_mdioHandle hMdioRegs, Uint32 index) |
Get the PHY address being monitored. More... | |
uint32_t | CSL_MDIO_isStateChangeModeEnabled (CSL_mdioHandle hMdioRegs) |
Checks if the State Change Mode is enabled or not. More... | |
void | CSL_MDIO_enableStateChangeMode (CSL_mdioHandle hMdioRegs) |
This function enables the MDIO State Change Mode. More... | |
void | CSL_MDIO_disableStateChangeMode (CSL_mdioHandle hMdioRegs) |
This function disables the MDIO State Change Mode. More... | |
void | CSL_MDIO_setPollIPG (CSL_mdioHandle hMdioRegs, uint8_t ipgVal) |
Set Polling Inter Packet Gap value. More... | |
uint8_t | CSL_MDIO_getPollIPG (CSL_mdioHandle hMdioRegs) |
Get Polling Inter Packet Gap value. More... | |
void | CSL_MDIO_setPollEnableMask (CSL_mdioHandle hMdioRegs, uint32_t pollEnableMask) |
Set poll enable mask. More... | |
uint32_t | CSL_MDIO_getPollEnableMask (CSL_mdioHandle hMdioRegs) |
Get poll enable mask. More... | |
void CSL_MDIO_getVersionInfo | ( | CSL_mdioHandle | hMdioRegs, |
CSL_MDIO_VERSION * | mdioVersionInfo | ||
) |
============================================================================
CSL_MDIO_getVersionInfo
Description
This function retrieves the MDIO version information.
Arguments
mdioVersionInfo CSL_MDIO_VERSION structure that needs to be populated with the version info read from the hardware. *
Return Value
None
Pre Condition
None
Post Condition
None
Reads
MDIO_VERSION_REG_REVMINOR, MDIO_VERSION_REG_REVMAJ, MDIO_VERSION_REG_MODID
Example
CSL_MDIO_VERSION mdioVersionInfo; CSL_MDIO_getVersion (&mdioVersionInfo);
uint16_t CSL_MDIO_getClkDivVal | ( | CSL_mdioHandle | hMdioRegs | ) |
=================================================================================================
CSL_MDIO_getClkDivVal
Description
This function retrieves the clock divider value (CLKDIV) from the MDIO control register.
Arguments None
Return Value uint32_t
Pre Condition
None
Post Condition
None
Reads
MDIO_CONTROL_REG_CLKDIV
Example
* uint16_t clkDivVal; clkDivVal = CSL_MDIO_getClkDivVal ();
void CSL_MDIO_setClkDivVal | ( | CSL_mdioHandle | hMdioRegs, |
uint16_t | clkDivVal | ||
) |
============================================================================
CSL_MDIO_setClkDivVal
Description
This function configures the clock divider value (CLKDIV) in the MDIO control register with the value specified.
Arguments
clkDivVal The value to use for clock divider configuration. When this set to 0, the MDIO clock is disabled. *
Return Value
None
Pre Condition
None
Post Condition
CONTROL_REG configured with the clock divider value. Configures the MDIO clock frequency.
Writes
MDIO_CONTROL_REG_CLKDIV
Example
* uint16_t clkDivVal; clkDivVal = 165; // Setup the MDIO clock frequency CSL_MDIO_setClkDivVal (clkDivVal);
uint32_t CSL_MDIO_isStateMachineEnabled | ( | CSL_mdioHandle | hMdioRegs | ) |
============================================================================
CSL_MDIO_isStateMachineEnabled
Description
This function returns the value of the Enable bit of the MDIO control register. It returns 1 to indicate that the MDIO state machine is enabled and is active and 0 to indicate otherwise.
Arguments None
Return Value uint32_t
Pre Condition
None
Post Condition
None
Reads
MDIO_CONTROL_REG_ENABLE
Example
if (CSL_MDIO_isStateMachineEnabled ()) { // MDIO state machine enabled } else { // MDIO state machine disabled }
void CSL_MDIO_enableStateMachine | ( | CSL_mdioHandle | hMdioRegs | ) |
============================================================================
CSL_MDIO_enableStateMachine
Description
This function enables the MDIO state machine if not already active.
Arguments None
Return Value
None
Pre Condition
None
Post Condition
Enables MDIO State machine.
Writes
MDIO_CONTROL_REG_ENABLE
Example
* // Enable MDIO state machine CSL_MDIO_enableStateMachine ();
void CSL_MDIO_disableStateMachine | ( | CSL_mdioHandle | hMdioRegs | ) |
============================================================================
CSL_MDIO_disableStateMachine
Description
This function sets the 'ENABLE' bit of the MDIO control register to 0, triggering the disable of MDIO state machine if active.
Arguments None
Return Value
None
Pre Condition
None
Post Condition
If the MDIO state machine is active at the time it is disabled, will complete the current operation before halting it and setting the idle bit.
Writes
MDIO_CONTROL_REG_ENABLE=0
Example
* // Disable MDIO state machine CSL_MDIO_disableStateMachine ();
uint32_t CSL_MDIO_isPhyAlive | ( | CSL_mdioHandle | hMdioRegs, |
uint32_t | phyAddr | ||
) |
============================================================================
CSL_MDIO_isPhyAlive
Description
For a given PHY address provided to this function in 'phyAddr', this function reads the 'ALIVE' bit corresponding to that PHY; The function returns 1 to indicate that the most recent access for the address was acknowledged by the PHY and 0 otherwise.
Arguments
* phyAddr The PHY address number (0-31) for which the alive bit * status must be checked and returned by this function. *
Return Value uint32_t
Pre Condition
None
Post Condition
None
Reads
MDIO_ALIVE_REG
Example
* uint32_t phyAddr = 0; // Check if PHY Address 0 is alive if (CSL_MDIO_isPhyAlive (phyAddr)) { // MDIO PHY 0 access succeeded } else { // MDIO PHY 0 access failed }
uint32_t CSL_MDIO_isPhyLinked | ( | CSL_mdioHandle | hMdioRegs, |
uint32_t | phyAddr | ||
) |
============================================================================
CSL_MDIO_isPhyLinked
Description
For a given PHY address provided to this function in 'phyAddr', this function reads the 'LINK' bit corresponding to that PHY; The function returns 1 to indicate that the corresponding PHY address has a link.
Arguments
* phyAddr The PHY address number (0-31) for which the link bit * status must be checked and returned by this function. *
Return Value uint32_t
Pre Condition
None
Post Condition
None
Reads
MDIO_LINK_REG
Example
* uint32_t phyAddr = 0; // Check if PHY Address 0 link is up if (CSL_MDIO_isPhyLinked (phyAddr)) { // MDIO PHY 0 link up } else { // MDIO PHY 0 link not up }
uint32_t CSL_MDIO_isUnmaskedLinkStatusChangeIntSet | ( | CSL_mdioHandle | hMdioRegs, |
uint32_t | index | ||
) |
============================================================================
CSL_MDIO_isUnmaskedLinkStatusChangeIntSet
Description
For a given PHY selector(0-1) provided corresponding to the PHY address in USERPHYSEL register, this function returns the 'LINKINTRAW' register contents corresponding to it. This functions returns a 1 to indicate that the link status has changed for the PHY provided and 0 otherwise.
Arguments
* index The PHY selector (0-1) for which the link status change * bit must be read. Phy selector value 0 corresponds to the * PHY address programmed in USERPHYSEL0 register and a Phy * selector value 1 corresponds to the PHY address in * USERPHYSEL1 register. *
Return Value uint32_t
Pre Condition
None
Post Condition
None
Reads
MDIO_ALIVE_REG
Example
* uint32_t index = 0; if (CSL_MDIO_isUnmaskedLinkStatusChangeIntSet (index)) { // Link status has changed } else { // Link status has not changed } }
void CSL_MDIO_clearUnmaskedLinkStatusChangeInt | ( | CSL_mdioHandle | hMdioRegs, |
uint32_t | index | ||
) |
============================================================================
CSL_MDIO_clearUnmaskedLinkStatusChangeInt
Description
For a given PHY selector(0-1) provided corresponding to the PHY address in USERPHYSEL register, this function clears the 'LINKINTRAW' register contents corresponding to it.
Arguments
* index The PHY selector (0-1) for which the link status change * bit must be read. Phy selector value 0 corresponds to the * PHY address programmed in USERPHYSEL0 register and a Phy * selector value 1 corresponds to the PHY address in * USERPHYSEL1 register. *
Return Value
None
Pre Condition
None
Post Condition
Clears the Link change interrupt.
Writes
MDIO_LINK_INT_RAW_REG
Example
* uint32_t index = 0; CSL_MDIO_clearUnmaskedLinkStatusChangeInt (index);
uint32_t CSL_MDIO_phyRegRead | ( | uint32_t | baseAddr, |
uint32_t | phyAddr, | ||
uint32_t | regNum, | ||
uint16_t * | pData | ||
) |
============================================================================
CSL_MDIO_phyRegRead
baseAddr | Base Address of the MDIO module. |
phyAddr | PHY Address. |
regNum | Register Number to be read. |
pData | Pointer where the read value shall be written. |
TRUE | Read is successful. |
FALSE | Read is not acknowledged properly. |
void CSL_MDIO_phyRegWrite | ( | uint32_t | baseAddr, |
uint32_t | phyAddr, | ||
uint32_t | regNum, | ||
uint16_t | wrVal | ||
) |
This API writes a PHY register using MDIO.
============================================================================
CSL_MDIO_phyRegWrite
baseAddr | Base Address of the MDIO module. |
phyAddr | PHY Address. |
regNum | Register Number to be written. |
wrVal | Value to be written. |
uint32_t CSL_MDIO_phyLinkStatus | ( | uint32_t | baseAddr, |
uint32_t | phyAddr | ||
) |
This API reads the link status of all PHY connected to this MDIO. The bit corresponding to the PHY address will be set if the PHY link is active.
============================================================================
CSL_MDIO_phyLinkStatus
baseAddr | Base Address of the MDIO module. |
phyAddr | PHY Address. |
void CSL_MDIO_enableLinkStatusChangeInterrupt | ( | CSL_mdioHandle | hMdioRegs, |
Uint32 | index, | ||
Uint32 | phyAddr | ||
) |
Enable MDIO link interrupt (MDIO_LINKINT) for PHY monitoring.
============================================================================
CSL_MDIO_enableLinkStatusChangeInterrupt
This function enables the MDIO link interrupt (MDIO_LINKINT). This function is applicable only when MDIO is operating in Normal Mode.
In Normal Mode, MDIO_LINKINT[0] event is set upon link change on the first PHY being monitored. MDIO_LINKINT[1] event is set upon link change on the second PHY being monitored.
hMdioRegs | Handle to MDIO module register overlay |
index | User group index (0 or 1) |
phyAddr | PHY address |
void CSL_MDIO_disableLinkStatusChangeInterrupt | ( | CSL_mdioHandle | hMdioRegs, |
Uint32 | index, | ||
Uint32 | phyAddr | ||
) |
Disable MDIO link interrupt (MDIO_LINKINT) for PHY monitoring.
============================================================================
CSL_MDIO_disableLinkStatusChangeInterrupt
This function disables the MDIO link interrupt (MDIO_LINKINT). This function is applicable only when MDIO is operating in Normal Mode.
hMdioRegs | Handle to MDIO module register overlay |
index | User group index (0 or 1) |
phyAddr | PHY address |
void CSL_MDIO_enableFaultDetect | ( | CSL_mdioHandle | hMdioRegs | ) |
============================================================================
CSL_MDIO_enableFaultDetect
Description
This function enables the Physical layer fault detection mechanism by setting 'FAULTENB' bit of the MDIO Control register to 1.
Arguments None
Return Value
None
Pre Condition
None
Post Condition
Enables PHY layer fault detection.
Writes
MDIO_CONTROL_REG_FAULT_DETECT_ENABLE=1
Example
* // Enable Phy Layer fault detection CSL_MDIO_enableFaultDetect ();
void CSL_MDIO_disableFaultDetect | ( | CSL_mdioHandle | hMdioRegs | ) |
============================================================================
CSL_MDIO_disableFaultDetect
Description
This function disables the Physical layer fault detection mechanism by setting 'FAULTENB' bit of the MDIO Control register to 0.
Arguments None
Return Value
None
Pre Condition
None
Post Condition
Disables PHY layer fault detection.
Writes
MDIO_CONTROL_REG_FAULT_DETECT_ENABLE=0
Example
* // Disable Phy Layer fault detection CSL_MDIO_disableFaultDetect ();
void CSL_MDIO_enablePreamble | ( | CSL_mdioHandle | hMdioRegs | ) |
============================================================================
CSL_MDIO_enablePreamble
Description
This function enables the MDIO preamble.
Arguments None
Return Value
None
Pre Condition
None
Post Condition
Enables MDIO Preamble frames.
Writes
MDIO_CONTROL_REG_PREAMBLE=0
Example
* // Enable MDIO preamble frames CSL_MDIO_enablePreamble ();
void CSL_MDIO_disablePreamble | ( | CSL_mdioHandle | hMdioRegs | ) |
============================================================================
CSL_MDIO_disablePreamble
Description
This function disables the MDIO preamble.
Arguments None
Return Value
None
Pre Condition
None
Post Condition
Disables MDIO Preamble frames.
Writes
MDIO_CONTROL_REG_PREAMBLE=1
Example
* // Disable MDIO preamble frames CSL_MDIO_disablePreamble ();
uint32_t CSL_MDIO_phyRegRead2 | ( | CSL_mdioHandle | hMdioRegs, |
uint32_t | userGroup, | ||
uint32_t | phyAddr, | ||
uint32_t | regNum, | ||
uint16_t * | pData | ||
) |
============================================================================
CSL_MDIO_phyRegRead2
hMdioRegs | Handle to MDIO module register overlay. |
userGroup | User group to use |
phyAddr | PHY Address. |
regNum | Register Number to be read. |
pData | Pointer where the read value shall be written. |
void CSL_MDIO_phyRegWrite2 | ( | CSL_mdioHandle | hMdioRegs, |
uint32_t | userGroup, | ||
uint32_t | phyAddr, | ||
uint32_t | regNum, | ||
uint16_t | wrVal | ||
) |
This API writes a PHY register using MDIO.
============================================================================
CSL_MDIO_phyRegWrite2
hMdioRegs | Handle to MDIO module register overlay. |
userGroup | User group to use |
phyAddr | PHY Address. |
regNum | Register Number to be written. |
wrVal | Value to be written. |
void CSL_MDIO_setClause45EnableMask | ( | CSL_mdioHandle | hMdioRegs, |
uint32_t | clause45EnableMask | ||
) |
Set Clause-45 enable mask. Each bit in the mask is associated with a PHY address, i.e. bit 0 is associated with PHY address 0, etc.
============================================================================
CSL_MDIO_setClause45EnableMask
hMdioRegs | Handle to MDIO module register overlay |
clause45EnableMask | Clause-45 enable bit mask |
uint32_t CSL_MDIO_getClause45EnableMask | ( | CSL_mdioHandle | hMdioRegs | ) |
Get Clause-45 enable mask. Each bit in the mask is associated with a PHY address, i.e. bit 0 is associated with PHY address 0, etc.
============================================================================
CSL_MDIO_getClause45EnableMask
hMdioRegs | Handle to MDIO module register overlay |
int32_t CSL_MDIO_phyInitiateRegWriteC45 | ( | CSL_mdioHandle | hMdioRegs, |
uint32_t | userGroup, | ||
uint32_t | phyAddr, | ||
uint32_t | mmdNum, | ||
uint32_t | regAddr, | ||
uint16_t | wrVal | ||
) |
Initiate a non-blocking write transaction with PHY using Clause-45 frame. The user should call CSL_MDIO_isPhyRegAccessComplete() to query the transaction status.
============================================================================
CSL_MDIO_phyInitiateRegWriteC45
hMdioRegs | Handle to MDIO module register overlay |
userGroup | User group to use |
phyAddr | PHY address |
mmdNum | MMD number |
regAddr | Register address |
wrVal | Value to be written |
CSL_PASS | Register write has been initiated |
CSL_EFAIL | MDIO is busy with previous transaction |
int32_t CSL_MDIO_phyInitiateRegReadC45 | ( | CSL_mdioHandle | hMdioRegs, |
uint32_t | userGroup, | ||
uint32_t | phyAddr, | ||
uint32_t | mmdNum, | ||
uint32_t | regAddr | ||
) |
Initiate a non-blocking register read transaction with PHY using Clause-45 frame. The user should call CSL_MDIO_isPhyRegAccessComplete() to query the transaction status, and once it's complete, get the value read from register via CSL_MDIO_phyGetRegReadVal().
============================================================================
CSL_MDIO_phyInitiateRegReadC45
hMdioRegs | Handle to MDIO module register overlay |
userGroup | User group to use |
phyAddr | PHY address |
mmdNum | MMD number |
regAddr | Register address |
CSL_PASS | Register read has been initiated |
CSL_EFAIL | MDIO is busy with previous transaction |
int32_t CSL_MDIO_phyRegInitiateWriteC22 | ( | CSL_mdioHandle | hMdioRegs, |
uint32_t | userGroup, | ||
uint32_t | phyAddr, | ||
uint32_t | regAddr, | ||
uint16_t | wrVal | ||
) |
Initiate a non-blocking write transaction with PHY using Clause-22 frame. The user should call CSL_MDIO_isPhyRegAccessComplete() to query the transaction status.
============================================================================
CSL_MDIO_phyInitiateRegWriteC22
hMdioRegs | Handle to MDIO module register overlay |
userGroup | User group to use |
phyAddr | PHY address |
regAddr | Register address |
wrVal | Value to be written |
CSL_PASS | Register write has been initiated |
CSL_EFAIL | MDIO is busy with previous transaction |
int32_t CSL_MDIO_phyInitiateRegReadC22 | ( | CSL_mdioHandle | hMdioRegs, |
uint32_t | userGroup, | ||
uint32_t | phyAddr, | ||
uint32_t | regAddr | ||
) |
Initiate a non-blocking register read transaction with PHY using Clause-22 frame. The user should call CSL_MDIO_isPhyRegAccessComplete() to query the transaction status, and once it's complete, get the value read from register via CSL_MDIO_phyGetRegReadVal().
============================================================================
CSL_MDIO_phyInitiateRegReadC22
hMdioRegs | Handle to MDIO module register overlay |
userGroup | User group to use |
phyAddr | PHY address |
regAddr | Register address |
CSL_PASS | Register read has been initiated |
CSL_EFAIL | MDIO is busy with previous transaction |
int32_t CSL_MDIO_phyGetRegReadVal | ( | CSL_mdioHandle | hMdioRegs, |
uint32_t | userGroup, | ||
uint16_t * | pData | ||
) |
Get the value read from a PHY register from a transaction previously initiated through either CSL_MDIO_phyInitiateRegReadC22() or CSL_MDIO_phyInitiateRegReadC45().
============================================================================
CSL_MDIO_phyGetRegReadVal
hMdioRegs | Handle to MDIO module register overlay |
userGroup | User group to use |
pData | Pointer where the read value shall be written |
CSL_PASS | Register read was acknowledged and read value is valid |
CSL_ETIMEOUT | Read transaction was not acknowledged by PHY |
CSL_EFAIL | MDIO is busy with previous transaction |
uint32_t CSL_MDIO_isPhyRegAccessComplete | ( | CSL_mdioHandle | hMdioRegs, |
uint32_t | userGroup | ||
) |
Check if there is a transaction going on in MDIO.
============================================================================
CSL_MDIO_isPhyRegAccessComplete
hMdioRegs | Handle to MDIO module register overlay |
userGroup | User group to use |
TRUE | Last register access is complete |
FALSE | Last register access is active |
uint32_t CSL_MDIO_phyLinkStatus2 | ( | CSL_mdioHandle | hMdioRegs, |
uint32_t | phyAddr | ||
) |
This API reads the link status of all PHY connected to this MDIO. The bit corresponding to the PHY address will be set if the PHY link is active.
============================================================================
CSL_MDIO_phyLinkStatus2
hMdioRegs | Base Address of the MDIO module. |
phyAddr | PHY Address. |
uint32_t CSL_MDIO_isStatusChangeModeInterruptEnabled | ( | CSL_mdioHandle | hMdioRegs | ) |
Check if the MDIO link interrupt (MDIO_LINKINT) is enabled.
============================================================================
CSL_MDIO_isStatusChangeModeInterruptEnabled
This function checks if the MDIO link interrupt (MDIO_LINKINT) is enabled or not. This function is applicable only when MDIO is operating in State Change Mode.
hMdioRegs | Handle to MDIO module register overlay |
void CSL_MDIO_enableStatusChangeModeInterrupt | ( | CSL_mdioHandle | hMdioRegs | ) |
Enable MDIO link interrupt (MDIO_LINKINT)
============================================================================
CSL_MDIO_enableStatusChangeModeInterrupt
This function enables the MDIO link interrupt (MDIO_LINKINT). This function is applicable only when MDIO is operating in State Change Mode.
In State Change Mode, MDIO_LINKINT[0] is set when any bit in the ALIVE or LINK registers is set. MDIO_LINKINT[1] is not used.
hMdioRegs | Handle to MDIO module register overlay |
void CSL_MDIO_disableStatusChangeModeInterrupt | ( | CSL_mdioHandle | hMdioRegs | ) |
Disable MDIO link interrupt (MDIO_LINKINT)
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CSL_MDIO_disableLinkStatusChangeInterrupt
This function disables the MDIO link interrupt (MDIO_LINKINT). This function is applicable only when MDIO is operating in State Change Mode.
hMdioRegs | Handle to MDIO module register overlay |
Uint32 CSL_MDIO_getLinkStatusChangePhyAddr | ( | CSL_mdioHandle | hMdioRegs, |
Uint32 | index | ||
) |
Get the PHY address being monitored.
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CSL_MDIO_getLinkStatusChangePhyAddr
This function gets the address of the PHY whose state change is being monitored. This function is applicable only when MDIO is operating in Normal Mode.
hMdioRegs | Handle to MDIO module register overlay |
index | User group index (0 or 1) |
uint32_t CSL_MDIO_isStateChangeModeEnabled | ( | CSL_mdioHandle | hMdioRegs | ) |
Checks if the State Change Mode is enabled or not.
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CSL_MDIO_isStateChangeModeEnabled
This function checks if the State Change Mode is enabled as per STATECHANGEMODE bit of the MDIO Poll register. It returns 1 to indicate that State Change Mode is enabled, or 0 to indicate that Normal Mode is enabled.
hMdioRegs | Handle to MDIO module register overlay |
void CSL_MDIO_enableStateChangeMode | ( | CSL_mdioHandle | hMdioRegs | ) |
This function enables the MDIO State Change Mode.
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CSL_MDIO_enableStateChangeMode
This function enables the State Change Mode which is used to detect change events on any PHY: MDIO_LINKINT[0] when any bit in MDIOAlive or MDIOLink registers is set MDIO_LINKINT[1] is not used MDIO_UserPhySel0/1 registers are not used
hMdioRegs | Handle to MDIO module register overlay |
void CSL_MDIO_disableStateChangeMode | ( | CSL_mdioHandle | hMdioRegs | ) |
This function disables the MDIO State Change Mode.
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CSL_MDIO_disableStateChangeMode
This function disabled the State Change Mode, effectively enabling Normal Mode which can be used to monitor only two PHYs.
hMdioRegs | Handle to MDIO module register overlay |
void CSL_MDIO_setPollIPG | ( | CSL_mdioHandle | hMdioRegs, |
uint8_t | ipgVal | ||
) |
Set Polling Inter Packet Gap value.
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CSL_MDIO_setPollIPG
This function sets the polling Inter Packet Gap (IPG) value which is the number of MDCLK_O clocks between each poll when polling is enabled.
hMdioRegs | Handle to MDIO module register overlay |
ipgVal | IPG value (in MDCLK_O clock pulses) |
uint8_t CSL_MDIO_getPollIPG | ( | CSL_mdioHandle | hMdioRegs | ) |
Get Polling Inter Packet Gap value.
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CSL_MDIO_getPollIPG
This function gets the polling Inter Packet Gap (IPG) value which is the number of MDCLK_O clocks between each poll when polling is enabled.
hMdioRegs | Handle to MDIO module register overlay |
void CSL_MDIO_setPollEnableMask | ( | CSL_mdioHandle | hMdioRegs, |
uint32_t | pollEnableMask | ||
) |
Set poll enable mask.
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CSL_MDIO_setPollEnableMask
This function sets the poll enable mask. When set, each bit of the mask indicates that the associated PHY will be included in the polling operations.
Due to a hardware limitation, bit 31 is always set internally by this function.
hMdioRegs | Handle to MDIO module register overlay |
pollEnableMask | Poll enable mask |
uint32_t CSL_MDIO_getPollEnableMask | ( | CSL_mdioHandle | hMdioRegs | ) |
Get poll enable mask.
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CSL_MDIO_getPollEnableMask
This function gets the poll enable mask. When set, each bit of the mask indicates that the associated PHY will be included in the polling operations.
hMdioRegs | Handle to MDIO module register overlay |