Data Structures
struct	SDL_edc_ctlRegs

Macros
#define	SDL_EDC_CTL_REVISION (0x00000010U)

#define	SDL_EDC_CTL_CONTROL (0x00000014U)

#define	SDL_EDC_CTL_ERR_INJECT1 (0x00000018U)

#define	SDL_EDC_CTL_ERR_INJECT2 (0x0000001CU)

#define	SDL_EDC_CTL_ERR_STATUS1 (0x00000020U)

#define	SDL_EDC_CTL_ERR_STATUS2 (0x00000024U)

#define	SDL_EDC_CTL_REVISION_SCHEME_MASK (0xC0000000U)

#define	SDL_EDC_CTL_REVISION_SCHEME_SHIFT (0x0000001EU)

#define	SDL_EDC_CTL_REVISION_SCHEME_RESETVAL (0x00000001U)

#define	SDL_EDC_CTL_REVISION_SCHEME_MAX (0x00000003U)

#define	SDL_EDC_CTL_REVISION_FUNC_MASK (0x0FFF0000U)

#define	SDL_EDC_CTL_REVISION_FUNC_SHIFT (0x00000010U)

#define	SDL_EDC_CTL_REVISION_FUNC_RESETVAL (0x00000F40U)

#define	SDL_EDC_CTL_REVISION_FUNC_MAX (0x00000FFFU)

#define	SDL_EDC_CTL_REVISION_RTL_MASK (0x0000F800U)

#define	SDL_EDC_CTL_REVISION_RTL_SHIFT (0x0000000BU)

#define	SDL_EDC_CTL_REVISION_RTL_RESETVAL (0x00000000U)

#define	SDL_EDC_CTL_REVISION_RTL_MAX (0x0000001FU)

#define	SDL_EDC_CTL_REVISION_MAJOR_MASK (0x00000700U)

#define	SDL_EDC_CTL_REVISION_MAJOR_SHIFT (0x00000008U)

#define	SDL_EDC_CTL_REVISION_MAJOR_RESETVAL (0x00000001U)

#define	SDL_EDC_CTL_REVISION_MAJOR_MAX (0x00000007U)

#define	SDL_EDC_CTL_REVISION_CUSTOM_MASK (0x000000C0U)

#define	SDL_EDC_CTL_REVISION_CUSTOM_SHIFT (0x00000006U)

#define	SDL_EDC_CTL_REVISION_CUSTOM_RESETVAL (0x00000001U)

#define	SDL_EDC_CTL_REVISION_CUSTOM_MAX (0x00000003U)

#define	SDL_EDC_CTL_REVISION_MINOR_MASK (0x0000003FU)

#define	SDL_EDC_CTL_REVISION_MINOR_SHIFT (0x00000000U)

#define	SDL_EDC_CTL_REVISION_MINOR_RESETVAL (0x00000000U)

#define	SDL_EDC_CTL_REVISION_MINOR_MAX (0x0000003FU)

#define	SDL_EDC_CTL_REVISION_RESETVAL (0x4F400140U)

#define	SDL_EDC_CTL_CONTROL_ECC_PATTERN_MASK (0x00000F00U)

#define	SDL_EDC_CTL_CONTROL_ECC_PATTERN_SHIFT (0x00000008U)

#define	SDL_EDC_CTL_CONTROL_ECC_PATTERN_RESETVAL (0x00000000U)

#define	SDL_EDC_CTL_CONTROL_ECC_PATTERN_MAX (0x0000000FU)

#define	SDL_EDC_CTL_CONTROL_ECC_PATTERN_VAL_ZEROS (0x0U)

#define	SDL_EDC_CTL_CONTROL_ECC_PATTERN_VAL_F (0x1U)

#define	SDL_EDC_CTL_CONTROL_ECC_PATTERN_VAL_A (0x2U)

#define	SDL_EDC_CTL_CONTROL_ECC_PATTERN_VAL_FIVE (0x3U)

#define	SDL_EDC_CTL_CONTROL_FORCE_N_BIT_MASK (0x00000020U)

#define	SDL_EDC_CTL_CONTROL_FORCE_N_BIT_SHIFT (0x00000005U)

#define	SDL_EDC_CTL_CONTROL_FORCE_N_BIT_RESETVAL (0x00000000U)

#define	SDL_EDC_CTL_CONTROL_FORCE_N_BIT_MAX (0x00000001U)

#define	SDL_EDC_CTL_CONTROL_FORCE_N_BIT_VAL_KEEP_CURR_SETTINGS (0x0U)

#define	SDL_EDC_CTL_CONTROL_FORCE_N_BIT_VAL_INC_TO_NEXT (0x1U)

#define	SDL_EDC_CTL_CONTROL_FORCE_DE_MASK (0x00000010U)

#define	SDL_EDC_CTL_CONTROL_FORCE_DE_SHIFT (0x00000004U)

#define	SDL_EDC_CTL_CONTROL_FORCE_DE_RESETVAL (0x00000000U)

#define	SDL_EDC_CTL_CONTROL_FORCE_DE_MAX (0x00000001U)

#define	SDL_EDC_CTL_CONTROL_FORCE_SE_MASK (0x00000008U)

#define	SDL_EDC_CTL_CONTROL_FORCE_SE_SHIFT (0x00000003U)

#define	SDL_EDC_CTL_CONTROL_FORCE_SE_RESETVAL (0x00000000U)

#define	SDL_EDC_CTL_CONTROL_FORCE_SE_MAX (0x00000001U)

#define	SDL_EDC_CTL_CONTROL_ECC_CHECK_MASK (0x00000002U)

#define	SDL_EDC_CTL_CONTROL_ECC_CHECK_SHIFT (0x00000001U)

#define	SDL_EDC_CTL_CONTROL_ECC_CHECK_RESETVAL (0x00000001U)

#define	SDL_EDC_CTL_CONTROL_ECC_CHECK_MAX (0x00000001U)

#define	SDL_EDC_CTL_CONTROL_ECC_CHECK_VAL_DISABLE (0x0U)

#define	SDL_EDC_CTL_CONTROL_ECC_CHECK_VAL_ENABLE (0x1U)

#define	SDL_EDC_CTL_CONTROL_RESETVAL (0x00000002U)

#define	SDL_EDC_CTL_ERR_INJECT1_ECC_BIT1_MASK (0x01FF0000U)

#define	SDL_EDC_CTL_ERR_INJECT1_ECC_BIT1_SHIFT (0x00000010U)

#define	SDL_EDC_CTL_ERR_INJECT1_ECC_BIT1_RESETVAL (0x00000000U)

#define	SDL_EDC_CTL_ERR_INJECT1_ECC_BIT1_MAX (0x000001FFU)

#define	SDL_EDC_CTL_ERR_INJECT1_ECC_GRP_MASK (0x0000FFFFU)

#define	SDL_EDC_CTL_ERR_INJECT1_ECC_GRP_SHIFT (0x00000000U)

#define	SDL_EDC_CTL_ERR_INJECT1_ECC_GRP_RESETVAL (0x00000000U)

#define	SDL_EDC_CTL_ERR_INJECT1_ECC_GRP_MAX (0x0000FFFFU)

#define	SDL_EDC_CTL_ERR_INJECT1_RESETVAL (0x00000000U)

#define	SDL_EDC_CTL_ERR_INJECT2_ECC_BIT2_MASK (0x000001FFU)

#define	SDL_EDC_CTL_ERR_INJECT2_ECC_BIT2_SHIFT (0x00000000U)

#define	SDL_EDC_CTL_ERR_INJECT2_ECC_BIT2_RESETVAL (0x00000000U)

#define	SDL_EDC_CTL_ERR_INJECT2_ECC_BIT2_MAX (0x000001FFU)

#define	SDL_EDC_CTL_ERR_INJECT2_RESETVAL (0x00000000U)

#define	SDL_EDC_CTL_ERR_STATUS1_ERR_GRP_MASK (0xFFFF0000U)

#define	SDL_EDC_CTL_ERR_STATUS1_ERR_GRP_SHIFT (0x00000010U)

#define	SDL_EDC_CTL_ERR_STATUS1_ERR_GRP_RESETVAL (0x00000000U)

#define	SDL_EDC_CTL_ERR_STATUS1_ERR_GRP_MAX (0x0000FFFFU)

#define	SDL_EDC_CTL_ERR_STATUS1_INJ_UNC_PEND_CLR_MASK (0x0000C000U)

#define	SDL_EDC_CTL_ERR_STATUS1_INJ_UNC_PEND_CLR_SHIFT (0x0000000EU)

#define	SDL_EDC_CTL_ERR_STATUS1_INJ_UNC_PEND_CLR_RESETVAL (0x00000000U)

#define	SDL_EDC_CTL_ERR_STATUS1_INJ_UNC_PEND_CLR_MAX (0x00000003U)

#define	SDL_EDC_CTL_ERR_STATUS1_INJ_COR_PEND_CLR_MASK (0x00003000U)

#define	SDL_EDC_CTL_ERR_STATUS1_INJ_COR_PEND_CLR_SHIFT (0x0000000CU)

#define	SDL_EDC_CTL_ERR_STATUS1_INJ_COR_PEND_CLR_RESETVAL (0x00000000U)

#define	SDL_EDC_CTL_ERR_STATUS1_INJ_COR_PEND_CLR_MAX (0x00000003U)

#define	SDL_EDC_CTL_ERR_STATUS1_UNC_PEND_CLR_MASK (0x00000C00U)

#define	SDL_EDC_CTL_ERR_STATUS1_UNC_PEND_CLR_SHIFT (0x0000000AU)

#define	SDL_EDC_CTL_ERR_STATUS1_UNC_PEND_CLR_RESETVAL (0x00000000U)

#define	SDL_EDC_CTL_ERR_STATUS1_UNC_PEND_CLR_MAX (0x00000003U)

#define	SDL_EDC_CTL_ERR_STATUS1_COR_PEND_CLR_MASK (0x00000300U)

#define	SDL_EDC_CTL_ERR_STATUS1_COR_PEND_CLR_SHIFT (0x00000008U)

#define	SDL_EDC_CTL_ERR_STATUS1_COR_PEND_CLR_RESETVAL (0x00000000U)

#define	SDL_EDC_CTL_ERR_STATUS1_COR_PEND_CLR_MAX (0x00000003U)

#define	SDL_EDC_CTL_ERR_STATUS1_INJ_UNC_PEND_MASK (0x000000C0U)

#define	SDL_EDC_CTL_ERR_STATUS1_INJ_UNC_PEND_SHIFT (0x00000006U)

#define	SDL_EDC_CTL_ERR_STATUS1_INJ_UNC_PEND_RESETVAL (0x00000000U)

#define	SDL_EDC_CTL_ERR_STATUS1_INJ_UNC_PEND_MAX (0x00000003U)

#define	SDL_EDC_CTL_ERR_STATUS1_INJ_COR_PEND_MASK (0x00000030U)

#define	SDL_EDC_CTL_ERR_STATUS1_INJ_COR_PEND_SHIFT (0x00000004U)

#define	SDL_EDC_CTL_ERR_STATUS1_INJ_COR_PEND_RESETVAL (0x00000000U)

#define	SDL_EDC_CTL_ERR_STATUS1_INJ_COR_PEND_MAX (0x00000003U)

#define	SDL_EDC_CTL_ERR_STATUS1_UNC_PEND_MASK (0x0000000CU)

#define	SDL_EDC_CTL_ERR_STATUS1_UNC_PEND_SHIFT (0x00000002U)

#define	SDL_EDC_CTL_ERR_STATUS1_UNC_PEND_RESETVAL (0x00000000U)

#define	SDL_EDC_CTL_ERR_STATUS1_UNC_PEND_MAX (0x00000003U)

#define	SDL_EDC_CTL_ERR_STATUS1_COR_PEND_MASK (0x00000003U)

#define	SDL_EDC_CTL_ERR_STATUS1_COR_PEND_SHIFT (0x00000000U)

#define	SDL_EDC_CTL_ERR_STATUS1_COR_PEND_RESETVAL (0x00000000U)

#define	SDL_EDC_CTL_ERR_STATUS1_COR_PEND_MAX (0x00000003U)

#define	SDL_EDC_CTL_ERR_STATUS1_RESETVAL (0x00000000U)

#define	SDL_EDC_CTL_ERR_STATUS2_ERR_TYPE_MASK (0xFFFF0000U)

#define	SDL_EDC_CTL_ERR_STATUS2_ERR_TYPE_SHIFT (0x00000010U)

#define	SDL_EDC_CTL_ERR_STATUS2_ERR_TYPE_RESETVAL (0x00000000U)

#define	SDL_EDC_CTL_ERR_STATUS2_ERR_TYPE_MAX (0x0000FFFFU)

#define	SDL_EDC_CTL_ERR_STATUS2_ERR_BIT_MASK (0x0000FFFFU)

#define	SDL_EDC_CTL_ERR_STATUS2_ERR_BIT_SHIFT (0x00000000U)

#define	SDL_EDC_CTL_ERR_STATUS2_ERR_BIT_RESETVAL (0x00000000U)

#define	SDL_EDC_CTL_ERR_STATUS2_ERR_BIT_MAX (0x0000FFFFU)

#define	SDL_EDC_CTL_ERR_STATUS2_RESETVAL (0x00000000U)

Macro Definition Documentation

◆ SDL_EDC_CTL_REVISION

#define SDL_EDC_CTL_REVISION (0x00000010U)

◆ SDL_EDC_CTL_CONTROL

#define SDL_EDC_CTL_CONTROL (0x00000014U)

◆ SDL_EDC_CTL_ERR_INJECT1

#define SDL_EDC_CTL_ERR_INJECT1 (0x00000018U)

◆ SDL_EDC_CTL_ERR_INJECT2

#define SDL_EDC_CTL_ERR_INJECT2 (0x0000001CU)

◆ SDL_EDC_CTL_ERR_STATUS1

#define SDL_EDC_CTL_ERR_STATUS1 (0x00000020U)

◆ SDL_EDC_CTL_ERR_STATUS2

#define SDL_EDC_CTL_ERR_STATUS2 (0x00000024U)

◆ SDL_EDC_CTL_REVISION_SCHEME_MASK

#define SDL_EDC_CTL_REVISION_SCHEME_MASK (0xC0000000U)

◆ SDL_EDC_CTL_REVISION_SCHEME_SHIFT

#define SDL_EDC_CTL_REVISION_SCHEME_SHIFT (0x0000001EU)

◆ SDL_EDC_CTL_REVISION_SCHEME_RESETVAL

#define SDL_EDC_CTL_REVISION_SCHEME_RESETVAL (0x00000001U)

◆ SDL_EDC_CTL_REVISION_SCHEME_MAX

#define SDL_EDC_CTL_REVISION_SCHEME_MAX (0x00000003U)

◆ SDL_EDC_CTL_REVISION_FUNC_MASK

#define SDL_EDC_CTL_REVISION_FUNC_MASK (0x0FFF0000U)

◆ SDL_EDC_CTL_REVISION_FUNC_SHIFT

#define SDL_EDC_CTL_REVISION_FUNC_SHIFT (0x00000010U)

◆ SDL_EDC_CTL_REVISION_FUNC_RESETVAL

#define SDL_EDC_CTL_REVISION_FUNC_RESETVAL (0x00000F40U)

◆ SDL_EDC_CTL_REVISION_FUNC_MAX

#define SDL_EDC_CTL_REVISION_FUNC_MAX (0x00000FFFU)

◆ SDL_EDC_CTL_REVISION_RTL_MASK

#define SDL_EDC_CTL_REVISION_RTL_MASK (0x0000F800U)

◆ SDL_EDC_CTL_REVISION_RTL_SHIFT

#define SDL_EDC_CTL_REVISION_RTL_SHIFT (0x0000000BU)

◆ SDL_EDC_CTL_REVISION_RTL_RESETVAL

#define SDL_EDC_CTL_REVISION_RTL_RESETVAL (0x00000000U)

◆ SDL_EDC_CTL_REVISION_RTL_MAX

#define SDL_EDC_CTL_REVISION_RTL_MAX (0x0000001FU)

◆ SDL_EDC_CTL_REVISION_MAJOR_MASK

#define SDL_EDC_CTL_REVISION_MAJOR_MASK (0x00000700U)

◆ SDL_EDC_CTL_REVISION_MAJOR_SHIFT

#define SDL_EDC_CTL_REVISION_MAJOR_SHIFT (0x00000008U)

◆ SDL_EDC_CTL_REVISION_MAJOR_RESETVAL

#define SDL_EDC_CTL_REVISION_MAJOR_RESETVAL (0x00000001U)

◆ SDL_EDC_CTL_REVISION_MAJOR_MAX

#define SDL_EDC_CTL_REVISION_MAJOR_MAX (0x00000007U)

◆ SDL_EDC_CTL_REVISION_CUSTOM_MASK

#define SDL_EDC_CTL_REVISION_CUSTOM_MASK (0x000000C0U)

◆ SDL_EDC_CTL_REVISION_CUSTOM_SHIFT

#define SDL_EDC_CTL_REVISION_CUSTOM_SHIFT (0x00000006U)

◆ SDL_EDC_CTL_REVISION_CUSTOM_RESETVAL

#define SDL_EDC_CTL_REVISION_CUSTOM_RESETVAL (0x00000001U)

◆ SDL_EDC_CTL_REVISION_CUSTOM_MAX

#define SDL_EDC_CTL_REVISION_CUSTOM_MAX (0x00000003U)

◆ SDL_EDC_CTL_REVISION_MINOR_MASK

#define SDL_EDC_CTL_REVISION_MINOR_MASK (0x0000003FU)

◆ SDL_EDC_CTL_REVISION_MINOR_SHIFT

#define SDL_EDC_CTL_REVISION_MINOR_SHIFT (0x00000000U)

◆ SDL_EDC_CTL_REVISION_MINOR_RESETVAL

#define SDL_EDC_CTL_REVISION_MINOR_RESETVAL (0x00000000U)

◆ SDL_EDC_CTL_REVISION_MINOR_MAX

#define SDL_EDC_CTL_REVISION_MINOR_MAX (0x0000003FU)

◆ SDL_EDC_CTL_REVISION_RESETVAL

#define SDL_EDC_CTL_REVISION_RESETVAL (0x4F400140U)

◆ SDL_EDC_CTL_CONTROL_ECC_PATTERN_MASK

#define SDL_EDC_CTL_CONTROL_ECC_PATTERN_MASK (0x00000F00U)

◆ SDL_EDC_CTL_CONTROL_ECC_PATTERN_SHIFT

#define SDL_EDC_CTL_CONTROL_ECC_PATTERN_SHIFT (0x00000008U)

◆ SDL_EDC_CTL_CONTROL_ECC_PATTERN_RESETVAL

#define SDL_EDC_CTL_CONTROL_ECC_PATTERN_RESETVAL (0x00000000U)

◆ SDL_EDC_CTL_CONTROL_ECC_PATTERN_MAX

#define SDL_EDC_CTL_CONTROL_ECC_PATTERN_MAX (0x0000000FU)

◆ SDL_EDC_CTL_CONTROL_ECC_PATTERN_VAL_ZEROS

#define SDL_EDC_CTL_CONTROL_ECC_PATTERN_VAL_ZEROS (0x0U)

◆ SDL_EDC_CTL_CONTROL_ECC_PATTERN_VAL_F

#define SDL_EDC_CTL_CONTROL_ECC_PATTERN_VAL_F (0x1U)

◆ SDL_EDC_CTL_CONTROL_ECC_PATTERN_VAL_A

#define SDL_EDC_CTL_CONTROL_ECC_PATTERN_VAL_A (0x2U)

◆ SDL_EDC_CTL_CONTROL_ECC_PATTERN_VAL_FIVE

#define SDL_EDC_CTL_CONTROL_ECC_PATTERN_VAL_FIVE (0x3U)

◆ SDL_EDC_CTL_CONTROL_FORCE_N_BIT_MASK

#define SDL_EDC_CTL_CONTROL_FORCE_N_BIT_MASK (0x00000020U)

◆ SDL_EDC_CTL_CONTROL_FORCE_N_BIT_SHIFT

#define SDL_EDC_CTL_CONTROL_FORCE_N_BIT_SHIFT (0x00000005U)

◆ SDL_EDC_CTL_CONTROL_FORCE_N_BIT_RESETVAL

#define SDL_EDC_CTL_CONTROL_FORCE_N_BIT_RESETVAL (0x00000000U)

◆ SDL_EDC_CTL_CONTROL_FORCE_N_BIT_MAX

#define SDL_EDC_CTL_CONTROL_FORCE_N_BIT_MAX (0x00000001U)

◆ SDL_EDC_CTL_CONTROL_FORCE_N_BIT_VAL_KEEP_CURR_SETTINGS

#define SDL_EDC_CTL_CONTROL_FORCE_N_BIT_VAL_KEEP_CURR_SETTINGS (0x0U)

◆ SDL_EDC_CTL_CONTROL_FORCE_N_BIT_VAL_INC_TO_NEXT

#define SDL_EDC_CTL_CONTROL_FORCE_N_BIT_VAL_INC_TO_NEXT (0x1U)

◆ SDL_EDC_CTL_CONTROL_FORCE_DE_MASK

#define SDL_EDC_CTL_CONTROL_FORCE_DE_MASK (0x00000010U)

◆ SDL_EDC_CTL_CONTROL_FORCE_DE_SHIFT

#define SDL_EDC_CTL_CONTROL_FORCE_DE_SHIFT (0x00000004U)

◆ SDL_EDC_CTL_CONTROL_FORCE_DE_RESETVAL

#define SDL_EDC_CTL_CONTROL_FORCE_DE_RESETVAL (0x00000000U)

◆ SDL_EDC_CTL_CONTROL_FORCE_DE_MAX

#define SDL_EDC_CTL_CONTROL_FORCE_DE_MAX (0x00000001U)

◆ SDL_EDC_CTL_CONTROL_FORCE_SE_MASK

#define SDL_EDC_CTL_CONTROL_FORCE_SE_MASK (0x00000008U)

◆ SDL_EDC_CTL_CONTROL_FORCE_SE_SHIFT

#define SDL_EDC_CTL_CONTROL_FORCE_SE_SHIFT (0x00000003U)

◆ SDL_EDC_CTL_CONTROL_FORCE_SE_RESETVAL

#define SDL_EDC_CTL_CONTROL_FORCE_SE_RESETVAL (0x00000000U)

◆ SDL_EDC_CTL_CONTROL_FORCE_SE_MAX

#define SDL_EDC_CTL_CONTROL_FORCE_SE_MAX (0x00000001U)

◆ SDL_EDC_CTL_CONTROL_ECC_CHECK_MASK

#define SDL_EDC_CTL_CONTROL_ECC_CHECK_MASK (0x00000002U)

◆ SDL_EDC_CTL_CONTROL_ECC_CHECK_SHIFT

#define SDL_EDC_CTL_CONTROL_ECC_CHECK_SHIFT (0x00000001U)

◆ SDL_EDC_CTL_CONTROL_ECC_CHECK_RESETVAL

#define SDL_EDC_CTL_CONTROL_ECC_CHECK_RESETVAL (0x00000001U)

◆ SDL_EDC_CTL_CONTROL_ECC_CHECK_MAX

#define SDL_EDC_CTL_CONTROL_ECC_CHECK_MAX (0x00000001U)

◆ SDL_EDC_CTL_CONTROL_ECC_CHECK_VAL_DISABLE

#define SDL_EDC_CTL_CONTROL_ECC_CHECK_VAL_DISABLE (0x0U)

◆ SDL_EDC_CTL_CONTROL_ECC_CHECK_VAL_ENABLE

#define SDL_EDC_CTL_CONTROL_ECC_CHECK_VAL_ENABLE (0x1U)

◆ SDL_EDC_CTL_CONTROL_RESETVAL

#define SDL_EDC_CTL_CONTROL_RESETVAL (0x00000002U)

◆ SDL_EDC_CTL_ERR_INJECT1_ECC_BIT1_MASK

#define SDL_EDC_CTL_ERR_INJECT1_ECC_BIT1_MASK (0x01FF0000U)

◆ SDL_EDC_CTL_ERR_INJECT1_ECC_BIT1_SHIFT

#define SDL_EDC_CTL_ERR_INJECT1_ECC_BIT1_SHIFT (0x00000010U)

◆ SDL_EDC_CTL_ERR_INJECT1_ECC_BIT1_RESETVAL

#define SDL_EDC_CTL_ERR_INJECT1_ECC_BIT1_RESETVAL (0x00000000U)

◆ SDL_EDC_CTL_ERR_INJECT1_ECC_BIT1_MAX

#define SDL_EDC_CTL_ERR_INJECT1_ECC_BIT1_MAX (0x000001FFU)

◆ SDL_EDC_CTL_ERR_INJECT1_ECC_GRP_MASK

#define SDL_EDC_CTL_ERR_INJECT1_ECC_GRP_MASK (0x0000FFFFU)

◆ SDL_EDC_CTL_ERR_INJECT1_ECC_GRP_SHIFT

#define SDL_EDC_CTL_ERR_INJECT1_ECC_GRP_SHIFT (0x00000000U)

◆ SDL_EDC_CTL_ERR_INJECT1_ECC_GRP_RESETVAL

#define SDL_EDC_CTL_ERR_INJECT1_ECC_GRP_RESETVAL (0x00000000U)

◆ SDL_EDC_CTL_ERR_INJECT1_ECC_GRP_MAX

#define SDL_EDC_CTL_ERR_INJECT1_ECC_GRP_MAX (0x0000FFFFU)

◆ SDL_EDC_CTL_ERR_INJECT1_RESETVAL

#define SDL_EDC_CTL_ERR_INJECT1_RESETVAL (0x00000000U)

◆ SDL_EDC_CTL_ERR_INJECT2_ECC_BIT2_MASK

#define SDL_EDC_CTL_ERR_INJECT2_ECC_BIT2_MASK (0x000001FFU)

◆ SDL_EDC_CTL_ERR_INJECT2_ECC_BIT2_SHIFT

#define SDL_EDC_CTL_ERR_INJECT2_ECC_BIT2_SHIFT (0x00000000U)

◆ SDL_EDC_CTL_ERR_INJECT2_ECC_BIT2_RESETVAL

#define SDL_EDC_CTL_ERR_INJECT2_ECC_BIT2_RESETVAL (0x00000000U)

◆ SDL_EDC_CTL_ERR_INJECT2_ECC_BIT2_MAX

#define SDL_EDC_CTL_ERR_INJECT2_ECC_BIT2_MAX (0x000001FFU)

◆ SDL_EDC_CTL_ERR_INJECT2_RESETVAL

#define SDL_EDC_CTL_ERR_INJECT2_RESETVAL (0x00000000U)

◆ SDL_EDC_CTL_ERR_STATUS1_ERR_GRP_MASK

#define SDL_EDC_CTL_ERR_STATUS1_ERR_GRP_MASK (0xFFFF0000U)

◆ SDL_EDC_CTL_ERR_STATUS1_ERR_GRP_SHIFT

#define SDL_EDC_CTL_ERR_STATUS1_ERR_GRP_SHIFT (0x00000010U)

◆ SDL_EDC_CTL_ERR_STATUS1_ERR_GRP_RESETVAL

#define SDL_EDC_CTL_ERR_STATUS1_ERR_GRP_RESETVAL (0x00000000U)

◆ SDL_EDC_CTL_ERR_STATUS1_ERR_GRP_MAX

#define SDL_EDC_CTL_ERR_STATUS1_ERR_GRP_MAX (0x0000FFFFU)

◆ SDL_EDC_CTL_ERR_STATUS1_INJ_UNC_PEND_CLR_MASK

#define SDL_EDC_CTL_ERR_STATUS1_INJ_UNC_PEND_CLR_MASK (0x0000C000U)

◆ SDL_EDC_CTL_ERR_STATUS1_INJ_UNC_PEND_CLR_SHIFT

#define SDL_EDC_CTL_ERR_STATUS1_INJ_UNC_PEND_CLR_SHIFT (0x0000000EU)

◆ SDL_EDC_CTL_ERR_STATUS1_INJ_UNC_PEND_CLR_RESETVAL

#define SDL_EDC_CTL_ERR_STATUS1_INJ_UNC_PEND_CLR_RESETVAL (0x00000000U)

◆ SDL_EDC_CTL_ERR_STATUS1_INJ_UNC_PEND_CLR_MAX

#define SDL_EDC_CTL_ERR_STATUS1_INJ_UNC_PEND_CLR_MAX (0x00000003U)

◆ SDL_EDC_CTL_ERR_STATUS1_INJ_COR_PEND_CLR_MASK

#define SDL_EDC_CTL_ERR_STATUS1_INJ_COR_PEND_CLR_MASK (0x00003000U)

◆ SDL_EDC_CTL_ERR_STATUS1_INJ_COR_PEND_CLR_SHIFT

#define SDL_EDC_CTL_ERR_STATUS1_INJ_COR_PEND_CLR_SHIFT (0x0000000CU)

◆ SDL_EDC_CTL_ERR_STATUS1_INJ_COR_PEND_CLR_RESETVAL

#define SDL_EDC_CTL_ERR_STATUS1_INJ_COR_PEND_CLR_RESETVAL (0x00000000U)

◆ SDL_EDC_CTL_ERR_STATUS1_INJ_COR_PEND_CLR_MAX

#define SDL_EDC_CTL_ERR_STATUS1_INJ_COR_PEND_CLR_MAX (0x00000003U)

◆ SDL_EDC_CTL_ERR_STATUS1_UNC_PEND_CLR_MASK

#define SDL_EDC_CTL_ERR_STATUS1_UNC_PEND_CLR_MASK (0x00000C00U)

◆ SDL_EDC_CTL_ERR_STATUS1_UNC_PEND_CLR_SHIFT

#define SDL_EDC_CTL_ERR_STATUS1_UNC_PEND_CLR_SHIFT (0x0000000AU)

◆ SDL_EDC_CTL_ERR_STATUS1_UNC_PEND_CLR_RESETVAL

#define SDL_EDC_CTL_ERR_STATUS1_UNC_PEND_CLR_RESETVAL (0x00000000U)

◆ SDL_EDC_CTL_ERR_STATUS1_UNC_PEND_CLR_MAX

#define SDL_EDC_CTL_ERR_STATUS1_UNC_PEND_CLR_MAX (0x00000003U)

◆ SDL_EDC_CTL_ERR_STATUS1_COR_PEND_CLR_MASK

#define SDL_EDC_CTL_ERR_STATUS1_COR_PEND_CLR_MASK (0x00000300U)

◆ SDL_EDC_CTL_ERR_STATUS1_COR_PEND_CLR_SHIFT

#define SDL_EDC_CTL_ERR_STATUS1_COR_PEND_CLR_SHIFT (0x00000008U)

◆ SDL_EDC_CTL_ERR_STATUS1_COR_PEND_CLR_RESETVAL

#define SDL_EDC_CTL_ERR_STATUS1_COR_PEND_CLR_RESETVAL (0x00000000U)

◆ SDL_EDC_CTL_ERR_STATUS1_COR_PEND_CLR_MAX

#define SDL_EDC_CTL_ERR_STATUS1_COR_PEND_CLR_MAX (0x00000003U)

◆ SDL_EDC_CTL_ERR_STATUS1_INJ_UNC_PEND_MASK

#define SDL_EDC_CTL_ERR_STATUS1_INJ_UNC_PEND_MASK (0x000000C0U)

◆ SDL_EDC_CTL_ERR_STATUS1_INJ_UNC_PEND_SHIFT

#define SDL_EDC_CTL_ERR_STATUS1_INJ_UNC_PEND_SHIFT (0x00000006U)

◆ SDL_EDC_CTL_ERR_STATUS1_INJ_UNC_PEND_RESETVAL

#define SDL_EDC_CTL_ERR_STATUS1_INJ_UNC_PEND_RESETVAL (0x00000000U)

◆ SDL_EDC_CTL_ERR_STATUS1_INJ_UNC_PEND_MAX

#define SDL_EDC_CTL_ERR_STATUS1_INJ_UNC_PEND_MAX (0x00000003U)

◆ SDL_EDC_CTL_ERR_STATUS1_INJ_COR_PEND_MASK

#define SDL_EDC_CTL_ERR_STATUS1_INJ_COR_PEND_MASK (0x00000030U)

◆ SDL_EDC_CTL_ERR_STATUS1_INJ_COR_PEND_SHIFT

#define SDL_EDC_CTL_ERR_STATUS1_INJ_COR_PEND_SHIFT (0x00000004U)

◆ SDL_EDC_CTL_ERR_STATUS1_INJ_COR_PEND_RESETVAL

#define SDL_EDC_CTL_ERR_STATUS1_INJ_COR_PEND_RESETVAL (0x00000000U)

◆ SDL_EDC_CTL_ERR_STATUS1_INJ_COR_PEND_MAX

#define SDL_EDC_CTL_ERR_STATUS1_INJ_COR_PEND_MAX (0x00000003U)

◆ SDL_EDC_CTL_ERR_STATUS1_UNC_PEND_MASK

#define SDL_EDC_CTL_ERR_STATUS1_UNC_PEND_MASK (0x0000000CU)

◆ SDL_EDC_CTL_ERR_STATUS1_UNC_PEND_SHIFT

#define SDL_EDC_CTL_ERR_STATUS1_UNC_PEND_SHIFT (0x00000002U)

◆ SDL_EDC_CTL_ERR_STATUS1_UNC_PEND_RESETVAL

#define SDL_EDC_CTL_ERR_STATUS1_UNC_PEND_RESETVAL (0x00000000U)

◆ SDL_EDC_CTL_ERR_STATUS1_UNC_PEND_MAX

#define SDL_EDC_CTL_ERR_STATUS1_UNC_PEND_MAX (0x00000003U)

◆ SDL_EDC_CTL_ERR_STATUS1_COR_PEND_MASK

#define SDL_EDC_CTL_ERR_STATUS1_COR_PEND_MASK (0x00000003U)

◆ SDL_EDC_CTL_ERR_STATUS1_COR_PEND_SHIFT

#define SDL_EDC_CTL_ERR_STATUS1_COR_PEND_SHIFT (0x00000000U)

◆ SDL_EDC_CTL_ERR_STATUS1_COR_PEND_RESETVAL

#define SDL_EDC_CTL_ERR_STATUS1_COR_PEND_RESETVAL (0x00000000U)

◆ SDL_EDC_CTL_ERR_STATUS1_COR_PEND_MAX

#define SDL_EDC_CTL_ERR_STATUS1_COR_PEND_MAX (0x00000003U)

◆ SDL_EDC_CTL_ERR_STATUS1_RESETVAL

#define SDL_EDC_CTL_ERR_STATUS1_RESETVAL (0x00000000U)

◆ SDL_EDC_CTL_ERR_STATUS2_ERR_TYPE_MASK

#define SDL_EDC_CTL_ERR_STATUS2_ERR_TYPE_MASK (0xFFFF0000U)

◆ SDL_EDC_CTL_ERR_STATUS2_ERR_TYPE_SHIFT

#define SDL_EDC_CTL_ERR_STATUS2_ERR_TYPE_SHIFT (0x00000010U)

◆ SDL_EDC_CTL_ERR_STATUS2_ERR_TYPE_RESETVAL

#define SDL_EDC_CTL_ERR_STATUS2_ERR_TYPE_RESETVAL (0x00000000U)

◆ SDL_EDC_CTL_ERR_STATUS2_ERR_TYPE_MAX

#define SDL_EDC_CTL_ERR_STATUS2_ERR_TYPE_MAX (0x0000FFFFU)

◆ SDL_EDC_CTL_ERR_STATUS2_ERR_BIT_MASK

#define SDL_EDC_CTL_ERR_STATUS2_ERR_BIT_MASK (0x0000FFFFU)

◆ SDL_EDC_CTL_ERR_STATUS2_ERR_BIT_SHIFT

#define SDL_EDC_CTL_ERR_STATUS2_ERR_BIT_SHIFT (0x00000000U)

◆ SDL_EDC_CTL_ERR_STATUS2_ERR_BIT_RESETVAL

#define SDL_EDC_CTL_ERR_STATUS2_ERR_BIT_RESETVAL (0x00000000U)

◆ SDL_EDC_CTL_ERR_STATUS2_ERR_BIT_MAX

#define SDL_EDC_CTL_ERR_STATUS2_ERR_BIT_MAX (0x0000FFFFU)

◆ SDL_EDC_CTL_ERR_STATUS2_RESETVAL

#define SDL_EDC_CTL_ERR_STATUS2_RESETVAL (0x00000000U)

Data Structures

Macros