Introduction

Header file containing various enumerations, structure definitions and function

declarations for the ARM R5 MPU IP.

Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met:

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R5 MPU region size
This enumerator defines the possible MPU region sizes
#define	SDL_ARM_R5_MPU_REGION_SIZE_32B (4U)

#define	SDL_ARM_R5_MPU_REGION_SIZE_64B (5U)

#define	SDL_ARM_R5_MPU_REGION_SIZE_128B (6U)

#define	SDL_ARM_R5_MPU_REGION_SIZE_256B (7U)

#define	SDL_ARM_R5_MPU_REGION_SIZE_512B (8U)

#define	SDL_ARM_R5_MPU_REGION_SIZE_1KB (9U)

#define	SDL_ARM_R5_MPU_REGION_SIZE_2KB (10U)

#define	SDL_ARM_R5_MPU_REGION_SIZE_4KB (11U)

#define	SDL_ARM_R5_MPU_REGION_SIZE_8KB (12U)

#define	SDL_ARM_R5_MPU_REGION_SIZE_16KB (13U)

#define	SDL_ARM_R5_MPU_REGION_SIZE_32KB (14U)

#define	SDL_ARM_R5_MPU_REGION_SIZE_64KB (15U)

#define	SDL_ARM_R5_MPU_REGION_SIZE_128KB (16U)

#define	SDL_ARM_R5_MPU_REGION_SIZE_256KB (17U)

#define	SDL_ARM_R5_MPU_REGION_SIZE_512KB (18U)

#define	SDL_ARM_R5_MPU_REGION_SIZE_1MB (19U)

#define	SDL_ARM_R5_MPU_REGION_SIZE_2MB (20U)

#define	SDL_ARM_R5_MPU_REGION_SIZE_4MB (21U)

#define	SDL_ARM_R5_MPU_REGION_SIZE_8MB (22U)

#define	SDL_ARM_R5_MPU_REGION_SIZE_16MB (23U)

#define	SDL_ARM_R5_MPU_REGION_SIZE_32MB (24U)

#define	SDL_ARM_R5_MPU_REGION_SIZE_64MB (25U)

#define	SDL_ARM_R5_MPU_REGION_SIZE_128MB (26U)

#define	SDL_ARM_R5_MPU_REGION_SIZE_256MB (27U)

#define	SDL_ARM_R5_MPU_REGION_SIZE_512MB (28U)

#define	SDL_ARM_R5_MPU_REGION_SIZE_1GB (29U)

#define	SDL_ARM_R5_MPU_REGION_SIZE_2GB (30U)

#define	SDL_ARM_R5_MPU_REGION_SIZE_4GB (31U)

typedef uint32_t	SDL_ArmR5MpuRegionSize
	MPU region sizes supported. More...

Data Structures
struct	SDL_ArmR5MpuRegionCfg
	Structure containing the region configuration parameters. If application wants to do it's own MPU region configuration (override the default one), then it needs to define this variable and initialize that to desired values: Var: 'const SDL_ArmR5MpuRegionCfg gSdlR5MpuCfg[SDL_ARM_R5F_MPU_REGIONS_MAX]' With above application can have it's own MPU configuration, but MPU configuration will still happen at boot/startup time. Default configurations for MPU regions is present under file: "\src\startup\startup.c". More...

struct	SDL_MPU_staticRegs
	MPU Static Registers structure. More...

Macros
#define	SDL_ARM_R5_MPU_REGION_BASE_ADDR_MASK (0xFFFFFFFEU)

#define	SDL_ARM_R5_MPU_REGION_BASE_ADDR_SHIFT (0x00000005U)

#define	SDL_ARM_R5_MPU_REGION_BASE_ADDR_RESETVAL (0x00000000U)

#define	SDL_ARM_R5_MPU_REGION_BASE_ADDR_MAX (0x07FFFFFFU)

#define	SDL_ARM_R5_MPU_REGION_SZEN_EN_MASK (0x00000001U)

#define	SDL_ARM_R5_MPU_REGION_SZEN_EN_SHIFT (0x00000000U)

#define	SDL_ARM_R5_MPU_REGION_SZEN_EN_RESETVAL (0x00000000U)

#define	SDL_ARM_R5_MPU_REGION_SZEN_EN_MAX (0x00000001U)

#define	SDL_ARM_R5_MPU_REGION_SZEN_SZ_MASK (0x00000037U)

#define	SDL_ARM_R5_MPU_REGION_SZEN_SZ_SHIFT (0x00000001U)

#define	SDL_ARM_R5_MPU_REGION_SZEN_SZ_RESETVAL (0x00000000U)

#define	SDL_ARM_R5_MPU_REGION_SZEN_SZ_MAX (0x0000001FU)

#define	SDL_ARM_R5_MPU_REGION_SZEN_SRD_MASK (0x0000FF00U)

#define	SDL_ARM_R5_MPU_REGION_SZEN_SRD_SHIFT (0x00000008U)

#define	SDL_ARM_R5_MPU_REGION_SZEN_SRD_RESETVAL (0x00000000U)

#define	SDL_ARM_R5_MPU_REGION_SZEN_SRD_MAX (0x000000FFU)

#define	SDL_ARM_R5_MPU_REGION_AC_B_MASK (0x00000001U)

#define	SDL_ARM_R5_MPU_REGION_AC_B_SHIFT (0x00000000U)

#define	SDL_ARM_R5_MPU_REGION_AC_B_RESETVAL (0x00000000U)

#define	SDL_ARM_R5_MPU_REGION_AC_B_MAX (0x00000001U)

#define	SDL_ARM_R5_MPU_REGION_AC_CB_MASK (0x00000003U)

#define	SDL_ARM_R5_MPU_REGION_AC_CB_SHIFT (0x00000000U)

#define	SDL_ARM_R5_MPU_REGION_AC_CB_RESETVAL (0x00000000U)

#define	SDL_ARM_R5_MPU_REGION_AC_C_MASK (0x00000002U)

#define	SDL_ARM_R5_MPU_REGION_AC_C_SHIFT (0x00000001U)

#define	SDL_ARM_R5_MPU_REGION_AC_C_RESETVAL (0x00000000U)

#define	SDL_ARM_R5_MPU_REGION_AC_C_MAX (0x00000001U)

#define	SDL_ARM_R5_MPU_REGION_AC_S_MASK (0x00000004U)

#define	SDL_ARM_R5_MPU_REGION_AC_S_SHIFT (0x00000002U)

#define	SDL_ARM_R5_MPU_REGION_AC_S_RESETVAL (0x00000000U)

#define	SDL_ARM_R5_MPU_REGION_AC_S_MAX (0x00000001U)

#define	SDL_ARM_R5_MPU_REGION_AC_TEX_MASK (0x00000038U)

#define	SDL_ARM_R5_MPU_REGION_AC_TEX_SHIFT (0x00000003U)

#define	SDL_ARM_R5_MPU_REGION_AC_TEX_RESETVAL (0x00000000U)

#define	SDL_ARM_R5_MPU_REGION_AC_TEX_MAX (0x00000007U)

#define	SDL_ARM_R5_MPU_REGION_AC_AP_MASK (0x00000700U)

#define	SDL_ARM_R5_MPU_REGION_AC_AP_SHIFT (0x00000008U)

#define	SDL_ARM_R5_MPU_REGION_AC_AP_RESETVAL (0x00000000U)

#define	SDL_ARM_R5_MPU_REGION_AC_AP_MAX (0x00000007U)

#define	SDL_ARM_R5_MPU_REGION_AC_AP_VAL_NO_ACCESS (0U)

#define	SDL_ARM_R5_MPU_REGION_AC_AP_VAL_RW (3U)

#define	SDL_ARM_R5_MPU_REGION_AC_AP_VAL_RO (6U)

#define	SDL_ARM_R5_MPU_REGION_AC_XN_MASK (0x00001000U)

#define	SDL_ARM_R5_MPU_REGION_AC_XN_SHIFT (0x0000000CU)

#define	SDL_ARM_R5_MPU_REGION_AC_XN_RESETVAL (0x00000000U)

#define	SDL_ARM_R5_MPU_REGION_AC_XN_MAX (0x00000001U)

Maximum number of MPU regions available in R5F SS.

#define	SDL_ARM_R5F_MPU_REGIONS_MAX ((uint32_t) 16U)
	Number of R5 MPU region. More...

Arm R5F MPU sub-region disable control.
Mask for R5 MPU sub-region disable.
#define	SDL_ARM_R5_MPU_SUB_REGION_ENABLE_ALL ((uint32_t) 0x0U)
	Enable all sub-regions. More...

#define	SDL_ARM_R5_MPU_SUB_REGION_0_DISABLE ((uint32_t) 0x1U)
	Disable sub-region 0. More...

#define	SDL_ARM_R5_MPU_SUB_REGION_1_DISABLE ((uint32_t) 0x2U)
	Disable sub-region 1. More...

#define	SDL_ARM_R5_MPU_SUB_REGION_2_DISABLE ((uint32_t) 0x4U)
	Disable sub-region 2. More...

#define	SDL_ARM_R5_MPU_SUB_REGION_3_DISABLE ((uint32_t) 0x8U)
	Disable sub-region 3. More...

#define	SDL_ARM_R5_MPU_SUB_REGION_4_DISABLE ((uint32_t) 0x10U)
	Disable sub-region 4. More...

#define	SDL_ARM_R5_MPU_SUB_REGION_5_DISABLE ((uint32_t) 0x20U)
	Disable sub-region 5. More...

#define	SDL_ARM_R5_MPU_SUB_REGION_6_DISABLE ((uint32_t) 0x40U)
	Disable sub-region 6. More...

#define	SDL_ARM_R5_MPU_SUB_REGION_8_DISABLE ((uint32_t) 0x80U)
	Disable sub-region 7. More...

Arm R5F MPU region access permissions.
Access permissions for R5 MPU regions.
#define	SDL_ARM_R5_ACC_PERM_NO_ACCESS ((uint32_t) 0x0U)
	No accesses are permitted to MPU region. More...

#define	SDL_ARM_R5_ACC_PERM_PRIV_RD_WR ((uint32_t) 0x1U)
	Privileged accesses only. More...

#define	SDL_ARM_R5_ACC_PERM_PRIV_RD_WR_USR_RD ((uint32_t) 0x2U)
	Privileged read/write accesses and user read only. More...

#define	SDL_ARM_R5_ACC_PERM_PRIV_USR_RD_WR ((uint32_t) 0x3U)
	Full access to privileged and user modes. More...

#define	SDL_ARM_R5_ACC_PERM_PRIV_RD_ONLY ((uint32_t) 0x5U)
	Privileged read accesses only. More...

#define	SDL_ARM_R5_ACC_PERM_PRIV_USR_RD ((uint32_t) 0x6U)
	Read only accesses to privileged and user modes. More...

Arm R5F MPU region cache policy.
Inner and outer cache policy for R5 MPU region.
#define	SDL_ARM_R5_CACHE_POLICY_NON_CACHEABLE ((uint32_t) 0x0U)
	Cache Policy: Non-cacheable. More...

#define	SDL_ARM_R5_CACHE_POLICY_WB_WA ((uint32_t) 0x1U)
	Cache Policy: Write-back, write-allocate. More...

#define	SDL_ARM_R5_CACHE_POLICY_WT_NO_WA ((uint32_t) 0x2U)
	Cache Policy: Write-through, no write-allocate. More...

#define	SDL_ARM_R5_CACHE_POLICY_WB_NO_WA ((uint32_t) 0x3U)
	Cache Policy: Write-back, no write-allocate. More...

Arm R5F MPU region attributes.
Memory attributes: TEX[2:0], C, and B encodings.
#define	SDL_ARM_R5_MEM_ATTR_STRONGLY_ORDERED ((uint32_t) 0x0U)
	Memory type and cache policies: Strongly-ordered. More...

#define	SDL_ARM_R5_MEM_ATTR_SHAREABLE ((uint32_t) 0x1U)
	Memory type and cache policies: Shareable. More...

#define	SDL_ARM_R5_MEM_ATTR_CACHED_WT_NO_WA ((uint32_t) 0x2U)
	Memory type and cache policies: Outer and Inner write-through, no write-allocate. More...

#define	SDL_ARM_R5_MEM_ATTR_CACHED_WB_NO_WA ((uint32_t) 0x3U)
	Memory type and cache policies: Outer and Inner write-back, no write-allocate. More...

#define	SDL_ARM_R5_MEM_ATTR_STRONGLY_NON_CACHED ((uint32_t) 0x4U)
	Memory type and cache policies: Non cacheable. More...

#define	SDL_ARM_R5_MEM_ATTR_CACHED_WB_WA ((uint32_t) 0x5U)
	Memory type and cache policies: Outer and Inner write-back, write-allocate. More...

#define	SDL_ARM_R5_MEM_ATTR_NON_SHAREABLE ((uint32_t) 0x6U)
	Memory type and cache policies: Non-shareable Device. More...

#define	SDL_ARM_R5_MEM_ATTR_MAX ((uint32_t) 0x7U)
	This should be passed to configuration. More...

Functions
void	SDL_R5MPU_Enable (uint32_t enable)
	Enable/disable the Memory Protection Unit (MPU) More...

uint32_t	SDL_R5MPU_getNumRegions (void)
	Get the number of unified MPU regions supported. More...

void	SDL_R5MPU_Cfg (uint32_t regionNum, uint32_t baseAddrRegVal, uint32_t sizeRegVal, uint32_t accessCtrlRegVal)
	Configure an MPU region. More...

int32_t	SDL_R5MPU_VerifyCfg (uint32_t regionNum, uint32_t baseAddrRegVal, uint32_t sizeRegVal, uint32_t accessCtrlRegVal)
	Verify an MPU region that is previously configured. More...

void	SDL_R5FMPU_enableRegion (uint32_t regionNum, uint32_t enable)
	Enable/disable an MPU region. More...

int32_t	SDL_R5MPU_VerifyEnableRegion (uint32_t regionNum, uint32_t enable)
	Verifies the previously called Enable/disable an MPU region API. More...

void	SDL_R5MPU_readStaticRegisters (SDL_MPU_staticRegs *pStaticRegs, uint32_t regionNum)
	MPU API to Read the Static Registers. This function reads the values of the static registers such as System Control Register, MPU Type Register and MPU Region Number Register. More...

Macro Definition Documentation

◆ SDL_ARM_R5_MPU_REGION_BASE_ADDR_MASK

#define SDL_ARM_R5_MPU_REGION_BASE_ADDR_MASK (0xFFFFFFFEU)

◆ SDL_ARM_R5_MPU_REGION_BASE_ADDR_SHIFT

#define SDL_ARM_R5_MPU_REGION_BASE_ADDR_SHIFT (0x00000005U)

◆ SDL_ARM_R5_MPU_REGION_BASE_ADDR_RESETVAL

#define SDL_ARM_R5_MPU_REGION_BASE_ADDR_RESETVAL (0x00000000U)

◆ SDL_ARM_R5_MPU_REGION_BASE_ADDR_MAX

#define SDL_ARM_R5_MPU_REGION_BASE_ADDR_MAX (0x07FFFFFFU)

◆ SDL_ARM_R5_MPU_REGION_SZEN_EN_MASK

#define SDL_ARM_R5_MPU_REGION_SZEN_EN_MASK (0x00000001U)

◆ SDL_ARM_R5_MPU_REGION_SZEN_EN_SHIFT

#define SDL_ARM_R5_MPU_REGION_SZEN_EN_SHIFT (0x00000000U)

◆ SDL_ARM_R5_MPU_REGION_SZEN_EN_RESETVAL

#define SDL_ARM_R5_MPU_REGION_SZEN_EN_RESETVAL (0x00000000U)

◆ SDL_ARM_R5_MPU_REGION_SZEN_EN_MAX

#define SDL_ARM_R5_MPU_REGION_SZEN_EN_MAX (0x00000001U)

◆ SDL_ARM_R5_MPU_REGION_SZEN_SZ_MASK

#define SDL_ARM_R5_MPU_REGION_SZEN_SZ_MASK (0x00000037U)

◆ SDL_ARM_R5_MPU_REGION_SZEN_SZ_SHIFT

#define SDL_ARM_R5_MPU_REGION_SZEN_SZ_SHIFT (0x00000001U)

◆ SDL_ARM_R5_MPU_REGION_SZEN_SZ_RESETVAL

#define SDL_ARM_R5_MPU_REGION_SZEN_SZ_RESETVAL (0x00000000U)

◆ SDL_ARM_R5_MPU_REGION_SZEN_SZ_MAX

#define SDL_ARM_R5_MPU_REGION_SZEN_SZ_MAX (0x0000001FU)

◆ SDL_ARM_R5_MPU_REGION_SZEN_SRD_MASK

#define SDL_ARM_R5_MPU_REGION_SZEN_SRD_MASK (0x0000FF00U)

◆ SDL_ARM_R5_MPU_REGION_SZEN_SRD_SHIFT

#define SDL_ARM_R5_MPU_REGION_SZEN_SRD_SHIFT (0x00000008U)

◆ SDL_ARM_R5_MPU_REGION_SZEN_SRD_RESETVAL

#define SDL_ARM_R5_MPU_REGION_SZEN_SRD_RESETVAL (0x00000000U)

◆ SDL_ARM_R5_MPU_REGION_SZEN_SRD_MAX

#define SDL_ARM_R5_MPU_REGION_SZEN_SRD_MAX (0x000000FFU)

◆ SDL_ARM_R5_MPU_REGION_AC_B_MASK

#define SDL_ARM_R5_MPU_REGION_AC_B_MASK (0x00000001U)

◆ SDL_ARM_R5_MPU_REGION_AC_B_SHIFT

#define SDL_ARM_R5_MPU_REGION_AC_B_SHIFT (0x00000000U)

◆ SDL_ARM_R5_MPU_REGION_AC_B_RESETVAL

#define SDL_ARM_R5_MPU_REGION_AC_B_RESETVAL (0x00000000U)

◆ SDL_ARM_R5_MPU_REGION_AC_B_MAX

#define SDL_ARM_R5_MPU_REGION_AC_B_MAX (0x00000001U)

◆ SDL_ARM_R5_MPU_REGION_AC_CB_MASK

#define SDL_ARM_R5_MPU_REGION_AC_CB_MASK (0x00000003U)

◆ SDL_ARM_R5_MPU_REGION_AC_CB_SHIFT

#define SDL_ARM_R5_MPU_REGION_AC_CB_SHIFT (0x00000000U)

◆ SDL_ARM_R5_MPU_REGION_AC_CB_RESETVAL

#define SDL_ARM_R5_MPU_REGION_AC_CB_RESETVAL (0x00000000U)

◆ SDL_ARM_R5_MPU_REGION_AC_C_MASK

#define SDL_ARM_R5_MPU_REGION_AC_C_MASK (0x00000002U)

◆ SDL_ARM_R5_MPU_REGION_AC_C_SHIFT

#define SDL_ARM_R5_MPU_REGION_AC_C_SHIFT (0x00000001U)

◆ SDL_ARM_R5_MPU_REGION_AC_C_RESETVAL

#define SDL_ARM_R5_MPU_REGION_AC_C_RESETVAL (0x00000000U)

◆ SDL_ARM_R5_MPU_REGION_AC_C_MAX

#define SDL_ARM_R5_MPU_REGION_AC_C_MAX (0x00000001U)

◆ SDL_ARM_R5_MPU_REGION_AC_S_MASK

#define SDL_ARM_R5_MPU_REGION_AC_S_MASK (0x00000004U)

◆ SDL_ARM_R5_MPU_REGION_AC_S_SHIFT

#define SDL_ARM_R5_MPU_REGION_AC_S_SHIFT (0x00000002U)

◆ SDL_ARM_R5_MPU_REGION_AC_S_RESETVAL

#define SDL_ARM_R5_MPU_REGION_AC_S_RESETVAL (0x00000000U)

◆ SDL_ARM_R5_MPU_REGION_AC_S_MAX

#define SDL_ARM_R5_MPU_REGION_AC_S_MAX (0x00000001U)

◆ SDL_ARM_R5_MPU_REGION_AC_TEX_MASK

#define SDL_ARM_R5_MPU_REGION_AC_TEX_MASK (0x00000038U)

◆ SDL_ARM_R5_MPU_REGION_AC_TEX_SHIFT

#define SDL_ARM_R5_MPU_REGION_AC_TEX_SHIFT (0x00000003U)

◆ SDL_ARM_R5_MPU_REGION_AC_TEX_RESETVAL

#define SDL_ARM_R5_MPU_REGION_AC_TEX_RESETVAL (0x00000000U)

◆ SDL_ARM_R5_MPU_REGION_AC_TEX_MAX

#define SDL_ARM_R5_MPU_REGION_AC_TEX_MAX (0x00000007U)

◆ SDL_ARM_R5_MPU_REGION_AC_AP_MASK

#define SDL_ARM_R5_MPU_REGION_AC_AP_MASK (0x00000700U)

◆ SDL_ARM_R5_MPU_REGION_AC_AP_SHIFT

#define SDL_ARM_R5_MPU_REGION_AC_AP_SHIFT (0x00000008U)

◆ SDL_ARM_R5_MPU_REGION_AC_AP_RESETVAL

#define SDL_ARM_R5_MPU_REGION_AC_AP_RESETVAL (0x00000000U)

◆ SDL_ARM_R5_MPU_REGION_AC_AP_MAX

#define SDL_ARM_R5_MPU_REGION_AC_AP_MAX (0x00000007U)

◆ SDL_ARM_R5_MPU_REGION_AC_AP_VAL_NO_ACCESS

#define SDL_ARM_R5_MPU_REGION_AC_AP_VAL_NO_ACCESS (0U)

◆ SDL_ARM_R5_MPU_REGION_AC_AP_VAL_RW

#define SDL_ARM_R5_MPU_REGION_AC_AP_VAL_RW (3U)

◆ SDL_ARM_R5_MPU_REGION_AC_AP_VAL_RO

#define SDL_ARM_R5_MPU_REGION_AC_AP_VAL_RO (6U)

◆ SDL_ARM_R5_MPU_REGION_AC_XN_MASK

#define SDL_ARM_R5_MPU_REGION_AC_XN_MASK (0x00001000U)

◆ SDL_ARM_R5_MPU_REGION_AC_XN_SHIFT

#define SDL_ARM_R5_MPU_REGION_AC_XN_SHIFT (0x0000000CU)

◆ SDL_ARM_R5_MPU_REGION_AC_XN_RESETVAL

#define SDL_ARM_R5_MPU_REGION_AC_XN_RESETVAL (0x00000000U)

◆ SDL_ARM_R5_MPU_REGION_AC_XN_MAX

#define SDL_ARM_R5_MPU_REGION_AC_XN_MAX (0x00000001U)