SDL API Guide for J7200
SDL_ArmR5MpuRegionCfg Struct Reference

Detailed Description

Structure containing the region configuration parameters. If application wants to do it's own MPU region configuration (override the default one), then it needs to define this variable and initialize that to desired values: Var: 'const SDL_ArmR5MpuRegionCfg gSdlR5MpuCfg[SDL_ARM_R5F_MPU_REGIONS_MAX]' With above application can have it's own MPU configuration, but MPU configuration will still happen at boot/startup time. Default configurations for MPU regions is present under file: "\src\startup\startup.c".

Data Fields

uint32_t regionId
 
uint32_t enable
 
uint32_t baseAddr
 
SDL_ArmR5MpuRegionSize size
 
uint32_t subRegionEnable
 
uint32_t exeNeverControl
 
uint32_t accessPermission
 
uint32_t shareable
 
uint32_t cacheable
 
uint32_t cachePolicy
 
uint32_t memAttr
 

Field Documentation

◆ regionId

uint32_t SDL_ArmR5MpuRegionCfg::regionId

Region number to configure. Range: 0 to (SDL_ARM_R5F_MPU_REGIONS_MAX 1U)

◆ enable

uint32_t SDL_ArmR5MpuRegionCfg::enable

Region enable control. 0: Memory region disabled. 1: Memory region enabled.

◆ baseAddr

uint32_t SDL_ArmR5MpuRegionCfg::baseAddr

Region base address: 32 bytes aligned.

◆ size

SDL_ArmR5MpuRegionSize SDL_ArmR5MpuRegionCfg::size

Region size Refer SDL_ArmR5MpuRegionSize

◆ subRegionEnable

uint32_t SDL_ArmR5MpuRegionCfg::subRegionEnable

Sub-region enable See SDL_ArmR5SubRegionDisable for details. Multiple sub-regions can disabled by ORing multiple masks from above

◆ exeNeverControl

uint32_t SDL_ArmR5MpuRegionCfg::exeNeverControl

Region execute control. 0: all instruction fetches enabled 1: no instruction fetches enabled

◆ accessPermission

uint32_t SDL_ArmR5MpuRegionCfg::accessPermission

Access permissions See SDL_ArmR5AccessPerm for more details

◆ shareable

uint32_t SDL_ArmR5MpuRegionCfg::shareable

Region share attribute. 0: non-shared 1: shared

◆ cacheable

uint32_t SDL_ArmR5MpuRegionCfg::cacheable

Region cache control. FALSE: Memory region is non-cached. TRUE: Memory region is cached.

◆ cachePolicy

uint32_t SDL_ArmR5MpuRegionCfg::cachePolicy

Inner and outer cache policy. This field is valid only if cacheable = TRUE See SDL_ArmR5CachePolicy for more details

◆ memAttr

uint32_t SDL_ArmR5MpuRegionCfg::memAttr

Memory region attributes. This field is valid only if cacheable = FALSE See SDL_ArmR5MemAttr for more details