Files
file	RegisterIntr.h
	Interrupt register routines.

Data Structures
struct	OsalRegisterIntParams_corepac_t
	Interrupt Configuration parameters for the corepac (c6x/a15/m5/a8/a9) More...

struct	OsalRegisterIntParams_socmux_t
	Interrupt Configuration parameters for soc mux prior to reaching the core. More...

struct	OsalRegisterIntrParams_t
	Interrupt Configuration parameters This is the data structure used to configure the interrupts in the system. coreConfig: This part configures the interrupt for corepac such as c66x, arm, m4 socMuxConfig: This part configures the interrupt path for any SOC level mux such as CIC/GIC or cross bar, leading up to the corepac. More...

Macros
#define	OSAL_REGINT_INTVEC_EVENT_COMBINER (16U)
	For C6x, if intVec=16, then event combiner is to be used. More...

Typedefs
typedef void(*	Osal_IsrRoutine) (uintptr_t arg)

Variables
char *	OsalRegisterIntParams_corepac_t::name

uint32_t	OsalRegisterIntParams_corepac_t::corepacEventNum

uint32_t	OsalRegisterIntParams_corepac_t::intVecNum

Osal_IsrRoutine	OsalRegisterIntParams_corepac_t::isrRoutine

uintptr_t	OsalRegisterIntParams_corepac_t::arg

uint32_t	OsalRegisterIntParams_corepac_t::priority

uint32_t	OsalRegisterIntParams_corepac_t::triggerSensitivity

uint32_t	OsalRegisterIntParams_corepac_t::enableIntr

MuxIntcP_inParams *	OsalRegisterIntParams_socmux_t::muxInParams

MuxIntcP_outParams *	OsalRegisterIntParams_socmux_t::muxOutParams

OsalRegisterIntParams_corepac_t	OsalRegisterIntrParams_t::corepacConfig

OsalRegisterIntParams_socmux_t	OsalRegisterIntrParams_t::socMuxConfig

Osal Interrupt return Codes

typedef int32_t	OsalInterruptRetCode_e
	Return error codes for Osal Interrupt functions. More...

void	Osal_RegisterInterrupt_initParams (OsalRegisterIntrParams_t *interruptRegParams)
	Function to initialize the interrupt registration configuration data structure. More...

OsalInterruptRetCode_e	Osal_RegisterInterruptDirect (OsalRegisterIntrParams_t interruptRegParams, HwiP_DirectFxn isrFxn, HwiP_Handle hwiPHandlePtr)
	Function to register direct interrupt with parameters provided. More...

OsalInterruptRetCode_e	Osal_RegisterInterrupt (OsalRegisterIntrParams_t interruptRegParams, HwiP_Handle hwiPHandlePtr)
	Function to register interrupt with parameters provided. More...

OsalInterruptRetCode_e	Osal_DeleteInterrupt (HwiP_Handle hwiPhandle, uint32_t corepacEventNum)
	Function to delete interrupt corresponding to an event number. More...

void	Osal_EnableInterrupt (uint32_t corepacEvent, uint32_t interruptNum)
	Function to enable the interrupt corresponding to an event number. More...

void	Osal_DisableInterrupt (uint32_t corepacEvent, uint32_t interruptNum)
	Function to disable the interrupt corresponding to an event number. More...

void	Osal_ClearInterrupt (uint32_t corepacEvent, uint32_t interruptNum)
	Function to clear the interrupt corresponding to an event number. More...

#define	OSAL_INT_SUCCESS ((int32_t) 0)

#define	OSAL_INT_ERR_INVALID_PARAMS ((int32_t) -1)

#define	OSAL_INT_ERR_HWICREATE ((int32_t) -2)

#define	OSAL_INT_ERR_EVENTCOMBINER_REG ((int32_t) -3)

#define	OSAL_INT_ERR_DELETE ((int32_t) -4)

#define	OSAL_INT_UNSUPPORTED ((int32_t) -5)

Detailed Description

RegisterIntr interface

Macro Definition Documentation

◆ OSAL_REGINT_INTVEC_EVENT_COMBINER

#define OSAL_REGINT_INTVEC_EVENT_COMBINER (16U)

For C6x, if intVec=16, then event combiner is to be used.

◆ OSAL_INT_SUCCESS

#define OSAL_INT_SUCCESS ((int32_t) 0)

Success return code

◆ OSAL_INT_ERR_INVALID_PARAMS

#define OSAL_INT_ERR_INVALID_PARAMS ((int32_t) -1)

Invalid input parameters

◆ OSAL_INT_ERR_HWICREATE

#define OSAL_INT_ERR_HWICREATE ((int32_t) -2)

Error while registering the Hwi object

◆ OSAL_INT_ERR_EVENTCOMBINER_REG

#define OSAL_INT_ERR_EVENTCOMBINER_REG ((int32_t) -3)

Error while registering the event combiner to the defaults

◆ OSAL_INT_ERR_DELETE

#define OSAL_INT_ERR_DELETE ((int32_t) -4)

Failed to delete a Interrupt handle.

◆ OSAL_INT_UNSUPPORTED

#define OSAL_INT_UNSUPPORTED ((int32_t) -5)

Unsupported function

Typedef Documentation

◆ Osal_IsrRoutine

typedef void(* Osal_IsrRoutine) (uintptr_t arg)

◆ OsalInterruptRetCode_e

typedef int32_t OsalInterruptRetCode_e

Return error codes for Osal Interrupt functions.

Function Documentation

◆ Osal_RegisterInterrupt_initParams()

void Osal_RegisterInterrupt_initParams ( OsalRegisterIntrParams_t * interruptRegParams )

Function to initialize the interrupt registration configuration data structure.

◆ Osal_RegisterInterruptDirect()

OsalInterruptRetCode_e Osal_RegisterInterruptDirect	(	OsalRegisterIntrParams_t *	interruptRegParams,
		HwiP_DirectFxn	isrFxn,
		HwiP_Handle *	hwiPHandlePtr
	)

Function to register direct interrupt with parameters provided.

◆ Osal_RegisterInterrupt()

OsalInterruptRetCode_e Osal_RegisterInterrupt	(	OsalRegisterIntrParams_t *	interruptRegParams,
		HwiP_Handle *	hwiPHandlePtr
	)

Function to register interrupt with parameters provided.

◆ Osal_DeleteInterrupt()

OsalInterruptRetCode_e Osal_DeleteInterrupt	(	HwiP_Handle	hwiPhandle,
		uint32_t	corepacEventNum
	)

Function to delete interrupt corresponding to an event number.

◆ Osal_EnableInterrupt()

void Osal_EnableInterrupt	(	uint32_t	corepacEvent,
		uint32_t	interruptNum
	)

Function to enable the interrupt corresponding to an event number.

◆ Osal_DisableInterrupt()

void Osal_DisableInterrupt	(	uint32_t	corepacEvent,
		uint32_t	interruptNum
	)

Function to disable the interrupt corresponding to an event number.

◆ Osal_ClearInterrupt()

void Osal_ClearInterrupt	(	uint32_t	corepacEvent,
		uint32_t	interruptNum
	)

Function to clear the interrupt corresponding to an event number.

Variable Documentation

◆ name

char* OsalRegisterIntParams_corepac_t::name

Name of the instance for debugging purposes, could be set to NULL

◆ corepacEventNum

uint32_t OsalRegisterIntParams_corepac_t::corepacEventNum

Event number going in to the DSP corepac

◆ intVecNum

uint32_t OsalRegisterIntParams_corepac_t::intVecNum

Interrupt vector number for ARM corepac

◆ isrRoutine

Osal_IsrRoutine OsalRegisterIntParams_corepac_t::isrRoutine

The ISR routine to hook the corepacEventNum to

◆ arg

uintptr_t OsalRegisterIntParams_corepac_t::arg

Argument to the ISR routine

◆ priority

uint32_t OsalRegisterIntParams_corepac_t::priority

Device specific priority for ARM corepac where a lower priority value indicates a higher priority, the priority range is corepac specific as listed below:

A8: 0-127
A9/A15/A53: 0-255
ARP32: 1(NMI), 2-13(INT4-15)
R5: 0-15
M4: None Note: For R5 Core, baremetal case, there is no device specific priority set - all interrupts are handled at the same priority So, this is not applicable for bare metal R5 Core interrupt config.

◆ triggerSensitivity

uint32_t OsalRegisterIntParams_corepac_t::triggerSensitivity

Set an interrupt's trigger sensitivity for ARM corepac as OSAL_armGicTrigType_t. The applicable trigger types are corepac specific and listed below:

A53: Level and Edge Trigger
A15: Low/High Level and Rising/Falling Edge Trigger
A8/A9: Low/High Level and Rising/Falling/Both Edge Trigger
R5: Level Trigger and Pulse Trigger

◆ enableIntr

uint32_t OsalRegisterIntParams_corepac_t::enableIntr

When set to TRUE, interrupt is enabled after registration (Osal_RegisterInterrupt) otherwise interrupt is disabled

◆ muxInParams

MuxIntcP_inParams* OsalRegisterIntParams_socmux_t::muxInParams

Basic MuxIntcP Input Parameters

◆ muxOutParams

MuxIntcP_outParams* OsalRegisterIntParams_socmux_t::muxOutParams

Basic MuxIntcP Output Parameters

◆ corepacConfig

OsalRegisterIntParams_corepac_t OsalRegisterIntrParams_t::corepacConfig

configures the interrupt for corepac such as c66x, arm, m4

◆ socMuxConfig

OsalRegisterIntParams_socmux_t OsalRegisterIntrParams_t::socMuxConfig

configures the interrupt path for any SOC level mux such as CIC/GIC or cross bar, leading up to the corepac

Files

Data Structures

Macros

Typedefs

Variables

Osal Interrupt return Codes