Data Fields
I2SCC32XX_HWAttrs Struct Reference

I2S Hardware attributes. More...

#include <I2SCC32XX.h>

Data Fields

uint32_t pinSD1
 
uint32_t pinSD0
 
uint32_t pinSCK
 
uint32_t pinSCKX
 
uint32_t pinWS
 
uint32_t rxChannelIndex
 
uint32_t txChannelIndex
 
uint32_t intPriority
 

Detailed Description

I2S Hardware attributes.

intPriority is the I2S peripheral's interrupt priority, as defined by the TI-RTOS kernel. This value is passed unmodified to Hwi_create().

pinSD1 and pinSD0 define the SD0 and SD1 data pin mapping, respectively. pinSCK, pinMCLK and pinWS define the SCK, MCLK and WS clock pin mapping, respectively. All these pins are typically defined with a macro in a header file, which maps to an IOID.

rxChannelIndex and txChannelIndex are uDMA channels respectively used for the read and the write interface.

A sample structure is shown below:

const I2SCC32XX_HWAttrs i2sCC3220SHWAttrs[CC3220S_LAUNCHXL_I2SCOUNT] = {
{
.pinSD1 = I2SCC32XX_PIN_50_SD1,
.pinSD0 = I2SCC32XX_PIN_64_SD0,
.pinSCK = I2SCC32XX_PIN_53_SCK,
.pinSCKX = I2SCC32XX_PIN_UNUSED,
.pinWS = I2SCC32XX_PIN_63_WS,
.rxChannelIndex = UDMA_CH4_I2S_RX,
.txChannelIndex = UDMA_CH5_I2S_TX,
.intPriority = 0x40,
}
};

Field Documentation

§ pinSD1

uint32_t I2SCC32XX_HWAttrs::pinSD1

Pin used for SD1 signal. Must be chosen between I2SCC32XX_PIN_50_SD1 and I2SCC32XX_PIN_60_SD1. Signal can be deactivated using I2SCC32XX_PIN_UNUSED.

§ pinSD0

uint32_t I2SCC32XX_HWAttrs::pinSD0

Pin used for SD0 signal. Must be chosen between I2SCC32XX_PIN_45_SD0, I2SCC32XX_PIN_50_SD0, I2SCC32XX_PIN_52_SD0, and I2SCC32XX_PIN_64_SD0. Signal can be deactivated using I2SCC32XX_PIN_UNUSED.

§ pinSCK

uint32_t I2SCC32XX_HWAttrs::pinSCK

Pin used for SCK signal. Must be chosen between I2SCC32XX_PIN_03_SCK, I2SCC32XX_PIN_52_SCK, and I2SCC32XX_PIN_53_SCK. Signal can be deactivated using I2SCC32XX_PIN_UNUSED.

§ pinSCKX

uint32_t I2SCC32XX_HWAttrs::pinSCKX

Pin used for SCKX signal. Must be I2SCC32XX_PIN_62_SCKX.

§ pinWS

uint32_t I2SCC32XX_HWAttrs::pinWS

Pin used for WS signal. Must be chosen between I2SCC32XX_PIN_02_WS, I2SCC32XX_PIN_15_WS, I2SCC32XX_PIN_17_WS, I2SCC32XX_PIN_21_WS, I2SCC32XX_PIN_45_WS, I2SCC32XX_PIN_53_WS, and I2SCC32XX_PIN_63_WS. This signal cannot be deactivated.

§ rxChannelIndex

uint32_t I2SCC32XX_HWAttrs::rxChannelIndex

uDMA channel index used for Rx. Must be chosen between UDMA_CH4_I2S_RX and UDMA_CH18_I2S_RX. Does not need to be set if no using the DMA transfers.

§ txChannelIndex

uint32_t I2SCC32XX_HWAttrs::txChannelIndex

uDMA channel index used for Tx. Must be chosen between UDMA_CH5_I2S_TX and UDMA_CH19_I2S_TX. Does not need to be set if no using the DMA transfers.

§ intPriority

uint32_t I2SCC32XX_HWAttrs::intPriority

I2S Peripheral's interrupt priority


The documentation for this struct was generated from the following file:
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