40 #include <inc/hw_memmap.h>
41 #include <inc/hw_types.h>
42 #include <inc/hw_adi.h>
43 #include <inc/hw_adi_0_rf.h>
44 #include <inc/hw_adi_1_synth.h>
45 #include <inc/hw_adi_2_refsys.h>
46 #include <inc/hw_adi_3_refsys.h>
47 #include <inc/hw_adi_4_aux.h>
48 #include <inc/hw_aon_ioc.h>
49 #include <inc/hw_aon_sysctl.h>
50 #include <inc/hw_aon_wuc.h>
51 #include <inc/hw_aux_wuc.h>
52 #include <inc/hw_ccfg.h>
53 #include <inc/hw_chip_def.h>
54 #include <inc/hw_ddi.h>
55 #include <inc/hw_flash.h>
56 #include <inc/hw_fcfg1.h>
57 #include <inc/hw_ddi_0_osc.h>
58 #include <inc/hw_prcm.h>
59 #include <inc/hw_vims.h>
60 #include <inc/hw_aon_batmon.h>
61 #include <inc/hw_aon_rtc.h>
74 #ifdef __IAR_SYSTEMS_ICC__
75 #include <intrinsics.h>
109 #define DELAY_20_USEC 0x140
121 #define CPU_DELAY_MICRO_SECONDS( x ) \
122 CPUdelay(((uint32_t)((( x ) * 48.0 ) / 5.0 )) - 1 )
146 uint32_t vimsCtlMode0 ;
191 uint32_t ui32Fcfg1Revision;
192 uint32_t ui32AonSysResetctl;
199 if ( ui32Fcfg1Revision == 0xFFFFFFFF ) {
200 ui32Fcfg1Revision = 0;
376 uint32_t ccfg_ModeConfReg ;
377 uint32_t currentHfClock ;
378 uint32_t ccfgExtLfClk ;
379 int32_t i32VddrSleepTrim ;
380 int32_t i32VddrSleepDelta ;
381 uint32_t fcfg1OscConf ;
442 i32VddrSleepDelta = ((((int32_t)ccfg_ModeConfReg )
444 >> ( 32 - CCFG_MODE_CONF_VDDR_TRIM_SLEEP_DELTA_W ));
446 i32VddrSleepTrim = ( i32VddrSleepTrim + i32VddrSleepDelta + 1 );
447 if ( i32VddrSleepTrim > 21 ) i32VddrSleepTrim = 21;
448 if ( i32VddrSleepTrim < -10 ) i32VddrSleepTrim = -10;
515 ( 0x20 | ( ui32Trim << 1 ));
524 ( 0x10 | ( ui32Trim ));
543 ( 0x60 | ( ui32Trim << 1 ));
554 ( 0x80 | ( ui32Trim << 3 ));
566 ( 0xFC00 | ( ui32Trim << 2 ));
586 mp1rev = ( HWREG(
FCFG1_BASE + 0x00000314 ) & 0x0000FFFF );
587 if ( mp1rev < 527 ) {
588 uint32_t vtrim_bod = (( HWREG(
FCFG1_BASE + 0x000002BC ) >> 24 ) & 0xF );
589 uint32_t vtrim_udig = (( HWREG(
FCFG1_BASE + 0x000002BC ) >> 16 ) & 0xF );
590 if ( vtrim_bod > 0 ) {
593 if ( vtrim_udig != 7 ) {
594 if ( vtrim_udig == 6 ) {
597 vtrim_udig = (( vtrim_udig + 2 ) & 0xF );
743 int32_t i32SignedVddrVal = ui32VddrTrimVal;
744 if ( i32SignedVddrVal > 0x15 ) {
745 i32SignedVddrVal -= 0x20;
747 return ( i32SignedVddrVal );
773 uint32_t ui32Fcfg1Value ;
774 uint32_t ui32XoscHfRow ;
775 uint32_t ui32XoscHfCol ;
776 int32_t i32CustomerDeltaAdjust ;
777 uint32_t ui32TrimValue ;
785 ui32XoscHfRow = (( ui32Fcfg1Value &
788 ui32XoscHfCol = (( ui32Fcfg1Value &
792 i32CustomerDeltaAdjust = 0;
800 i32CustomerDeltaAdjust = ((int32_t)ccfg_ModeConfReg << 16 ) >> 24;
802 while ( i32CustomerDeltaAdjust < 0 ) {
804 if ( ui32XoscHfCol == 0 ) {
805 ui32XoscHfCol = 0xFFFF;
807 if ( ui32XoscHfRow == 0 ) {
812 i32CustomerDeltaAdjust++;
814 while ( i32CustomerDeltaAdjust > 0 ) {
815 ui32XoscHfCol = ( ui32XoscHfCol << 1 ) | 1;
816 if ( ui32XoscHfCol > 0xFFFF ) {
818 ui32XoscHfRow = ( ui32XoscHfRow << 1 ) | 1;
819 if ( ui32XoscHfRow > 0xF ) {
821 ui32XoscHfCol = 0xFFFF;
824 i32CustomerDeltaAdjust--;
831 return (ui32TrimValue);
843 uint32_t ui32TrimValue;
859 return(ui32TrimValue);
871 uint32_t ui32TrimValue;
880 return(ui32TrimValue);
891 uint32_t ui32TrimValue;
892 uint32_t ui32Fcfg1Value;
898 ui32TrimValue = ((ui32Fcfg1Value &
902 ui32TrimValue |= (((ui32Fcfg1Value &
906 ui32TrimValue |= (((ui32Fcfg1Value &
910 ui32TrimValue |= (((ui32Fcfg1Value &
915 return(ui32TrimValue);
926 uint32_t ui32TrimValue;
927 uint32_t ui32Fcfg1Value;
933 ui32TrimValue = (((ui32Fcfg1Value &
937 ui32TrimValue |= (((ui32Fcfg1Value &
941 ui32TrimValue |= (((ui32Fcfg1Value &
945 ui32TrimValue |= (((ui32Fcfg1Value &
950 return(ui32TrimValue);
961 uint32_t ui32TrimValue ;
962 uint32_t ui32Fcfg1Value ;
963 uint32_t ibiasOffset ;
966 int32_t deltaAdjust ;
973 ibiasOffset = ( ui32Fcfg1Value &
976 ibiasInit = ( ui32Fcfg1Value &
986 deltaAdjust += (int32_t)ibiasOffset;
987 if ( deltaAdjust < 0 ) {
993 ibiasOffset = (uint32_t)deltaAdjust;
996 deltaAdjust += (int32_t)ibiasInit;
997 if ( deltaAdjust < 0 ) {
1003 ibiasInit = (uint32_t)deltaAdjust;
1008 ui32TrimValue |= (((ui32Fcfg1Value &
1012 ui32TrimValue |= (((ui32Fcfg1Value &
1016 ui32TrimValue |= (((ui32Fcfg1Value &
1021 if ( ui32Fcfg1Revision >= 0x00000022 ) {
1022 ui32TrimValue |= ((( ui32Fcfg1Value &
1028 return(ui32TrimValue);
1039 uint32_t dblrLoopFilterResetVoltageValue = 0;
1041 if ( ui32Fcfg1Revision >= 0x00000020 ) {
1047 return ( dblrLoopFilterResetVoltageValue );
1058 uint32_t getTrimForAdcShModeEnValue = 1;
1060 if ( ui32Fcfg1Revision >= 0x00000022 ) {
1066 return ( getTrimForAdcShModeEnValue );
1077 uint32_t getTrimForAdcShVbufEnValue = 1;
1079 if ( ui32Fcfg1Revision >= 0x00000022 ) {
1085 return ( getTrimForAdcShVbufEnValue );
1096 uint32_t getTrimForXoschfCtlValue = 0;
1099 if ( ui32Fcfg1Revision >= 0x00000020 ) {
1101 getTrimForXoschfCtlValue =
1106 getTrimForXoschfCtlValue |=
1111 getTrimForXoschfCtlValue |=
1117 return ( getTrimForXoschfCtlValue );
1128 uint32_t ui32XoscHfFastStartValue ;
1135 return ( ui32XoscHfFastStartValue );
1146 uint32_t getTrimForRadcExtCfgValue = 0x403F8000;
1149 if ( ui32Fcfg1Revision >= 0x00000020 ) {
1151 getTrimForRadcExtCfgValue =
1156 getTrimForRadcExtCfgValue |=
1161 getTrimForRadcExtCfgValue |=
1167 return ( getTrimForRadcExtCfgValue );
1178 uint32_t trimForRcOscLfIBiasTrimValue = 0;
1180 if ( ui32Fcfg1Revision >= 0x00000022 ) {
1186 return ( trimForRcOscLfIBiasTrimValue );
1198 uint32_t trimForXoscLfRegulatorAndCmirrwrRatioValue = 0;
1200 if ( ui32Fcfg1Revision >= 0x00000022 ) {
1207 return ( trimForXoscLfRegulatorAndCmirrwrRatioValue );
static void SysCtrlAonSync(void)
Sync all accesses to the AON register interface.
#define IOC_PORT_AON_CLK32K
static void DDI32RegWrite(uint32_t ui32Base, uint32_t ui32Reg, uint32_t ui32Val)
Write a 32 bit value to a register in the DDI slave.
#define AUX_WUC_POWER_DOWN
static void HapiTrimDevicePowerDown(void)
Trims to be applied when coming from POWER_DOWN (also called when coming from SHUTDOWN and PIN_RESET)...
static void HapiTrimDeviceShutDown(uint32_t ui32Fcfg1Revision)
Trims to be applied when coming from SHUTDOWN (also called when coming from PIN_RESET).
static uint32_t GetTrimForRadcExtCfg(uint32_t ui32Fcfg1Revision)
Returns the trim value to be used for the RADCEXTCFG register in OSC_DIG.
void AUXWUCPowerCtrl(uint32_t ui32PowerMode)
Control the power to the AUX domain.
static uint32_t GetTrimForRcOscLfRtuneCtuneTrim(void)
Returns the trim value to be used for the RCOSCLF_RTUNE_TRIM and the RCOSCLF_CTUNE_TRIM bit fields in...
uint32_t OSCClockSourceGet(uint32_t ui32SrcClk)
Get the source clock settings.
void DDI16BitfieldWrite(uint32_t ui32Base, uint32_t ui32Reg, uint32_t ui32Mask, uint32_t ui32Shift, uint16_t ui32Data)
Write a bitfield via the DDI using 16-bit maskable write.
int32_t SignExtendVddrTrimValue(uint32_t ui32VddrTrimVal)
Sign extend the VDDR_TRIM setting (special format ranging from -10 to +21)
static uint32_t GetTrimForRcOscLfIBiasTrim(uint32_t ui32Fcfg1Revision)
Returns the FCFG1 OSC_CONF_ATESTLF_RCOSCLF_IBIAS_TRIM.
void ThisCodeIsBuiltForCC26xxHwRev22AndLater_HaltIfViolated(void)
Verifies that current chip is built for CC26xx HwRev 2.2 or later and never returns if violated...
static uint32_t GetTrimForXoscLfRegulatorAndCmirrwrRatio(uint32_t ui32Fcfg1Revision)
Returns XOSCLF_REGULATOR_TRIM and XOSCLF_CMIRRWR_RATIO as one packet spanning bits [5:0] in the retur...
static uint32_t GetTrimForAmpcompTh2(void)
Returns the trim value to be used for the AMPCOMP_TH2 register in OSC_DIG.
static uint32_t GetTrimForAnabypassValue1(uint32_t ccfg_ModeConfReg)
Returns the trim value to be used for the ANABYPASS_VALUE1 register in OSC_DIG.
static uint32_t GetTrimForDblrLoopFilterResetVoltage(uint32_t ui32Fcfg1Revision)
Returns the trim value from FCFG1 to be used as DBLR_LOOP_FILTER_RESET_VOLTAGE setting.
static void HapiTrimDeviceColdReset(void)
Trims to be applied when coming from PIN_RESET.
static uint32_t GetTrimForXoscHfFastStart(void)
Returns the trim value to be used as OSC_DIG:CTL1.XOSC_HF_FAST_START.
static uint32_t GetTrimForAdcShVbufEn(uint32_t ui32Fcfg1Revision)
Returns the trim value from FCFG1 to be used as ADC_SH_VBUF_EN setting.
void IOCPortConfigureSet(uint32_t ui32IOId, uint32_t ui32PortId, uint32_t ui32IOConfig)
Set the configuration of an IO port.
static uint32_t GetTrimForXoscHfCtl(uint32_t ui32Fcfg1Revision)
Returns the trim value to be used for the XOSCHFCTL register in OSC_DIG.
static uint32_t GetTrimForAdcShModeEn(uint32_t ui32Fcfg1Revision)
Returns the trim value from FCFG1 to be used as ADC_SH_MODE_EN setting.
static void SetAonRtcSubSecInc(uint32_t subSecInc)
Doing the tricky stuff needed to enter new RTCSUBSECINC value.
static uint32_t GetTrimForXoscHfIbiastherm(void)
Returns the trim value to be used for the XOSC_HF_IBIASTHERM bit field in the ANABYPASS_VALUE2 regist...
void OSCClockSourceSet(uint32_t ui32SrcClk, uint32_t ui32Osc)
Configure the oscillator input to the a source clock.
static void SetupCacheModeAccordingToCcfgSetting(void)
Set correct VIMS_MODE according to CCFG setting (CACHE or GPRAM)
static uint32_t GetTrimForAmpcompTh1(void)
Returns the trim value to be used for the AMPCOMP_TH1 register in OSC_DIG.
static uint32_t GetTrimForAmpcompCtrl(uint32_t ui32Fcfg1Revision)
Returns the trim value to be used for the AMPCOMP_CTRL register in OSC_DIG.
void trimDevice(void)
Performs the necessary trim of the device which is not done in boot code.
static void AONWUCJtagPowerOff(void)
Request power off of the JTAG domain.