64 #include <inc/hw_types.h>
65 #include <inc/hw_memmap.h>
66 #include <inc/hw_ints.h>
67 #include <inc/hw_aux_tdc.h>
84 #define AUXTDCConfigSet NOROM_AUXTDCConfigSet
85 #define AUXTDCMeasurementDone NOROM_AUXTDCMeasurementDone
93 #define AUX_TDC_BUSY 0x00000001
94 #define AUX_TDC_TIMEOUT 0x00000002
95 #define AUX_TDC_DONE 0x00000004
102 #define AUX_TDC_RUNSYNC 0x00000001
103 #define AUX_TDC_RUN 0x00000002
104 #define AUX_TDC_ABORT 0x00000003
111 #define AUXTDC_WAIT_START (AUX_TDC_STAT_STATE_WAIT_START)
112 #define AUXTDC_WAIT_START_CNTEN (AUX_TDC_STAT_STATE_WAIT_START_STOP_CNT_EN)
113 #define AUXTDC_IDLE (AUX_TDC_STAT_STATE_IDLE)
114 #define AUXTDC_CLRCNT (AUX_TDC_STAT_STATE_CLR_CNT)
115 #define AUXTDC_WAIT_STOP (AUX_TDC_STAT_STATE_WAIT_STOP)
116 #define AUXTDC_WAIT_STOP_CNTDOWN (AUX_TDC_STAT_STATE_WAIT_STOP_CNTDWN)
117 #define AUXTDC_GETRESULTS (AUX_TDC_STAT_STATE_GET_RESULT)
118 #define AUXTDC_POR (AUX_TDC_STAT_STATE_POR)
119 #define AUXTDC_WAIT_CLRCNT_DONE (AUX_TDC_STAT_STATE_WAIT_CLR_CNT_DONE)
120 #define AUXTDC_START_FALL (AUX_TDC_STAT_STATE_START_FALL)
121 #define AUXTDC_FORCE_STOP (AUX_TDC_STAT_STATE_FORCE_STOP)
128 #define AUXTDC_STOPPOL_RIS (AUX_TDC_TRIGSRC_STOP_POL_HIGH) // Rising edge polarity for stop event
129 #define AUXTDC_STOPPOL_FALL (AUX_TDC_TRIGSRC_STOP_POL_LOW) // Falling edge polarity for stop event
131 #define AUXTDC_STOP_AON_RTC_CH2 (AUX_TDC_TRIGSRC_STOP_SRC_AON_RTC_CH2)
132 #define AUXTDC_STOP_AUX_COMPA (AUX_TDC_TRIGSRC_STOP_SRC_AUX_COMPA)
133 #define AUXTDC_STOP_AUX_COMPB (AUX_TDC_TRIGSRC_STOP_SRC_AUX_COMPB)
134 #define AUXTDC_STOP_ISRC_RESET (AUX_TDC_TRIGSRC_STOP_SRC_ISRC_RESET)
135 #define AUXTDC_STOP_TIMER0_EV (AUX_TDC_TRIGSRC_STOP_SRC_TIMER0_EV)
136 #define AUXTDC_STOP_TIMER1_EV (AUX_TDC_TRIGSRC_STOP_SRC_TIMER1_EV)
137 #define AUXTDC_STOP_SMPH_AUTOTAKE_DONE (AUX_TDC_TRIGSRC_STOP_SRC_SMPH_AUTOTAKE_DONE)
138 #define AUXTDC_STOP_ADC_DONE (AUX_TDC_TRIGSRC_STOP_SRC_ADC_DONE)
139 #define AUXTDC_STOP_ADC_FIFO_ALMOST_FULL (AUX_TDC_TRIGSRC_STOP_SRC_ADC_FIFO_ALMOST_FULL)
140 #define AUXTDC_STOP_OBSMUX0 (AUX_TDC_TRIGSRC_STOP_SRC_OBSMUX0)
141 #define AUXTDC_STOP_OBSMUX1 (AUX_TDC_TRIGSRC_STOP_SRC_OBSMUX1)
142 #define AUXTDC_STOP_AON_SW (AUX_TDC_TRIGSRC_STOP_SRC_AON_SW)
143 #define AUXTDC_STOP_AON_PROG_WU (AUX_TDC_TRIGSRC_STOP_SRC_AON_PROG_WU)
144 #define AUXTDC_STOP_AUXIO0 (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO0)
145 #define AUXTDC_STOP_AUXIO1 (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO1)
146 #define AUXTDC_STOP_AUXIO2 (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO2)
147 #define AUXTDC_STOP_AUXIO3 (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO3)
148 #define AUXTDC_STOP_AUXIO4 (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO4)
149 #define AUXTDC_STOP_AUXIO5 (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO5)
150 #define AUXTDC_STOP_AUXIO6 (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO6)
151 #define AUXTDC_STOP_AUXIO7 (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO7)
152 #define AUXTDC_STOP_AUXIO8 (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO8)
153 #define AUXTDC_STOP_AUXIO9 (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO9)
154 #define AUXTDC_STOP_AUXIO10 (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO10)
155 #define AUXTDC_STOP_AUXIO11 (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO11)
156 #define AUXTDC_STOP_AUXIO12 (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO12)
157 #define AUXTDC_STOP_AUXIO13 (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO13)
158 #define AUXTDC_STOP_AUXIO14 (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO14)
159 #define AUXTDC_STOP_AUXIO15 (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO15)
160 #define AUXTDC_STOP_ACLK_REF (AUX_TDC_TRIGSRC_STOP_SRC_ACLK_REF)
161 #define AUXTDC_STOP_MCU_EV (AUX_TDC_TRIGSRC_STOP_SRC_MCU_EV)
162 #define AUXTDC_STOP_TDC_PRE (AUX_TDC_TRIGSRC_STOP_SRC_TDC_PRE)
164 #define AUXTDC_STARTPOL_RIS (AUX_TDC_TRIGSRC_START_POL_HIGH) // Rising edge polarity for start event
165 #define AUXTDC_STARTPOL_FALL (AUX_TDC_TRIGSRC_START_POL_LOW) // Falling edge polarity for start event
167 #define AUXTDC_START_AON_RTC_CH2 (AUX_TDC_TRIGSRC_START_SRC_AON_RTC_CH2)
168 #define AUXTDC_START_AUX_COMPA (AUX_TDC_TRIGSRC_START_SRC_AUX_COMPA)
169 #define AUXTDC_START_AUX_COMPB (AUX_TDC_TRIGSRC_START_SRC_AUX_COMPB)
170 #define AUXTDC_START_ISRC_RESET (AUX_TDC_TRIGSRC_START_SRC_ISRC_RESET)
171 #define AUXTDC_START_TIMER0_EV (AUX_TDC_TRIGSRC_START_SRC_TIMER0_EV)
172 #define AUXTDC_START_TIMER1_EV (AUX_TDC_TRIGSRC_START_SRC_TIMER1_EV)
173 #define AUXTDC_START_SMPH_AUTOTAKE_DONE (AUX_TDC_TRIGSRC_START_SRC_SMPH_AUTOTAKE_DONE)
174 #define AUXTDC_START_ADC_DONE (AUX_TDC_TRIGSRC_START_SRC_ADC_DONE)
175 #define AUXTDC_START_ADC_FIFO_ALMOST_FULL (AUX_TDC_TRIGSRC_START_SRC_ADC_FIFO_ALMOST_FULL)
176 #define AUXTDC_START_OBSMUX0 (AUX_TDC_TRIGSRC_START_SRC_OBSMUX0)
177 #define AUXTDC_START_OBSMUX1 (AUX_TDC_TRIGSRC_START_SRC_OBSMUX1)
178 #define AUXTDC_START_AON_SW (AUX_TDC_TRIGSRC_START_SRC_AON_SW)
179 #define AUXTDC_START_AON_PROG_WU (AUX_TDC_TRIGSRC_START_SRC_AON_PROG_WU)
180 #define AUXTDC_START_AUXIO0 (AUX_TDC_TRIGSRC_START_SRC_AUXIO0)
181 #define AUXTDC_START_AUXIO1 (AUX_TDC_TRIGSRC_START_SRC_AUXIO1)
182 #define AUXTDC_START_AUXIO2 (AUX_TDC_TRIGSRC_START_SRC_AUXIO2)
183 #define AUXTDC_START_AUXIO3 (AUX_TDC_TRIGSRC_START_SRC_AUXIO3)
184 #define AUXTDC_START_AUXIO4 (AUX_TDC_TRIGSRC_START_SRC_AUXIO4)
185 #define AUXTDC_START_AUXIO5 (AUX_TDC_TRIGSRC_START_SRC_AUXIO5)
186 #define AUXTDC_START_AUXIO6 (AUX_TDC_TRIGSRC_START_SRC_AUXIO6)
187 #define AUXTDC_START_AUXIO7 (AUX_TDC_TRIGSRC_START_SRC_AUXIO7)
188 #define AUXTDC_START_AUXIO8 (AUX_TDC_TRIGSRC_START_SRC_AUXIO8)
189 #define AUXTDC_START_AUXIO9 (AUX_TDC_TRIGSRC_START_SRC_AUXIO9)
190 #define AUXTDC_START_AUXIO10 (AUX_TDC_TRIGSRC_START_SRC_AUXIO10)
191 #define AUXTDC_START_AUXIO11 (AUX_TDC_TRIGSRC_START_SRC_AUXIO11)
192 #define AUXTDC_START_AUXIO12 (AUX_TDC_TRIGSRC_START_SRC_AUXIO12)
193 #define AUXTDC_START_AUXIO13 (AUX_TDC_TRIGSRC_START_SRC_AUXIO13)
194 #define AUXTDC_START_AUXIO14 (AUX_TDC_TRIGSRC_START_SRC_AUXIO14)
195 #define AUXTDC_START_AUXIO15 (AUX_TDC_TRIGSRC_START_SRC_AUXIO15)
196 #define AUXTDC_START_ACLK_REF (AUX_TDC_TRIGSRC_START_SRC_ACLK_REF)
197 #define AUXTDC_START_MCU_EV (AUX_TDC_TRIGSRC_START_SRC_MCU_EV)
198 #define AUXTDC_START_TDC_PRE (AUX_TDC_TRIGSRC_START_SRC_TDC_PRE)
205 #define AUXTDC_SAT_4096 (AUX_TDC_SATCFG_LIMIT_R12)
206 #define AUXTDC_SAT_8192 (AUX_TDC_SATCFG_LIMIT_R13)
207 #define AUXTDC_SAT_16384 (AUX_TDC_SATCFG_LIMIT_R14)
208 #define AUXTDC_SAT_32768 (AUX_TDC_SATCFG_LIMIT_R15)
209 #define AUXTDC_SAT_65536 (AUX_TDC_SATCFG_LIMIT_R16)
210 #define AUXTDC_SAT_131072 (AUX_TDC_SATCFG_LIMIT_R17)
211 #define AUXTDC_SAT_262144 (AUX_TDC_SATCFG_LIMIT_R18)
212 #define AUXTDC_SAT_524288 (AUX_TDC_SATCFG_LIMIT_R19)
213 #define AUXTDC_SAT_1048576 (AUX_TDC_SATCFG_LIMIT_R20)
214 #define AUXTDC_SAT_2097152 (AUX_TDC_SATCFG_LIMIT_R21)
215 #define AUXTDC_SAT_4194304 (AUX_TDC_SATCFG_LIMIT_R22)
216 #define AUXTDC_SAT_8388608 (AUX_TDC_SATCFG_LIMIT_R23)
217 #define AUXTDC_SAT_16777216 (AUX_TDC_SATCFG_LIMIT_R24)
218 #define AUXTDC_NUM_SAT_VALS 16
226 #ifdef DRIVERLIB_DEBUG
241 AUXTDCBaseValid(uint32_t ui32Base)
270 __STATIC_INLINE uint32_t
276 ASSERT(AUXTDCBaseValid(ui32Base));
281 return((HWREG(ui32Base + AUX_TDC_O_STAT) & AUX_TDC_STAT_STATE_M) >>
282 AUX_TDC_STAT_STATE_S);
381 extern void AUXTDCConfigSet(uint32_t ui32Base, uint32_t ui32StartCondition,
382 uint32_t ui32StopCondition);
404 ASSERT(AUXTDCBaseValid(ui32Base));
409 return (((HWREG(ui32Base + AUX_TDC_O_STAT) & AUX_TDC_STAT_STATE_M) ==
410 AUX_TDC_STAT_STATE_IDLE) ?
true :
false);
448 ASSERT(AUXTDCBaseValid(ui32Base));
455 HWREG(ui32Base + AUX_TDC_O_CTL) = ui32RunMode;
480 ASSERT(AUXTDCBaseValid(ui32Base));
485 HWREG(ui32Base + AUX_TDC_O_CTL) = AUX_TDC_CTL_CMD_ABORT;
520 __STATIC_INLINE uint32_t
526 ASSERT(AUXTDCBaseValid(ui32Base));
531 return (HWREG(ui32Base + AUX_TDC_O_RESULT));
572 ASSERT(AUXTDCBaseValid(ui32Base));
578 HWREG(ui32Base + AUX_TDC_O_SATCFG) = ui32Limit;
608 __STATIC_INLINE uint32_t
614 ASSERT(AUXTDCBaseValid(ui32Base));
619 return (HWREG(ui32Base + AUX_TDC_O_SATCFG));
649 ASSERT(AUXTDCBaseValid(ui32Base));
655 if(!((HWREG(ui32Base + AUX_TDC_O_STAT) & AUX_TDC_STAT_STATE_M) ==
656 AUX_TDC_STAT_STATE_IDLE))
664 HWREG(ui32Base + AUX_TDC_O_TRIGCNTCFG) = AUX_TDC_TRIGCNTCFG_EN;
693 ASSERT(AUXTDCBaseValid(ui32Base));
699 if(!((HWREG(ui32Base + AUX_TDC_O_STAT) & AUX_TDC_STAT_STATE_M) ==
700 AUX_TDC_STAT_STATE_IDLE))
708 HWREG(ui32Base + AUX_TDC_O_TRIGCNTCFG) = 0;
742 ASSERT(AUXTDCBaseValid(ui32Base));
748 if(!((HWREG(ui32Base + AUX_TDC_O_STAT) & AUX_TDC_STAT_STATE_M) ==
749 AUX_TDC_STAT_STATE_IDLE))
757 HWREG(ui32Base + AUX_TDC_O_TRIGCNTLOAD) = ui32Events;
783 __STATIC_INLINE uint32_t
789 ASSERT(AUXTDCBaseValid(ui32Base));
794 return (HWREG(ui32Base + AUX_TDC_O_TRIGCNT));
803 #if !defined(DRIVERLIB_NOROM) && !defined(DOXYGEN)
805 #ifdef ROM_AUXTDCConfigSet
806 #undef AUXTDCConfigSet
807 #define AUXTDCConfigSet ROM_AUXTDCConfigSet
809 #ifdef ROM_AUXTDCMeasurementDone
810 #undef AUXTDCMeasurementDone
811 #define AUXTDCMeasurementDone ROM_AUXTDCMeasurementDone
824 #endif // __AUX_TDC_H__
static uint32_t AUXTDCLimitGet(uint32_t ui32Base)
Get the saturation limit of the measurement.
static uint32_t AUXTDCMeasurementGet(uint32_t ui32Base)
Get the value of the latest measurement.
static uint32_t AUXTDCStatusGet(uint32_t ui32Base)
Get the status of the AUX TDC internal state machine.
void AUXTDCConfigSet(uint32_t ui32Base, uint32_t ui32StartCondition, uint32_t ui32StopCondition)
Configure the operation of the AUX TDC.
static bool AUXTDCIdle(uint32_t ui32Base)
Check if the AUX TDC is in idle mode.
#define AUXTDC_NUM_SAT_VALS
static bool AUXTDCCounterDisable(uint32_t ui32Base)
Disables the counter if possible.
static uint32_t AUXTDCCounterGet(uint32_t ui32Base)
Get the current number of counter compare/stop event to ignore before taking a measurement.
static bool AUXTDCCounterEnable(uint32_t ui32Base)
Enables the counter if possible.
static void AUXTDCIdleForce(uint32_t ui32Base)
Force the AUX TDC back to Idle mode.
static bool AUXTDCCounterSet(uint32_t ui32Base, uint32_t ui32Events)
Set the reset number of counter compare/stop event to ignore before taking a measurement.
uint32_t AUXTDCMeasurementDone(uint32_t ui32Base)
Check if the AUX TDC is done measuring.
static void AUXTDCEnable(uint32_t ui32Base, uint32_t ui32RunMode)
Enable the AUX TDC for a measurement.
static void AUXTDCLimitSet(uint32_t ui32Base, uint32_t ui32Limit)
Set the saturation limit of the measurement.