CC13xx Driver Library
rfc.h
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1 /******************************************************************************
2 * Filename: rfc.h
3 * Revised: 2015-07-23 12:59:29 +0200 (Thu, 23 Jul 2015)
4 * Revision: 44197
5 *
6 * Description: Defines and prototypes for the RF Core.
7 *
8 * Copyright (c) 2015, Texas Instruments Incorporated
9 * All rights reserved.
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions are met:
13 *
14 * 1) Redistributions of source code must retain the above copyright notice,
15 * this list of conditions and the following disclaimer.
16 *
17 * 2) Redistributions in binary form must reproduce the above copyright notice,
18 * this list of conditions and the following disclaimer in the documentation
19 * and/or other materials provided with the distribution.
20 *
21 * 3) Neither the name of the ORGANIZATION nor the names of its contributors may
22 * be used to endorse or promote products derived from this software without
23 * specific prior written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
26 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
28 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
29 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
35 * POSSIBILITY OF SUCH DAMAGE.
36 *
37 ******************************************************************************/
38 
39 //*****************************************************************************
40 //
43 //
44 //*****************************************************************************
45 
46 #ifndef __RFC_H__
47 #define __RFC_H__
48 
49 //*****************************************************************************
50 //
51 // If building with a C++ compiler, make all of the definitions in this header
52 // have a C binding.
53 //
54 //*****************************************************************************
55 #ifdef __cplusplus
56 extern "C"
57 {
58 #endif
59 
60 #include <stdbool.h>
61 #include <stdint.h>
62 #include <inc/hw_types.h>
63 #include <inc/hw_memmap.h>
64 #include <inc/hw_rfc_pwr.h>
65 #include <inc/hw_rfc_dbell.h>
66 
67 //*****************************************************************************
68 //
69 // Support for DriverLib in ROM:
70 // This section renames all functions that are not "static inline", so that
71 // calling these functions will default to implementation in flash. At the end
72 // of this file a second renaming will change the defaults to implementation in
73 // ROM for available functions.
74 //
75 // To force use of the implementation in flash, e.g. for debugging:
76 // - Globally: Define DRIVERLIB_NOROM at project level
77 // - Per function: Use prefix "NOROM_" when calling the function
78 //
79 //*****************************************************************************
80 #if !defined(DOXYGEN)
81  #define RFCCpeIntGetAndClear NOROM_RFCCpeIntGetAndClear
82 #endif
83 
84 //*****************************************************************************
85 //
86 // API Functions and prototypes
87 //
88 //*****************************************************************************
89 
90 //*****************************************************************************
91 //
99 //
100 //*****************************************************************************
101 __STATIC_INLINE void
103 {
104  //
105  // Enable all clocks
106  //
107  HWREG(RFC_PWR_NONBUF_BASE + RFC_PWR_O_PWMCLKEN) =
119 }
120 
121 //*****************************************************************************
122 //
134 //
135 //*****************************************************************************
136 __STATIC_INLINE void
138 {
139  //
140  // Disable all clocks
141  //
142  HWREG(RFC_PWR_NONBUF_BASE + RFC_PWR_O_PWMCLKEN) = 0x0;
143 }
144 
145 //*****************************************************************************
146 //
148 //
149 //*****************************************************************************
150 __STATIC_INLINE void
151 RFCCpe0IntEnable(uint32_t ui32Mask)
152 {
153  //
154  // Multiplex RF Core interrupts to CPE0 IRQ.
155  //
156  HWREG(RFC_DBELL_BASE + RFC_DBELL_O_RFCPEISL) &= ~ui32Mask;
157 
158  do
159  {
160  //
161  // Clear any pending interrupts.
162  //
163  HWREG(RFC_DBELL_BASE + RFC_DBELL_O_RFCPEIFG) = 0x0;
164  }while(HWREG(RFC_DBELL_BASE + RFC_DBELL_O_RFCPEIFG) != 0x0);
165 
166  //
167  // Enable the masked interrupts
168  //
169  HWREG(RFC_DBELL_BASE + RFC_DBELL_O_RFCPEIEN) |= ui32Mask;
170 }
171 
172 
173 //*****************************************************************************
174 //
176 //
177 //*****************************************************************************
178 __STATIC_INLINE void
179 RFCCpe1IntEnable(uint32_t ui32Mask)
180 {
181  //
182  // Multiplex RF Core interrupts to CPE1 IRQ.
183  //
184  HWREG( RFC_DBELL_BASE + RFC_DBELL_O_RFCPEISL) |= ui32Mask;
185 
186  do
187  {
188  //
189  // Clear any pending interrupts.
190  //
191  HWREG(RFC_DBELL_BASE + RFC_DBELL_O_RFCPEIFG) = 0x0;
192  }while(HWREG(RFC_DBELL_BASE + RFC_DBELL_O_RFCPEIFG) != 0x0);
193 
194  //
195  // Enable the masked interrupts
196  //
197  HWREG(RFC_DBELL_BASE + RFC_DBELL_O_RFCPEIEN) |= ui32Mask;
198 }
199 
200 
201 //*****************************************************************************
202 //
205 //
206 //*****************************************************************************
207 __STATIC_INLINE void
208 RFCHwIntEnable(uint32_t ui32Mask)
209 {
210  //
211  // Clear any pending interrupts.
212  //
213  HWREG(RFC_DBELL_BASE + RFC_DBELL_O_RFHWIFG) = 0x0;
214 
215  //
216  // Enable the masked interrupts
217  //
218  HWREG(RFC_DBELL_BASE + RFC_DBELL_O_RFHWIEN) |= ui32Mask;
219 }
220 
221 
222 //*****************************************************************************
223 //
225 //
226 //*****************************************************************************
227 __STATIC_INLINE void
228 RFCCpeIntDisable(uint32_t ui32Mask)
229 {
230  //
231  // Disable the masked interrupts
232  //
233  HWREG( RFC_DBELL_BASE + RFC_DBELL_O_RFCPEIEN ) &= ~ui32Mask;
234 
235  do
236  {
237  //
238  // Clear any pending interrupts.
239  //
240  HWREG(RFC_DBELL_BASE + RFC_DBELL_O_RFCPEIFG) = 0x0;
241  }while(HWREG(RFC_DBELL_BASE + RFC_DBELL_O_RFCPEIFG) != 0x0);
242 }
243 
244 
245 //*****************************************************************************
246 //
248 //
249 //*****************************************************************************
250 __STATIC_INLINE void
251 RFCHwIntDisable(uint32_t ui32Mask)
252 {
253  //
254  // Disable the masked interrupts
255  //
256  HWREG(RFC_DBELL_BASE + RFC_DBELL_O_RFHWIEN) &= ~ui32Mask;
257 
258  //
259  // Clear any pending interrupts.
260  //
261  HWREG(RFC_DBELL_BASE + RFC_DBELL_O_RFHWIFG) = 0x0;
262 }
263 
264 
265 //*****************************************************************************
266 //
268 //
269 //*****************************************************************************
270 extern uint32_t RFCCpeIntGetAndClear(void);
271 
272 
273 //*****************************************************************************
274 //
276 //
277 //*****************************************************************************
278 __STATIC_INLINE void
279 RFCCpeIntClear(uint32_t ui32Mask)
280 {
281  do
282  {
283  //
284  // Clear interrupts that may now be pending
285  //
286  HWREG(RFC_DBELL_BASE + RFC_DBELL_O_RFCPEIFG) &= ~ui32Mask;
287  }while(HWREG(RFC_DBELL_BASE + RFC_DBELL_O_RFCPEIFG) != ~ui32Mask);
288 }
289 
290 
291 //*****************************************************************************
292 //
294 //
295 //*****************************************************************************
296 __STATIC_INLINE void
297 RFCHwIntClear(uint32_t ui32Mask)
298 {
299  //
300  // Clear pending interrupts.
301  //
302  HWREG(RFC_DBELL_BASE + RFC_DBELL_O_RFHWIFG) &= ~ui32Mask;
303 }
304 
305 
306 //*****************************************************************************
307 //
309 //
310 //*****************************************************************************
311 __STATIC_INLINE void
313 {
314  //
315  // Clear any pending interrupts.
316  //
317  HWREG(RFC_DBELL_BASE + RFC_DBELL_O_RFACKIFG) = 0x0;
318 }
319 
320 
321 //*****************************************************************************
322 //
323 // Support for DriverLib in ROM:
324 // Redirect to implementation in ROM when available.
325 //
326 //*****************************************************************************
327 #if !defined(DRIVERLIB_NOROM) && !defined(DOXYGEN)
328  #include <driverlib/rom.h>
329  #ifdef ROM_RFCCpeIntGetAndClear
330  #undef RFCCpeIntGetAndClear
331  #define RFCCpeIntGetAndClear ROM_RFCCpeIntGetAndClear
332  #endif
333 #endif
334 
335 //*****************************************************************************
336 //
337 // Mark the end of the C bindings section for C++ compilers.
338 //
339 //*****************************************************************************
340 #ifdef __cplusplus
341 }
342 #endif
343 
344 #endif // __RFC_H__
345 
346 //*****************************************************************************
347 //
350 //
351 //*****************************************************************************
static void RFCHwIntDisable(uint32_t ui32Mask)
Disable HW interrupt.
Definition: rfc.h:251
static void RFCCpe1IntEnable(uint32_t ui32Mask)
Enable CPE1 interrupt.
Definition: rfc.h:179
static void RFCCpeIntDisable(uint32_t ui32Mask)
Disable CPE interrupt.
Definition: rfc.h:228
static void RFCCpeIntClear(uint32_t ui32Mask)
Clear interrupt flags.
Definition: rfc.h:279
static void RFCCpe0IntEnable(uint32_t ui32Mask)
Enable CPE0 interrupt.
Definition: rfc.h:151
static void RFCAckIntClear(void)
Clear interrupt flags.
Definition: rfc.h:312
uint32_t RFCCpeIntGetAndClear(void)
Get and clear CPE interrupt flags.
Definition: rfc.c:47
static void RFCClockDisable(void)
Disable the RF core clocks.
Definition: rfc.h:137
static void RFCHwIntEnable(uint32_t ui32Mask)
Definition: rfc.h:208
static void RFCHwIntClear(uint32_t ui32Mask)
Clear interrupt flags.
Definition: rfc.h:297
static void RFCClockEnable(void)
Enable the RF core clocks.
Definition: rfc.h:102