TI-RTOS for SimpleLink Wireless MCUs  2.14.03.28
Data Fields
SPICC26XX_HWAttrs Struct Reference

SPICC26XXDMA Hardware attributes. More...

#include <SPICC26XXDMA.h>

Data Fields

uint32_t baseAddr
 
uint8_t intNum
 
uint8_t intPriority
 SPI CC26XXDMA Peripheral's interrupt priority. More...
 
Power_Resource powerMngrId
 
uint16_t defaultTxBufValue
 
uint32_t rxChannelBitMask
 
uint32_t txChannelBitMask
 
PIN_Id mosiPin
 
PIN_Id misoPin
 
PIN_Id clkPin
 
PIN_Id csnPin
 

Detailed Description

SPICC26XXDMA Hardware attributes.

These fields, with the exception of intPriority, are used by driverlib APIs and therefore must be populated by driverlib macro definitions. For CC26xxWare these definitions are found in:

intPriority is the SPI peripheral's interrupt priority, as defined by the underlying OS. It is passed unmodified to the underlying OS's interrupt handler creation code, so you need to refer to the OS documentation for usage. For example, for SYS/BIOS applications, refer to the ti.sysbios.family.arm.m3.Hwi documentation for SYS/BIOS usage of interrupt priorities. If the driver uses the ti.drivers.ports interface instead of making OS calls directly, then the HwiP port handles the interrupt priority in an OS specific way. In the case of the SYS/BIOS port, intPriority is passed unmodified to Hwi_create().

A sample structure is shown below:

const SPICC26XXDMA_HWAttrs spiCC26XXDMAobjects[] = {
{
.baseAddr = SSI0_BASE,
.intNum = INT_SPI0,
.intPriority = (~0),
.powerMngrId = PERIPH_SPI0,
.rxChannelBitMask = UDMA_CHAN_SPI0_RX,
.txChannelBitMask = UDMA_CHAN_SPI0_TX,
.mosiPin = Board_SPI0_MISO,
.misoPin = Board_SPI0_MOSI,
.clkPin = Board_SPI0_CLK,
.csnPin = Board_SPI0_CSN
},
{
.baseAddr = SSI1_BASE,
.intNum = INT_SPI1,
.intPriority = (~0),
.powerMngrId = PERIPH_SPI1,
.rxChannelBitMask = UDMA_CHAN_SPI1_RX,
.txChannelBitMask = UDMA_CHAN_SPI1_TX,
.mosiPin = Board_SPI1_MISO,
.misoPin = Board_SPI1_MOSI,
.clkPin = Board_SPI1_CLK,
.csnPin = Board_SPI1_CSN
},
};

Field Documentation

uint32_t SPICC26XX_HWAttrs::baseAddr

SPI Peripheral's base address

uint8_t SPICC26XX_HWAttrs::intNum

SPI CC26XXDMA Peripheral's interrupt vector

uint8_t SPICC26XX_HWAttrs::intPriority

SPI CC26XXDMA Peripheral's interrupt priority.

The CC26xx uses three of the priority bits, meaning ~0 has the same effect as (7 << 5).

(7 << 5) will apply the lowest priority.

(1 << 5) will apply the highest priority.

Setting the priority to 0 is not supported by this driver.

HWI's with priority 0 ignore the HWI dispatcher to support zero-latency interrupts, thus invalidating the critical sections in this driver.

Power_Resource SPICC26XX_HWAttrs::powerMngrId

SPI Peripheral's power manager ID

uint16_t SPICC26XX_HWAttrs::defaultTxBufValue

Default TX value if txBuf == NULL

uint32_t SPICC26XX_HWAttrs::rxChannelBitMask

uDMA controlTable channel index

uint32_t SPICC26XX_HWAttrs::txChannelBitMask

uDMA controlTable channel index SPI MOSI pin

PIN_Id SPICC26XX_HWAttrs::mosiPin

SPI MISO pin

PIN_Id SPICC26XX_HWAttrs::misoPin

SPI CLK pin

PIN_Id SPICC26XX_HWAttrs::clkPin

SPI CSN pin

PIN_Id SPICC26XX_HWAttrs::csnPin

The documentation for this struct was generated from the following file:
Copyright 2015, Texas Instruments Incorporated