40 #include <inc/hw_memmap.h>
41 #include <inc/hw_types.h>
42 #include <inc/hw_adi.h>
43 #include <inc/hw_adi_0_rf.h>
44 #include <inc/hw_adi_1_synth.h>
45 #include <inc/hw_adi_2_refsys.h>
46 #include <inc/hw_adi_3_refsys.h>
47 #include <inc/hw_adi_4_aux.h>
48 #include <inc/hw_aon_ioc.h>
49 #include <inc/hw_aon_sysctl.h>
50 #include <inc/hw_aon_wuc.h>
51 #include <inc/hw_aux_wuc.h>
52 #include <inc/hw_ccfg.h>
53 #include <inc/hw_chip_def.h>
54 #include <inc/hw_ddi.h>
55 #include <inc/hw_flash.h>
56 #include <inc/hw_fcfg1.h>
57 #include <inc/hw_ddi_0_osc.h>
58 #include <inc/hw_prcm.h>
59 #include <inc/hw_vims.h>
60 #include <inc/hw_aon_batmon.h>
61 #include <inc/hw_aon_rtc.h>
74 #ifdef __IAR_SYSTEMS_ICC__
75 #include <intrinsics.h>
109 #define DELAY_20_USEC 0x140
121 #define CPU_DELAY_MICRO_SECONDS( x ) \
122 CPUdelay(((uint32_t)((( x ) * 48.0 ) / 5.0 )) - 1 )
130 #define CCFG_MODE_CONF_VDDR_TRIM_SLEEP_DELTA_WIDTH 4
154 uint32_t vimsCtlMode0 ;
199 uint32_t ui32Fcfg1Revision;
200 uint32_t ui32AonSysResetctl;
207 if ( ui32Fcfg1Revision == 0xFFFFFFFF ) {
208 ui32Fcfg1Revision = 0;
384 uint32_t ccfg_ModeConfReg ;
385 uint32_t currentHfClock ;
386 uint32_t ccfgExtLfClk ;
387 int32_t i32VddrSleepTrim ;
388 int32_t i32VddrSleepDelta ;
441 i32VddrSleepDelta = ((((int32_t)ccfg_ModeConfReg )
445 i32VddrSleepTrim = ( i32VddrSleepTrim + i32VddrSleepDelta + 1 );
446 if ( i32VddrSleepTrim < -10 ) {
447 i32VddrSleepTrim = -10;
507 ( 0x20 | ( ui32Trim << 1 ));
516 ( 0x10 | ( ui32Trim ));
535 ( 0x60 | ( ui32Trim << 1 ));
546 ( 0x80 | ( ui32Trim << 3 ));
558 ( 0xFC00 | ( ui32Trim << 2 ));
578 HWREGB(
AUX_DDI0_OSC_BASE + DDI_O_MASK4B + ( 0x00000004 * 2 )) = ( 0x30 | ui32Trim );
662 int32_t i32SignedVddrVal = ui32VddrTrimVal;
663 if ( i32SignedVddrVal > 0x15 ) {
664 i32SignedVddrVal -= 0x20;
666 return ( i32SignedVddrVal );
692 uint32_t ui32Fcfg1Value ;
693 uint32_t ui32XoscHfRow ;
694 uint32_t ui32XoscHfCol ;
695 int32_t i32CustomerDeltaAdjust ;
696 uint32_t ui32TrimValue ;
704 ui32XoscHfRow = (( ui32Fcfg1Value &
707 ui32XoscHfCol = (( ui32Fcfg1Value &
711 i32CustomerDeltaAdjust = 0;
719 i32CustomerDeltaAdjust = ((int32_t)ccfg_ModeConfReg << 16 ) >> 24;
721 while ( i32CustomerDeltaAdjust < 0 ) {
723 if ( ui32XoscHfCol == 0 ) {
724 ui32XoscHfCol = 0xFFFF;
726 if ( ui32XoscHfRow == 0 ) {
731 i32CustomerDeltaAdjust++;
733 while ( i32CustomerDeltaAdjust > 0 ) {
734 ui32XoscHfCol = ( ui32XoscHfCol << 1 ) | 1;
735 if ( ui32XoscHfCol > 0xFFFF ) {
737 ui32XoscHfRow = ( ui32XoscHfRow << 1 ) | 1;
738 if ( ui32XoscHfRow > 0xF ) {
740 ui32XoscHfCol = 0xFFFF;
743 i32CustomerDeltaAdjust--;
750 return (ui32TrimValue);
762 uint32_t ui32TrimValue;
778 return(ui32TrimValue);
790 uint32_t ui32TrimValue;
799 return(ui32TrimValue);
810 uint32_t ui32TrimValue;
811 uint32_t ui32Fcfg1Value;
817 ui32TrimValue = ((ui32Fcfg1Value &
821 ui32TrimValue |= (((ui32Fcfg1Value &
825 ui32TrimValue |= (((ui32Fcfg1Value &
829 ui32TrimValue |= (((ui32Fcfg1Value &
834 return(ui32TrimValue);
845 uint32_t ui32TrimValue;
846 uint32_t ui32Fcfg1Value;
852 ui32TrimValue = (((ui32Fcfg1Value &
856 ui32TrimValue |= (((ui32Fcfg1Value &
860 ui32TrimValue |= (((ui32Fcfg1Value &
864 ui32TrimValue |= (((ui32Fcfg1Value &
869 return(ui32TrimValue);
880 uint32_t ui32TrimValue ;
881 uint32_t ui32Fcfg1Value ;
882 uint32_t ibiasOffset ;
885 int32_t deltaAdjust ;
892 ibiasOffset = ( ui32Fcfg1Value &
895 ibiasInit = ( ui32Fcfg1Value &
905 deltaAdjust += (int32_t)ibiasOffset;
906 if ( deltaAdjust < 0 ) {
912 ibiasOffset = (uint32_t)deltaAdjust;
915 deltaAdjust += (int32_t)ibiasInit;
916 if ( deltaAdjust < 0 ) {
922 ibiasInit = (uint32_t)deltaAdjust;
927 ui32TrimValue |= (((ui32Fcfg1Value &
931 ui32TrimValue |= (((ui32Fcfg1Value &
935 ui32TrimValue |= (((ui32Fcfg1Value &
940 if ( ui32Fcfg1Revision >= 0x00000022 ) {
941 ui32TrimValue |= ((( ui32Fcfg1Value &
947 return(ui32TrimValue);
958 uint32_t dblrLoopFilterResetVoltageValue = 0;
960 if ( ui32Fcfg1Revision >= 0x00000020 ) {
966 return ( dblrLoopFilterResetVoltageValue );
977 uint32_t getTrimForAdcShModeEnValue = 1;
979 if ( ui32Fcfg1Revision >= 0x00000022 ) {
985 return ( getTrimForAdcShModeEnValue );
996 uint32_t getTrimForAdcShVbufEnValue = 1;
998 if ( ui32Fcfg1Revision >= 0x00000022 ) {
1004 return ( getTrimForAdcShVbufEnValue );
1015 uint32_t getTrimForXoschfCtlValue = 0;
1018 if ( ui32Fcfg1Revision >= 0x00000020 ) {
1020 getTrimForXoschfCtlValue =
1025 getTrimForXoschfCtlValue |=
1030 getTrimForXoschfCtlValue |=
1036 return ( getTrimForXoschfCtlValue );
1047 uint32_t ui32XoscHfFastStartValue ;
1054 return ( ui32XoscHfFastStartValue );
1065 uint32_t getTrimForRadcExtCfgValue = 0x403F8000;
1068 if ( ui32Fcfg1Revision >= 0x00000020 ) {
1070 getTrimForRadcExtCfgValue =
1075 getTrimForRadcExtCfgValue |=
1080 getTrimForRadcExtCfgValue |=
1086 return ( getTrimForRadcExtCfgValue );
1097 uint32_t trimForRcOscLfIBiasTrimValue = 0;
1099 if ( ui32Fcfg1Revision >= 0x00000022 ) {
1105 return ( trimForRcOscLfIBiasTrimValue );
1117 uint32_t trimForXoscLfRegulatorAndCmirrwrRatioValue = 0;
1119 if ( ui32Fcfg1Revision >= 0x00000022 ) {
1126 return ( trimForXoscLfRegulatorAndCmirrwrRatioValue );
static void SysCtrlAonSync(void)
Sync all accesses to the AON register interface.
#define IOC_PORT_AON_CLK32K
static void DDI32RegWrite(uint32_t ui32Base, uint32_t ui32Reg, uint32_t ui32Val)
Write a 32 bit value to a register in the DDI slave.
#define AUX_WUC_POWER_DOWN
static void HapiTrimDevicePowerDown(void)
Trims to be applied when coming from POWER_DOWN (also called when coming from SHUTDOWN and PIN_RESET)...
static void HapiTrimDeviceShutDown(uint32_t ui32Fcfg1Revision)
Trims to be applied when coming from SHUTDOWN (also called when coming from PIN_RESET).
static uint32_t GetTrimForRadcExtCfg(uint32_t ui32Fcfg1Revision)
Returns the trim value to be used for the RADCEXTCFG register in OSC_DIG.
void AUXWUCPowerCtrl(uint32_t ui32PowerMode)
Control the power to the AUX domain.
static uint32_t GetTrimForRcOscLfRtuneCtuneTrim(void)
Returns the trim value to be used for the RCOSCLF_RTUNE_TRIM and the RCOSCLF_CTUNE_TRIM bit fields in...
uint32_t OSCClockSourceGet(uint32_t ui32SrcClk)
Get the source clock settings.
void DDI16BitfieldWrite(uint32_t ui32Base, uint32_t ui32Reg, uint32_t ui32Mask, uint32_t ui32Shift, uint16_t ui32Data)
Write a bitfield via the DDI using 16-bit maskable write.
static uint32_t GetTrimForRcOscLfIBiasTrim(uint32_t ui32Fcfg1Revision)
static int32_t SignExtendVddrTrimValue(uint32_t ui32VddrTrimVal)
Sign extend the VDDR_TRIM setting (special format ranging from -10 to +21)
void ThisCodeIsBuiltForCC26xxHwRev22AndLater_HaltIfViolated(void)
Verifies that current chip is built for CC26xx HwRev 2.2 or later and never returns if violated...
static uint32_t GetTrimForXoscLfRegulatorAndCmirrwrRatio(uint32_t ui32Fcfg1Revision)
Returns XOSCLF_REGULATOR_TRIM and XOSCLF_CMIRRWR_RATIO as one packet spanning bits [5:0] in the retur...
static uint32_t GetTrimForAmpcompTh2(void)
Returns the trim value to be used for the AMPCOMP_TH2 register in OSC_DIG.
static uint32_t GetTrimForAnabypassValue1(uint32_t ccfg_ModeConfReg)
Returns the trim value to be used for the ANABYPASS_VALUE1 register in OSC_DIG.
static uint32_t GetTrimForDblrLoopFilterResetVoltage(uint32_t ui32Fcfg1Revision)
Returns the trim value from FCFG1 to be used as DBLR_LOOP_FILTER_RESET_VOLTAGE setting.
static void HapiTrimDeviceColdReset(void)
Trims to be applied when coming from PIN_RESET.
static uint32_t GetTrimForXoscHfFastStart(void)
Returns the trim value to be used as OSC_DIG:CTL1.XOSC_HF_FAST_START.
static uint32_t GetTrimForAdcShVbufEn(uint32_t ui32Fcfg1Revision)
Returns the trim value from FCFG1 to be used as ADC_SH_VBUF_EN setting.
#define CCFG_MODE_CONF_VDDR_TRIM_SLEEP_DELTA_WIDTH
void IOCPortConfigureSet(uint32_t ui32IOId, uint32_t ui32PortId, uint32_t ui32IOConfig)
Set the configuration of an IO port.
static uint32_t GetTrimForXoscHfCtl(uint32_t ui32Fcfg1Revision)
Returns the trim value to be used for the XOSCHFCTL register in OSC_DIG.
static uint32_t GetTrimForAdcShModeEn(uint32_t ui32Fcfg1Revision)
Returns the trim value from FCFG1 to be used as ADC_SH_MODE_EN setting.
static void SetAonRtcSubSecInc(uint32_t subSecInc)
Doing the tricky stuff needed to enter new RTCSUBSECINC value.
static uint32_t GetTrimForXoscHfIbiastherm(void)
Returns the trim value to be used for the XOSC_HF_IBIASTHERM bit field in the ANABYPASS_VALUE2 regist...
void OSCClockSourceSet(uint32_t ui32SrcClk, uint32_t ui32Osc)
Configure the oscillator input to the a source clock.
static void SetupCacheModeAccordingToCcfgSetting(void)
Set correct VIMS_MODE according to CCFG setting (CACHE or GPRAM)
static uint32_t GetTrimForAmpcompTh1(void)
Returns the trim value to be used for the AMPCOMP_TH1 register in OSC_DIG.
static uint32_t GetTrimForAmpcompCtrl(uint32_t ui32Fcfg1Revision)
Returns the trim value to be used for the AMPCOMP_CTRL register in OSC_DIG.
void trimDevice(void)
Performs the necessary trim of the device which is not done in boot code.
static void AONWUCJtagPowerOff(void)
Request power off of the JTAG domain.