module ti.sysbios.family.c66.tci66xx.CpIntc
index URL

Common Platform Interrupt Controller Manager

This module manages the CP_INTC hardware. This module supports enabling and disabling of both system and host interrupts. This module also supports mapping system interrupts to host interrupts and host interrupts to Hwis or to the EventCombiner. These functionality are supported statically and during runtime for CP_INTCs connected to the GEM interrupt controller but only during runtime for other CP_INTCs. There is a dispatch function for handling GEM hardware interrupts triggered by a system interrupt. The Global Enable Register is enabled by default in the module startup function. [ more ... ]
C synopsis target-domain sourced in ti/sysbios/family/c66/tci66xx/CpIntc.xdc
#include <ti/sysbios/family/c66/tci66xx/CpIntc.h>
Functions
Void 
CpIntc_clearSysInt// Clears the system interrupt(UInt id, UInt sysInt);
Void 
CpIntc_disableAllHostInts// Disables all host interrupts(UInt id);
Void 
CpIntc_disableHostInt// Disables the host interrupts(UInt id, UInt hostInt);
Void 
CpIntc_disableSysInt// Disables the system interrupt(UInt id, UInt sysInt);
Void 
CpIntc_dispatch// The Interrupt service routine handler for CP_INTC events(UInt hostInt);
Void 
CpIntc_dispatchPlug// Configures a CpIntc ISR dispatch entry(UInt sysInt, CpIntc_FuncPtr fxn, UArg arg, Bool unmask);
Void 
CpIntc_enableAllHostInts// Enables all host interrupts(UInt id);
Void 
CpIntc_enableHostInt// Enables the host interrupt(UInt id, UInt hostInt);
Void 
CpIntc_enableSysInt// Enables the system interrupt(UInt id, UInt sysInt);
Int 
CpIntc_getEventId// Returns the event id associated with the host interrupt(UInt hostInt);
Void 
CpIntc_mapSysIntToHostInt// Maps a system interrupt to a host interrupt(UInt id, UInt sysInt, UInt hostInt);
Void 
CpIntc_postSysInt// Triggers the system interrupt(UInt id, UInt sysInt);
Functions common to all target modules
CpIntc_Module_getMask// Returns the diagnostics mask for this module, CpIntc_Module_hasMask// Test whether this module has a diagnostics mask, CpIntc_Module_heap// The heap from which this module allocates memory, CpIntc_Module_id// Get this module's unique id, CpIntc_Module_setMask// Set the diagnostics mask for this module, CpIntc_Module_startupDone// Test if this module has completed startup
Typedefs
typedef Void 
(*CpIntc_FuncPtr// CpIntc dispatcher function type definition)(UArg);
typedef struct
CpIntc_RegisterMap// Common Platform Interrupt Controller ...
Constants
extern const Error_Id 
CpIntc_E_unpluggedSysInt// Error raised when an unplug system interrupt is executed;
 
DETAILS
This module manages the CP_INTC hardware. This module supports enabling and disabling of both system and host interrupts. This module also supports mapping system interrupts to host interrupts and host interrupts to Hwis or to the EventCombiner. These functionality are supported statically and during runtime for CP_INTCs connected to the GEM interrupt controller but only during runtime for other CP_INTCs. There is a dispatch function for handling GEM hardware interrupts triggered by a system interrupt. The Global Enable Register is enabled by default in the module startup function.
System interrupts are those interrupts generated by a hardware module in the system. These interrupts are inputs into CP_INTC. Host interrupts are the output interrupts of CP_INTC. There is a one-to-one mapping between channels and host interrupts therefore, the term "host interrupt" is also used for channels.
This modules does not support prioritization, nesting, and vectorization.
 
typedef CpIntc_FuncPtr
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CpIntc dispatcher function type definition

C synopsis target-domain
typedef Void (*CpIntc_FuncPtr)(UArg);
 
 
struct CpIntc_RegisterMap
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Common Platform Interrupt Controller

C synopsis target-domain
typedef struct CpIntc_RegisterMap {
    UInt32 REV;
    // 0x00 Revision Register
    UInt32 CR;
    // 0x04 Control Register
    UInt32 RES_08;
    // 0x08 reserved
    UInt32 HCR;
    // 0x0C Host Control Register
    UInt32 GER;
    // 0x10 Global Enable Register
    UInt32 RES_14;
    // 0x14 reserved
    UInt32 RES_18;
    // 0x18 reserved
    UInt32 GNLR;
    // 0x1C Global Nesting Level Register
    UInt32 SISR;
    // 0x20 Status Index Set Register
    UInt32 SICR;
    // 0x24 Status Index Clear Register
    UInt32 EISR;
    // 0x28 Enable Index Set Register
    UInt32 EICR;
    // 0x2C Enable Index Clear Register
    UInt32 GWER;
    // 0x30 Global Wakeup Enable Register
    UInt32 HIEISR;
    // 0x34 Host Int Enable Index Set Register
    UInt32 HIDISR;
    // 0x38 Host Int Disable Index Set Register
    UInt32 RES_3C;
    // 0x3C reserved
    UInt32 PPR;
    // 0x40 Pacer Prescale Register
    UInt32 RES_44;
    // 0x44 reserved
    UInt32 RES_48;
    // 0x48 reserved
    UInt32 RES_4C;
    // 0x4C reserved
    Ptr *VBR;
    // 0x50 Vector Base Register
    UInt32 VSR;
    // 0x54 Vector Size Register
    Ptr VNR;
    // 0x58 Vector Null Register
    UInt32 RES_5C[9];
    // 0x5C-0x7C reserved
    Int32 GPIR;
    // 0x80 Global Prioritized Index Register
    Ptr *GPVR;
    // 0x84 Global Prioritized Vector Register
    UInt32 RES_88;
    // 0x88 reserved
    UInt32 RES_8C;
    // 0x8C reserved
    UInt32 GSIER;
    // 0x90 Global Secure Interrupt Enable Register
    UInt32 SPIR;
    // 0x94 Secure Prioritized Index Register
    UInt32 RES_98[26];
    // 0x98-0xFC reserved
    UInt32 PPMR[64];
    // 0x100-0x1FC Pacer Parameter/Map Registers
    UInt32 SRSR[32];
    // 0x200-0x27C Status Raw/Set Registers
    UInt32 SECR[32];
    // 0x280-0x2FC Status Enabled/Clear Registers
    UInt32 ESR[32];
    // 0x300-0x37C Enable Set Registers
    UInt32 ECR[32];
    // 0x380-0x3FC Enable Clear Registers
    UInt8 CMR[1024];
    // 0x400-0x7FC Channel Map Registers
    UInt8 HIMR[256];
    // 0x800-0x8FC Host Interrupt Map Registers
    UInt32 HIPIR[256];
    // 0x900-0xCFC Host Interrupt Pri Index Registers
    UInt32 PR[32];
    // 0xD00-0xD7C Polarity Registers
    UInt32 TR[32];
    // 0xD80-0xDFC Type Registers
    UInt32 WER[64];
    // 0xE00-0xEFC Wakeup Enable Registers
    UInt32 DSR[64];
    // 0xF00-0xFFC Debug Select Registers
    UInt32 SER[32];
    // 0x1000-0x107C Secure Enable Registers
    UInt32 SDR[32];
    // 0x1080-0x10FC Secure Disable Registers
    UInt32 HINLR[256];
    // 0x1100-0x14FC Host Interrupt Nesting Level Registers
    UInt32 HIER[8];
    // 0x1500-0x151F Host Interrupt Enable Registers
    UInt32 RES1520[56];
    // 0x1520-0x15fC Reserved
    Ptr *HIPVR[256];
    // 0x1600-0x19fC Host Interrupt Prioritized Vector
    UInt32 RES1A00[384];
    // 0x1A00-0x1FFC Reserved
} CpIntc_RegisterMap;
 
 
config CpIntc_E_unpluggedSysInt  // module-wide
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Error raised when an unplug system interrupt is executed

C synopsis target-domain
extern const Error_Id CpIntc_E_unpluggedSysInt;
 
 
CpIntc_clearSysInt()  // module-wide
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Clears the system interrupt

C synopsis target-domain
Void CpIntc_clearSysInt(UInt id, UInt sysInt);
 
ARGUMENTS
id — Cp_Intc number
sysInt — system interrupt number
DETAILS
Writes the system interrupt number to the System Interrupt Status Indexed Clear Register.
 
CpIntc_disableAllHostInts()  // module-wide
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Disables all host interrupts

C synopsis target-domain
Void CpIntc_disableAllHostInts(UInt id);
 
ARGUMENTS
id — Cp_Intc number
DETAILS
Writes a 0 to the Global Enable Register. It does not override the individual host interrupt enable/disable bits.
 
CpIntc_disableHostInt()  // module-wide
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Disables the host interrupts

C synopsis target-domain
Void CpIntc_disableHostInt(UInt id, UInt hostInt);
 
ARGUMENTS
id — Cp_Intc number
hostInt — host interrupt number
DETAILS
Writes the host interrupt number to the Host Interrupt Enable Index Clear Register.
 
CpIntc_disableSysInt()  // module-wide
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Disables the system interrupt

C synopsis target-domain
Void CpIntc_disableSysInt(UInt id, UInt sysInt);
 
ARGUMENTS
id — Cp_Intc number
sysInt — system interrupt number
DETAILS
Writes the system interrupt number to the System Interrupt Enable Indexed Clear Register.
 
CpIntc_dispatch()  // module-wide
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The Interrupt service routine handler for CP_INTC events

C synopsis target-domain
Void CpIntc_dispatch(UInt hostInt);
 
ARGUMENTS
hostInt — host interrupt number
DETAILS
It is used internally, but can also be used by the user.
 
CpIntc_dispatchPlug()  // module-wide
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Configures a CpIntc ISR dispatch entry

C synopsis target-domain
Void CpIntc_dispatchPlug(UInt sysInt, CpIntc_FuncPtr fxn, UArg arg, Bool unmask);
 
ARGUMENTS
sysInt — system interrupt number
fxn — function
arg — argument to function
unmask — bool to unmask interrupt
DETAILS
Plugs the function and argument for the specified system interrupt. Also enables the system interrupt if 'unmask' is set to 'true'. Function does not map the system interrupt to a Hwi interrupt.
 
CpIntc_enableAllHostInts()  // module-wide
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Enables all host interrupts

C synopsis target-domain
Void CpIntc_enableAllHostInts(UInt id);
 
ARGUMENTS
id — Cp_Intc number
DETAILS
Writes a 1 to the Global Enable Register. It does not override the individual host interrupt enable/disable bits.
 
CpIntc_enableHostInt()  // module-wide
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Enables the host interrupt

C synopsis target-domain
Void CpIntc_enableHostInt(UInt id, UInt hostInt);
 
ARGUMENTS
id — Cp_Intc number
hostInt — host interrupt number
DETAILS
Writes the host interrupt number to the Host Interrupt Enable Indexed Set Register.
 
CpIntc_enableSysInt()  // module-wide
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Enables the system interrupt

C synopsis target-domain
Void CpIntc_enableSysInt(UInt id, UInt sysInt);
 
ARGUMENTS
id — Cp_Intc number
sysInt — system interrupt number
DETAILS
Writes the system interrupt number to the System Interrupt Enable Indexed Set Register.
 
CpIntc_getEventId()  // module-wide
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Returns the event id associated with the host interrupt

C synopsis target-domain
Int CpIntc_getEventId(UInt hostInt);
 
ARGUMENTS
hostInt — host interrupt number
 
CpIntc_mapSysIntToHostInt()  // module-wide
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Maps a system interrupt to a host interrupt

C synopsis target-domain
Void CpIntc_mapSysIntToHostInt(UInt id, UInt sysInt, UInt hostInt);
 
ARGUMENTS
id — Cp_Intc number
sysInt — system interrupt number
hostInt — host interrupt number
DETAILS
Writes the Channel Map Register to map a system interrupt to a channel. There is a 1 to 1 mapping between channels and host interrupts.
 
CpIntc_postSysInt()  // module-wide
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Triggers the system interrupt

C synopsis target-domain
Void CpIntc_postSysInt(UInt id, UInt sysInt);
 
ARGUMENTS
id — Cp_Intc number
sysInt — system interrupt number
DETAILS
Writes the system interrupt number to the System Interrupt Status Index Set Register. Used for diagnostic and test purposes only.
Module-Wide Built-Ins
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C synopsis target-domain
Types_ModuleId CpIntc_Module_id();
// Get this module's unique id
 
Bool CpIntc_Module_startupDone();
// Test if this module has completed startup
 
IHeap_Handle CpIntc_Module_heap();
// The heap from which this module allocates memory
 
Bool CpIntc_Module_hasMask();
// Test whether this module has a diagnostics mask
 
Bits16 CpIntc_Module_getMask();
// Returns the diagnostics mask for this module
 
Void CpIntc_Module_setMask(Bits16 mask);
// Set the diagnostics mask for this module
 
XDCscript usage meta-domain sourced in ti/sysbios/family/c66/tci66xx/CpIntc.xdc
var CpIntc = xdc.useModule('ti.sysbios.family.c66.tci66xx.CpIntc');
module-wide constants & types
    var obj = new CpIntc.RegisterMap// Common Platform Interrupt Controller;
        obj.REV// 0x00 Revision Register = UInt32  ...
        obj.CR// 0x04 Control Register = UInt32  ...
        obj.RES_08// 0x08 reserved = UInt32  ...
        obj.HCR// 0x0C Host Control Register = UInt32  ...
        obj.GER// 0x10 Global Enable Register = UInt32  ...
        obj.RES_14// 0x14 reserved = UInt32  ...
        obj.RES_18// 0x18 reserved = UInt32  ...
        obj.GNLR// 0x1C Global Nesting Level Register = UInt32  ...
        obj.SISR// 0x20 Status Index Set Register = UInt32  ...
        obj.SICR// 0x24 Status Index Clear Register = UInt32  ...
        obj.EISR// 0x28 Enable Index Set Register = UInt32  ...
        obj.EICR// 0x2C Enable Index Clear Register = UInt32  ...
        obj.GWER// 0x30 Global Wakeup Enable Register = UInt32  ...
        obj.HIEISR// 0x34 Host Int Enable Index Set Register = UInt32  ...
        obj.HIDISR// 0x38 Host Int Disable Index Set Register = UInt32  ...
        obj.RES_3C// 0x3C reserved = UInt32  ...
        obj.PPR// 0x40 Pacer Prescale Register = UInt32  ...
        obj.RES_44// 0x44 reserved = UInt32  ...
        obj.RES_48// 0x48 reserved = UInt32  ...
        obj.RES_4C// 0x4C reserved = UInt32  ...
        obj.VBR// 0x50 Vector Base Register = Ptr*  ...
        obj.VSR// 0x54 Vector Size Register = UInt32  ...
        obj.VNR// 0x58 Vector Null Register = Ptr  ...
        obj.RES_5C// 0x5C-0x7C reserved = UInt32[9]  ...
        obj.GPIR// 0x80 Global Prioritized Index Register = Int32  ...
        obj.GPVR// 0x84 Global Prioritized Vector Register = Ptr*  ...
        obj.RES_88// 0x88 reserved = UInt32  ...
        obj.RES_8C// 0x8C reserved = UInt32  ...
        obj.GSIER// 0x90 Global Secure Interrupt Enable Register = UInt32  ...
        obj.SPIR// 0x94 Secure Prioritized Index Register = UInt32  ...
        obj.RES_98// 0x98-0xFC reserved = UInt32[26]  ...
        obj.PPMR// 0x100-0x1FC Pacer Parameter/Map Registers = UInt32[64]  ...
        obj.SRSR// 0x200-0x27C Status Raw/Set Registers = UInt32[32]  ...
        obj.SECR// 0x280-0x2FC Status Enabled/Clear Registers = UInt32[32]  ...
        obj.ESR// 0x300-0x37C Enable Set Registers = UInt32[32]  ...
        obj.ECR// 0x380-0x3FC Enable Clear Registers = UInt32[32]  ...
        obj.CMR// 0x400-0x7FC Channel Map Registers = UInt8[1024]  ...
        obj.HIMR// 0x800-0x8FC Host Interrupt Map Registers = UInt8[256]  ...
        obj.HIPIR// 0x900-0xCFC Host Interrupt Pri Index Registers = UInt32[256]  ...
        obj.PR// 0xD00-0xD7C Polarity Registers = UInt32[32]  ...
        obj.TR// 0xD80-0xDFC Type Registers = UInt32[32]  ...
        obj.WER// 0xE00-0xEFC Wakeup Enable Registers = UInt32[64]  ...
        obj.DSR// 0xF00-0xFFC Debug Select Registers = UInt32[64]  ...
        obj.SER// 0x1000-0x107C Secure Enable Registers = UInt32[32]  ...
        obj.SDR// 0x1080-0x10FC Secure Disable Registers = UInt32[32]  ...
        obj.HINLR// 0x1100-0x14FC Host Interrupt Nesting Level Registers = UInt32[256]  ...
        obj.HIER// 0x1500-0x151F Host Interrupt Enable Registers = UInt32[8]  ...
        obj.RES1520// 0x1520-0x15fC Reserved = UInt32[56]  ...
        obj.HIPVR// 0x1600-0x19fC Host Interrupt Prioritized Vector = Ptr*[256]  ...
        obj.RES1A00// 0x1A00-0x1FFC Reserved = UInt32[384]  ...
 
    var obj = new CpIntc.SysIntObj// System Interrupt Object;
        obj.fxn = Void(*)(UArg)  ...
        obj.arg = UArg  ...
        obj.hostInt = UInt8  ...
        obj.enable = Bool  ...
module-wide config parameters
    CpIntc.E_unpluggedSysInt// Error raised when an unplug system interrupt is executed = Error.Desc {
        msg: "E_unpluggedSysInt: System Interrupt# %d is unplugged"
    };
 
    CpIntc.common$// Common module configuration parameters = Types.Common$ undefined;
    CpIntc.sysInts// Use for configuring the system interrupts = CpIntc.SysIntObj[] undefined;
module-wide functions
    CpIntc.getEventIdMeta// Returns the GEM event id associated with the host interrupt(UInt hostInt) returns Int
    CpIntc.mapHostIntToEventCombinerMeta// Maps the host interrupt to the Event Combiner(UInt hostInt) returns Void
    CpIntc.mapHostIntToHwiMeta// Maps the host interrupt to a Hwi(UInt hostInt, UInt hwiNum) returns Void
 
 
struct CpIntc.RegisterMap
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Common Platform Interrupt Controller

XDCscript usage meta-domain
var obj = new CpIntc.RegisterMap;
 
    obj.REV = UInt32  ...
    // 0x00 Revision Register
    obj.CR = UInt32  ...
    // 0x04 Control Register
    obj.RES_08 = UInt32  ...
    // 0x08 reserved
    obj.HCR = UInt32  ...
    // 0x0C Host Control Register
    obj.GER = UInt32  ...
    // 0x10 Global Enable Register
    obj.RES_14 = UInt32  ...
    // 0x14 reserved
    obj.RES_18 = UInt32  ...
    // 0x18 reserved
    obj.GNLR = UInt32  ...
    // 0x1C Global Nesting Level Register
    obj.SISR = UInt32  ...
    // 0x20 Status Index Set Register
    obj.SICR = UInt32  ...
    // 0x24 Status Index Clear Register
    obj.EISR = UInt32  ...
    // 0x28 Enable Index Set Register
    obj.EICR = UInt32  ...
    // 0x2C Enable Index Clear Register
    obj.GWER = UInt32  ...
    // 0x30 Global Wakeup Enable Register
    obj.HIEISR = UInt32  ...
    // 0x34 Host Int Enable Index Set Register
    obj.HIDISR = UInt32  ...
    // 0x38 Host Int Disable Index Set Register
    obj.RES_3C = UInt32  ...
    // 0x3C reserved
    obj.PPR = UInt32  ...
    // 0x40 Pacer Prescale Register
    obj.RES_44 = UInt32  ...
    // 0x44 reserved
    obj.RES_48 = UInt32  ...
    // 0x48 reserved
    obj.RES_4C = UInt32  ...
    // 0x4C reserved
    obj.VBR = Ptr*  ...
    // 0x50 Vector Base Register
    obj.VSR = UInt32  ...
    // 0x54 Vector Size Register
    obj.VNR = Ptr  ...
    // 0x58 Vector Null Register
    obj.RES_5C = UInt32[9]  ...
    // 0x5C-0x7C reserved
    obj.GPIR = Int32  ...
    // 0x80 Global Prioritized Index Register
    obj.GPVR = Ptr*  ...
    // 0x84 Global Prioritized Vector Register
    obj.RES_88 = UInt32  ...
    // 0x88 reserved
    obj.RES_8C = UInt32  ...
    // 0x8C reserved
    obj.GSIER = UInt32  ...
    // 0x90 Global Secure Interrupt Enable Register
    obj.SPIR = UInt32  ...
    // 0x94 Secure Prioritized Index Register
    obj.RES_98 = UInt32[26]  ...
    // 0x98-0xFC reserved
    obj.PPMR = UInt32[64]  ...
    // 0x100-0x1FC Pacer Parameter/Map Registers
    obj.SRSR = UInt32[32]  ...
    // 0x200-0x27C Status Raw/Set Registers
    obj.SECR = UInt32[32]  ...
    // 0x280-0x2FC Status Enabled/Clear Registers
    obj.ESR = UInt32[32]  ...
    // 0x300-0x37C Enable Set Registers
    obj.ECR = UInt32[32]  ...
    // 0x380-0x3FC Enable Clear Registers
    obj.CMR = UInt8[1024]  ...
    // 0x400-0x7FC Channel Map Registers
    obj.HIMR = UInt8[256]  ...
    // 0x800-0x8FC Host Interrupt Map Registers
    obj.HIPIR = UInt32[256]  ...
    // 0x900-0xCFC Host Interrupt Pri Index Registers
    obj.PR = UInt32[32]  ...
    // 0xD00-0xD7C Polarity Registers
    obj.TR = UInt32[32]  ...
    // 0xD80-0xDFC Type Registers
    obj.WER = UInt32[64]  ...
    // 0xE00-0xEFC Wakeup Enable Registers
    obj.DSR = UInt32[64]  ...
    // 0xF00-0xFFC Debug Select Registers
    obj.SER = UInt32[32]  ...
    // 0x1000-0x107C Secure Enable Registers
    obj.SDR = UInt32[32]  ...
    // 0x1080-0x10FC Secure Disable Registers
    obj.HINLR = UInt32[256]  ...
    // 0x1100-0x14FC Host Interrupt Nesting Level Registers
    obj.HIER = UInt32[8]  ...
    // 0x1500-0x151F Host Interrupt Enable Registers
    obj.RES1520 = UInt32[56]  ...
    // 0x1520-0x15fC Reserved
    obj.HIPVR = Ptr*[256]  ...
    // 0x1600-0x19fC Host Interrupt Prioritized Vector
    obj.RES1A00 = UInt32[384]  ...
    // 0x1A00-0x1FFC Reserved
 
C SYNOPSIS
CpIntc_RegisterMap
 
metaonly struct CpIntc.SysIntObj
index URL

System Interrupt Object

XDCscript usage meta-domain
var obj = new CpIntc.SysIntObj;
 
    obj.fxn = Void(*)(UArg)  ...
    obj.arg = UArg  ...
    obj.hostInt = UInt8  ...
    obj.enable = Bool  ...
 
 
config CpIntc.E_unpluggedSysInt  // module-wide
index URL

Error raised when an unplug system interrupt is executed

XDCscript usage meta-domain
CpIntc.E_unpluggedSysInt = Error.Desc {
    msg: "E_unpluggedSysInt: System Interrupt# %d is unplugged"
};
 
C SYNOPSIS
CpIntc_E_unpluggedSysInt
 
metaonly config CpIntc.common$  // module-wide
index URL

Common module configuration parameters

XDCscript usage meta-domain
CpIntc.common$ = Types.Common$ undefined;
 
DETAILS
All modules have this configuration parameter. Its name contains the '$' character to ensure it does not conflict with configuration parameters declared by the module. This allows new configuration parameters to be added in the future without any chance of breaking existing modules.
 
metaonly config CpIntc.sysInts  // module-wide
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Use for configuring the system interrupts

XDCscript usage meta-domain
CpIntc.sysInts = CpIntc.SysIntObj[] undefined;
 
DETAILS
During static configuration this array can be used to configure the function to execute when a system interrupt is triggered, the arg to the function, the host interrupt to which the system interrupt is mapped too, and whether to enable the system interrupt.
 
metaonly CpIntc.getEventIdMeta()  // module-wide
index URL

Returns the GEM event id associated with the host interrupt

XDCscript usage meta-domain
CpIntc.getEventIdMeta(UInt hostInt) returns Int
 
ARGUMENTS
hostInt — host interrupt number
DETAILS
If no event id is associated with the host interrupt, the value -1 will be returned.
 
metaonly CpIntc.mapHostIntToEventCombinerMeta()  // module-wide
index URL

Maps the host interrupt to the Event Combiner

XDCscript usage meta-domain
CpIntc.mapHostIntToEventCombinerMeta(UInt hostInt) returns Void
 
ARGUMENTS
hostInt — host interrupt number
DETAILS
The GEM event corresponding to the 'hostInt' in the Event Combiner will be unmask but the event group will not be dispatched. The Event Combiner function for this event will be set to the dispatch function and argument set to 'hostInt'. The event group must be dispatched from the Event Combiner Module.
 
metaonly CpIntc.mapHostIntToHwiMeta()  // module-wide
index URL

Maps the host interrupt to a Hwi

XDCscript usage meta-domain
CpIntc.mapHostIntToHwiMeta(UInt hostInt, UInt hwiNum) returns Void
 
ARGUMENTS
hostInt — host interrupt number
hwiNum — Hwi number
DETAILS
A Hwi object will be created with the 'hwiNum', the function set as the dispatch function and argument set to 'hostInt'.
generated on Thu, 01 Mar 2012 16:57:14 GMT