metaonly interface ti.catalog.msp430.IMSP430F55xx
index URL
XDCspec summary sourced in ti/catalog/msp430/IMSP430F55xx.xdc
metaonly interface IMSP430F55xx {  ...
// inherits ti.catalog.msp430.IMSP430
    // inherits ti.catalog.ICpuDataSheet
        // inherits xdc.platform.ICpuDataSheet
instance:  ...
XDCspec declarations sourced in ti/catalog/msp430/IMSP430F55xx.xdc
package ti.catalog.msp430;
 
metaonly interface IMSP430F55xx inherits IMSP430 {
 
 
instance:
per-instance config parameters
    config Timer0_A5.Instance TA0// ;
    config Timer1_A3.Instance TA1// ;
    config Timer2_A3.Instance TA2// ;
    config Timer0_B7.Instance TB0// ;
    config IPlatform.Memory commonMap// Memory map elements shared by all MSP430F55xx devices[string] = [
        [
            "PERIPHERALS",
            {
                comment: "Memory mapped peripherals",
                name: "PERIPHERALS",
                base: 0x0,
                len: 0x1000,
                space: "io",
                access: "RW"
            }
        ],
        [
            "BSL",
            {
                comment: "Bootstrap loader (flash)",
                name: "BSL",
                base: 0x1000,
                len: 0x800,
                space: "code",
                access: "RW"
            }
        ],
        [
            "INFOD",
            {
                comment: "Information Memory D (flash)",
                name: "INFOD",
                base: 0x1800,
                len: 0x80,
                space: "data",
                access: "RW"
            }
        ],
        [
            "INFOC",
            {
                comment: "Information Memory C (flash)",
                name: "INFOC",
                base: 0x1880,
                len: 0x80,
                space: "data",
                access: "RW"
            }
        ],
        [
            "INFOB",
            {
                comment: "Information Memory B (flash)",
                name: "INFOB",
                base: 0x1900,
                len: 0x80,
                space: "data",
                access: "RW"
            }
        ],
        [
            "INFOA",
            {
                comment: "Information Memory A (flash)",
                name: "INFOA",
                base: 0x1980,
                len: 0x80,
                space: "data",
                access: "RW"
            }
        ],
        [
            "INT00",
            {
                comment: "Reserved Vector",
                name: "INT00",
                base: 0xFF80,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT01",
            {
                comment: "Reserved Vector",
                name: "INT01",
                base: 0xFF82,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT02",
            {
                comment: "Reserved Vector",
                name: "INT02",
                base: 0xFF84,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT03",
            {
                comment: "Reserved Vector",
                name: "INT03",
                base: 0xFF86,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT04",
            {
                comment: "Reserved Vector",
                name: "INT04",
                base: 0xFF88,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT05",
            {
                comment: "Reserved Vector",
                name: "INT05",
                base: 0xFF8A,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT06",
            {
                comment: "Reserved Vector",
                name: "INT06",
                base: 0xFF8C,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT07",
            {
                comment: "Reserved Vector",
                name: "INT07",
                base: 0xFF8E,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT08",
            {
                comment: "Reserved Vector",
                name: "INT08",
                base: 0xFF90,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT09",
            {
                comment: "Reserved Vector",
                name: "INT09",
                base: 0xFF92,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT10",
            {
                comment: "Reserved Vector",
                name: "INT10",
                base: 0xFF94,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT11",
            {
                comment: "Reserved Vector",
                name: "INT11",
                base: 0xFF96,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT12",
            {
                comment: "Reserved Vector",
                name: "INT12",
                base: 0xFF98,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT13",
            {
                comment: "Reserved Vector",
                name: "INT13",
                base: 0xFF9A,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT14",
            {
                comment: "Reserved Vector",
                name: "INT14",
                base: 0xFF9C,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT15",
            {
                comment: "Reserved Vector",
                name: "INT15",
                base: 0xFF9E,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT16",
            {
                comment: "Reserved Vector",
                name: "INT16",
                base: 0xFFA0,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT17",
            {
                comment: "Reserved Vector",
                name: "INT17",
                base: 0xFFA2,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT18",
            {
                comment: "Reserved Vector",
                name: "INT18",
                base: 0xFFA4,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT19",
            {
                comment: "Reserved Vector",
                name: "INT19",
                base: 0xFFA6,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT20",
            {
                comment: "Reserved Vector",
                name: "INT20",
                base: 0xFFA8,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT21",
            {
                comment: "Reserved Vector",
                name: "INT21",
                base: 0xFFAA,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT22",
            {
                comment: "Reserved Vector",
                name: "INT22",
                base: 0xFFAC,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT23",
            {
                comment: "Reserved Vector",
                name: "INT23",
                base: 0xFFAE,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT24",
            {
                comment: "Reserved Vector",
                name: "INT24",
                base: 0xFFB0,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT25",
            {
                comment: "Reserved Vector",
                name: "INT25",
                base: 0xFFB2,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT26",
            {
                comment: "Reserved Vector",
                name: "INT26",
                base: 0xFFB4,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT27",
            {
                comment: "Reserved Vector",
                name: "INT27",
                base: 0xFFB6,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT28",
            {
                comment: "Reserved Vector",
                name: "INT28",
                base: 0xFFB8,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT29",
            {
                comment: "Reserved Vector",
                name: "INT29",
                base: 0xFFBA,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT30",
            {
                comment: "Reserved Vector",
                name: "INT30",
                base: 0xFFBC,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT31",
            {
                comment: "Reserved Vector",
                name: "INT31",
                base: 0xFFBE,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT32",
            {
                comment: "Reserved Vector",
                name: "INT32",
                base: 0xFFC0,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT33",
            {
                comment: "Reserved Vector",
                name: "INT33",
                base: 0xFFC2,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT34",
            {
                comment: "Reserved Vector",
                name: "INT34",
                base: 0xFFC4,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT35",
            {
                comment: "Reserved Vector",
                name: "INT35",
                base: 0xFFC6,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT36",
            {
                comment: "Reserved Vector",
                name: "INT36",
                base: 0xFFC8,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT37",
            {
                comment: "Reserved Vector",
                name: "INT37",
                base: 0xFFCA,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT38",
            {
                comment: "Reserved Vector",
                name: "INT38",
                base: 0xFFCC,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT39",
            {
                comment: "Reserved Vector",
                name: "INT39",
                base: 0xFFCE,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT40",
            {
                comment: "Reserved Vector",
                name: "INT40",
                base: 0xFFD0,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT41",
            {
                comment: "RTC_A Vector",
                name: "INT41",
                base: 0xFFD2,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT42",
            {
                comment: "I/O Port P2 Vector",
                name: "INT42",
                base: 0xFFD4,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT43",
            {
                comment: "TA2 CCR1-CCR2 Vector",
                name: "INT43",
                base: 0xFFD6,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT44",
            {
                comment: "TA2 CCR0 Vector",
                name: "INT44",
                base: 0xFFD8,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT45",
            {
                comment: "USCI_B1 Receive/Transmit Vector",
                name: "INT45",
                base: 0xFFDA,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT46",
            {
                comment: "USCI_A1 Receive/Transmit Vector",
                name: "INT46",
                base: 0xFFDC,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT47",
            {
                comment: "I/O Port P1 Vector",
                name: "INT47",
                base: 0xFFDE,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT48",
            {
                comment: "TA1 CCR1-CCR2 Vector",
                name: "INT48",
                base: 0xFFE0,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT49",
            {
                comment: "TA1 CCR0 Vector",
                name: "INT49",
                base: 0xFFE2,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT50",
            {
                comment: "DMA Vector",
                name: "INT50",
                base: 0xFFE4,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT51",
            {
                comment: "USB_UBM Vector",
                name: "INT51",
                base: 0xFFE6,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT52",
            {
                comment: "TA0 CCR1-CCR4 Vector",
                name: "INT52",
                base: 0xFFE8,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT53",
            {
                comment: "TA0 CCR0 Vector",
                name: "INT53",
                base: 0xFFEA,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT54",
            {
                comment: "ADC12_A Vector",
                name: "INT54",
                base: 0xFFEC,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT55",
            {
                comment: "USCI_B0 Receive/Transmit Vector",
                name: "INT55",
                base: 0xFFEE,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT56",
            {
                comment: "USCI_A0 Receive/Transmit Vector",
                name: "INT56",
                base: 0xFFF0,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT57",
            {
                comment: "Watchdog Timer_A Interval Timer Mode Vector",
                name: "INT57",
                base: 0xFFF2,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT58",
            {
                comment: "TB0 CCR1-CCR6 Vector",
                name: "INT58",
                base: 0xFFF4,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT59",
            {
                comment: "TB0 CCR0 Vector",
                name: "INT59",
                base: 0xFFF6,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT60",
            {
                comment: "Comp_B Vector",
                name: "INT60",
                base: 0xFFF8,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT61",
            {
                comment: "User NMI Vector",
                name: "INT61",
                base: 0xFFFA,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT62",
            {
                comment: "System NMI Vector",
                name: "INT62",
                base: 0xFFFC,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "RESET",
            {
                comment: "Reset Vector",
                name: "RESET",
                base: 0xFFFE,
                len: 0x2,
                space: "data"
            }
        ]
    ];
    override config String cpuCore// A string identifying the CPU Core = "MSP430X";
    config String cpuCoreRevision// A string that uniquely identifies a revision of the core;
    override config Int dataWordSize// The size of an int on the target in 8-bit bytes = 2;
    config String deviceHeader// The optional header file that define device specific constants and structures;
    config Interrupt_Controller.Instance interruptController// ;
    config IE1.Instance interruptEnableRegister1// ;
    override config Int minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = 1;
    override config Int minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = 1;
    config IPeripheral.Instance peripherals// A map of peripherals available on the device[string];
    config Float vcc// Stores current system VCC value in CFG script = 0;
    config WDTplus.Instance wdtPlus// ;
per-instance creation
    create// Create an instance-object(String revision);
per-instance functions
    function getMemoryMap// Get the memory map that corresponds to the values of the specified registers(registers);
    function getRegisterSet// The set of valid register names for this CPU();
}
 
config IMSP430F55xx.TA0  // instance
index URL
XDCspec declarations sourced in ti/catalog/msp430/IMSP430F55xx.xdc
config Timer0_A5.Instance TA0;
 
 
config IMSP430F55xx.TA1  // instance
index URL
XDCspec declarations sourced in ti/catalog/msp430/IMSP430F55xx.xdc
config Timer1_A3.Instance TA1;
 
 
config IMSP430F55xx.TA2  // instance
index URL
XDCspec declarations sourced in ti/catalog/msp430/IMSP430F55xx.xdc
config Timer2_A3.Instance TA2;
 
 
config IMSP430F55xx.TB0  // instance
index URL
XDCspec declarations sourced in ti/catalog/msp430/IMSP430F55xx.xdc
config Timer0_B7.Instance TB0;
 
 
config IMSP430F55xx.commonMap  // instance
index URL

Memory map elements shared by all MSP430F55xx devices

XDCspec declarations sourced in ti/catalog/msp430/IMSP430F55xx.xdc
config IPlatform.Memory commonMap[string] = [
    [
        "PERIPHERALS",
        {
            comment: "Memory mapped peripherals",
            name: "PERIPHERALS",
            base: 0x0,
            len: 0x1000,
            space: "io",
            access: "RW"
        }
    ],
    [
        "BSL",
        {
            comment: "Bootstrap loader (flash)",
            name: "BSL",
            base: 0x1000,
            len: 0x800,
            space: "code",
            access: "RW"
        }
    ],
    [
        "INFOD",
        {
            comment: "Information Memory D (flash)",
            name: "INFOD",
            base: 0x1800,
            len: 0x80,
            space: "data",
            access: "RW"
        }
    ],
    [
        "INFOC",
        {
            comment: "Information Memory C (flash)",
            name: "INFOC",
            base: 0x1880,
            len: 0x80,
            space: "data",
            access: "RW"
        }
    ],
    [
        "INFOB",
        {
            comment: "Information Memory B (flash)",
            name: "INFOB",
            base: 0x1900,
            len: 0x80,
            space: "data",
            access: "RW"
        }
    ],
    [
        "INFOA",
        {
            comment: "Information Memory A (flash)",
            name: "INFOA",
            base: 0x1980,
            len: 0x80,
            space: "data",
            access: "RW"
        }
    ],
    [
        "INT00",
        {
            comment: "Reserved Vector",
            name: "INT00",
            base: 0xFF80,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT01",
        {
            comment: "Reserved Vector",
            name: "INT01",
            base: 0xFF82,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT02",
        {
            comment: "Reserved Vector",
            name: "INT02",
            base: 0xFF84,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT03",
        {
            comment: "Reserved Vector",
            name: "INT03",
            base: 0xFF86,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT04",
        {
            comment: "Reserved Vector",
            name: "INT04",
            base: 0xFF88,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT05",
        {
            comment: "Reserved Vector",
            name: "INT05",
            base: 0xFF8A,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT06",
        {
            comment: "Reserved Vector",
            name: "INT06",
            base: 0xFF8C,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT07",
        {
            comment: "Reserved Vector",
            name: "INT07",
            base: 0xFF8E,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT08",
        {
            comment: "Reserved Vector",
            name: "INT08",
            base: 0xFF90,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT09",
        {
            comment: "Reserved Vector",
            name: "INT09",
            base: 0xFF92,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT10",
        {
            comment: "Reserved Vector",
            name: "INT10",
            base: 0xFF94,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT11",
        {
            comment: "Reserved Vector",
            name: "INT11",
            base: 0xFF96,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT12",
        {
            comment: "Reserved Vector",
            name: "INT12",
            base: 0xFF98,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT13",
        {
            comment: "Reserved Vector",
            name: "INT13",
            base: 0xFF9A,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT14",
        {
            comment: "Reserved Vector",
            name: "INT14",
            base: 0xFF9C,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT15",
        {
            comment: "Reserved Vector",
            name: "INT15",
            base: 0xFF9E,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT16",
        {
            comment: "Reserved Vector",
            name: "INT16",
            base: 0xFFA0,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT17",
        {
            comment: "Reserved Vector",
            name: "INT17",
            base: 0xFFA2,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT18",
        {
            comment: "Reserved Vector",
            name: "INT18",
            base: 0xFFA4,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT19",
        {
            comment: "Reserved Vector",
            name: "INT19",
            base: 0xFFA6,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT20",
        {
            comment: "Reserved Vector",
            name: "INT20",
            base: 0xFFA8,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT21",
        {
            comment: "Reserved Vector",
            name: "INT21",
            base: 0xFFAA,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT22",
        {
            comment: "Reserved Vector",
            name: "INT22",
            base: 0xFFAC,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT23",
        {
            comment: "Reserved Vector",
            name: "INT23",
            base: 0xFFAE,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT24",
        {
            comment: "Reserved Vector",
            name: "INT24",
            base: 0xFFB0,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT25",
        {
            comment: "Reserved Vector",
            name: "INT25",
            base: 0xFFB2,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT26",
        {
            comment: "Reserved Vector",
            name: "INT26",
            base: 0xFFB4,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT27",
        {
            comment: "Reserved Vector",
            name: "INT27",
            base: 0xFFB6,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT28",
        {
            comment: "Reserved Vector",
            name: "INT28",
            base: 0xFFB8,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT29",
        {
            comment: "Reserved Vector",
            name: "INT29",
            base: 0xFFBA,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT30",
        {
            comment: "Reserved Vector",
            name: "INT30",
            base: 0xFFBC,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT31",
        {
            comment: "Reserved Vector",
            name: "INT31",
            base: 0xFFBE,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT32",
        {
            comment: "Reserved Vector",
            name: "INT32",
            base: 0xFFC0,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT33",
        {
            comment: "Reserved Vector",
            name: "INT33",
            base: 0xFFC2,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT34",
        {
            comment: "Reserved Vector",
            name: "INT34",
            base: 0xFFC4,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT35",
        {
            comment: "Reserved Vector",
            name: "INT35",
            base: 0xFFC6,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT36",
        {
            comment: "Reserved Vector",
            name: "INT36",
            base: 0xFFC8,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT37",
        {
            comment: "Reserved Vector",
            name: "INT37",
            base: 0xFFCA,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT38",
        {
            comment: "Reserved Vector",
            name: "INT38",
            base: 0xFFCC,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT39",
        {
            comment: "Reserved Vector",
            name: "INT39",
            base: 0xFFCE,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT40",
        {
            comment: "Reserved Vector",
            name: "INT40",
            base: 0xFFD0,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT41",
        {
            comment: "RTC_A Vector",
            name: "INT41",
            base: 0xFFD2,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT42",
        {
            comment: "I/O Port P2 Vector",
            name: "INT42",
            base: 0xFFD4,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT43",
        {
            comment: "TA2 CCR1-CCR2 Vector",
            name: "INT43",
            base: 0xFFD6,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT44",
        {
            comment: "TA2 CCR0 Vector",
            name: "INT44",
            base: 0xFFD8,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT45",
        {
            comment: "USCI_B1 Receive/Transmit Vector",
            name: "INT45",
            base: 0xFFDA,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT46",
        {
            comment: "USCI_A1 Receive/Transmit Vector",
            name: "INT46",
            base: 0xFFDC,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT47",
        {
            comment: "I/O Port P1 Vector",
            name: "INT47",
            base: 0xFFDE,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT48",
        {
            comment: "TA1 CCR1-CCR2 Vector",
            name: "INT48",
            base: 0xFFE0,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT49",
        {
            comment: "TA1 CCR0 Vector",
            name: "INT49",
            base: 0xFFE2,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT50",
        {
            comment: "DMA Vector",
            name: "INT50",
            base: 0xFFE4,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT51",
        {
            comment: "USB_UBM Vector",
            name: "INT51",
            base: 0xFFE6,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT52",
        {
            comment: "TA0 CCR1-CCR4 Vector",
            name: "INT52",
            base: 0xFFE8,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT53",
        {
            comment: "TA0 CCR0 Vector",
            name: "INT53",
            base: 0xFFEA,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT54",
        {
            comment: "ADC12_A Vector",
            name: "INT54",
            base: 0xFFEC,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT55",
        {
            comment: "USCI_B0 Receive/Transmit Vector",
            name: "INT55",
            base: 0xFFEE,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT56",
        {
            comment: "USCI_A0 Receive/Transmit Vector",
            name: "INT56",
            base: 0xFFF0,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT57",
        {
            comment: "Watchdog Timer_A Interval Timer Mode Vector",
            name: "INT57",
            base: 0xFFF2,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT58",
        {
            comment: "TB0 CCR1-CCR6 Vector",
            name: "INT58",
            base: 0xFFF4,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT59",
        {
            comment: "TB0 CCR0 Vector",
            name: "INT59",
            base: 0xFFF6,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT60",
        {
            comment: "Comp_B Vector",
            name: "INT60",
            base: 0xFFF8,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT61",
        {
            comment: "User NMI Vector",
            name: "INT61",
            base: 0xFFFA,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT62",
        {
            comment: "System NMI Vector",
            name: "INT62",
            base: 0xFFFC,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "RESET",
        {
            comment: "Reset Vector",
            name: "RESET",
            base: 0xFFFE,
            len: 0x2,
            space: "data"
        }
    ]
];
 
 
config IMSP430F55xx.cpuCore  // instance
index URL

A string identifying the CPU Core

XDCspec declarations sourced in ti/catalog/msp430/IMSP430F55xx.xdc
override config String cpuCore = "MSP430X";
 
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
 
config IMSP430F55xx.cpuCoreRevision  // instance
index URL

A string that uniquely identifies a revision of the core

XDCspec declarations sourced in ti/catalog/msp430/IMSP430F55xx.xdc
config String cpuCoreRevision;
 
 
config IMSP430F55xx.dataWordSize  // instance
index URL

The size of an int on the target in 8-bit bytes

XDCspec declarations sourced in ti/catalog/msp430/IMSP430F55xx.xdc
override config Int dataWordSize = 2;
 
 
config IMSP430F55xx.deviceHeader  // instance
index URL

The optional header file that define device specific constants and structures

XDCspec declarations sourced in ti/catalog/msp430/IMSP430F55xx.xdc
config String deviceHeader;
 
 
config IMSP430F55xx.interruptController  // instance
index URL
XDCspec declarations sourced in ti/catalog/msp430/IMSP430F55xx.xdc
config Interrupt_Controller.Instance interruptController;
 
 
config IMSP430F55xx.interruptEnableRegister1  // instance
index URL
XDCspec declarations sourced in ti/catalog/msp430/IMSP430F55xx.xdc
config IE1.Instance interruptEnableRegister1;
 
 
config IMSP430F55xx.minDataUnitSize  // instance
index URL

The minimum addressable data unit size in 8-bit bytes

XDCspec declarations sourced in ti/catalog/msp430/IMSP430F55xx.xdc
override config Int minDataUnitSize = 1;
 
 
config IMSP430F55xx.minProgUnitSize  // instance
index URL

The minimum addressable program unit size in 8-bit bytes

XDCspec declarations sourced in ti/catalog/msp430/IMSP430F55xx.xdc
override config Int minProgUnitSize = 1;
 
 
config IMSP430F55xx.peripherals  // instance
index URL

A map of peripherals available on the device

XDCspec declarations sourced in ti/catalog/msp430/IMSP430F55xx.xdc
config IPeripheral.Instance peripherals[string];
 
 
config IMSP430F55xx.vcc  // instance
index URL

Stores current system VCC value in CFG script

XDCspec declarations sourced in ti/catalog/msp430/IMSP430F55xx.xdc
config Float vcc = 0;
 
 
config IMSP430F55xx.wdtPlus  // instance
index URL
XDCspec declarations sourced in ti/catalog/msp430/IMSP430F55xx.xdc
config WDTplus.Instance wdtPlus;
 
Instance Creation
index URL

XDCspec declarations sourced in ti/catalog/msp430/IMSP430F55xx.xdc
create(String revision);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
 
IMSP430F55xx.getMemoryMap()  // instance
index URL

Get the memory map that corresponds to the values of the specified registers

XDCspec declarations sourced in ti/catalog/msp430/IMSP430F55xx.xdc
function getMemoryMap(registers);
 
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
 
IMSP430F55xx.getRegisterSet()  // instance
index URL

The set of valid register names for this CPU

XDCspec declarations sourced in ti/catalog/msp430/IMSP430F55xx.xdc
function getRegisterSet();
 
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Thu, 27 Sep 2012 23:23:39 GMT