module ti.catalog.msp430.peripherals.timer.Timer

metaonly module ti.catalog.msp430.peripherals.timer.Timer_B3

index URL

MSP430 Timer_B timer

XDCscript usage
Individual elements

XDCscript usage meta-domain sourced in ti/catalog/msp430/peripherals/timer/Timer_B3.xdc

var Timer_B3 = xdc.useModule('ti.catalog.msp430.peripherals.timer.Timer_B3');

module-wide constants & types

values of type Timer_B3.CAP_t//

const Timer_B3.CAP_OFF;

const Timer_B3.CAP;

values of type Timer_B3.CCIE_t//

const Timer_B3.CCIE_OFF;

const Timer_B3.CCIE;

values of type Timer_B3.CCIFG_t//

const Timer_B3.CCIFG_OFF;

const Timer_B3.CCIFG;

values of type Timer_B3.CCIS_t//

const Timer_B3.CCIS_0// CCIxA;

const Timer_B3.CCIS_1// CCIxB;

const Timer_B3.CCIS_2// GND;

const Timer_B3.CCIS_3// Vcc;

values of type Timer_B3.CCI_t//

const Timer_B3.CCI_OFF;

const Timer_B3.CCI;

values of type Timer_B3.CLLD_t//

const Timer_B3.CLLD_0;

const Timer_B3.CLLD_1;

const Timer_B3.CLLD_2;

const Timer_B3.CLLD_3;

values of type Timer_B3.CM_t//

const Timer_B3.CM_0// No Capture;

const Timer_B3.CM_1// Rising Edge;

const Timer_B3.CM_2// Falling Edge;

const Timer_B3.CM_3// Both Edges;

values of type Timer_B3.CNTL_t//

const Timer_B3.CNTL_0// 16-bit, TBR(max) = 0FFFFh;

const Timer_B3.CNTL_1// 12-bit, TBR(max) = 0FFFh;

const Timer_B3.CNTL_2// 10-bit, TBR(max) = 03FFh;

const Timer_B3.CNTL_3// 8-bit, TBR(max) = 0FFh;

values of type Timer_B3.COV_t//

const Timer_B3.COV_OFF;

const Timer_B3.COV;

values of type Timer_B3.ID_t//

const Timer_B3.ID_0// Divider - /1;

const Timer_B3.ID_1// Divider - /2;

const Timer_B3.ID_2// Divider - /4;

const Timer_B3.ID_3// Divider - /8;

values of type Timer_B3.IVValues// TB3IV Definitions

const Timer_B3.TBIV_NONE// No Interrupt pending;

const Timer_B3.TBIV_TBCCR1// TBCCR1_CCIFG;

const Timer_B3.TBIV_TBCCR2// TBCCR2_CCIFG;

const Timer_B3.TBIV_6// Reserved;

const Timer_B3.TBIV_8// Reserved;

const Timer_B3.TBIV_TBIFG// TBIFG;

values of type Timer_B3.MC_t//

const Timer_B3.MC_0// Stop Mode;

const Timer_B3.MC_1// Up Mode;

const Timer_B3.MC_2// Continuous Mode;

const Timer_B3.MC_3// Up/Down Mode;

values of type Timer_B3.OUTMOD_t//

const Timer_B3.OUTMOD_0// PWM output mode: 0 - OUT bit value;

const Timer_B3.OUTMOD_1// PWM output mode: 1 - Set;

const Timer_B3.OUTMOD_2// PWM output mode: 2 - PWM toggle/reset;

const Timer_B3.OUTMOD_3// PWM output mode: 3 - PWM set/reset;

const Timer_B3.OUTMOD_4// PWM output mode: 4 - Toggle;

const Timer_B3.OUTMOD_5// PWM output mode: 5 - Reset;

const Timer_B3.OUTMOD_6// PWM output mode: 6 - PWM toggle/set;

const Timer_B3.OUTMOD_7// PWM output mode: 7 - PWM reset/set;

values of type Timer_B3.OUT_t//

const Timer_B3.OUT_OFF;

const Timer_B3.OUT;

values of type Timer_B3.SCCI_t//

const Timer_B3.SCCI_OFF;

const Timer_B3.SCCI;

values of type Timer_B3.SCS_t//

const Timer_B3.SCS_OFF;

const Timer_B3.SCS;

values of type Timer_B3.TBCLGRP_t//

const Timer_B3.TBCLGRP_0;

const Timer_B3.TBCLGRP_1;

const Timer_B3.TBCLGRP_2;

const Timer_B3.TBCLGRP_3;

values of type Timer_B3.TBCLR_t//

const Timer_B3.TBCLR_OFF;

const Timer_B3.TBCLR;

values of type Timer_B3.TBIE_t//

const Timer_B3.TBIE_OFF;

const Timer_B3.TBIE;

values of type Timer_B3.TBIFG_t//

const Timer_B3.TBIFG_OFF;

const Timer_B3.TBIFG;

values of type Timer_B3.TBSSEL_t//

const Timer_B3.TBSSEL_0// TBCLK;

const Timer_B3.TBSSEL_1// ACLK;

const Timer_B3.TBSSEL_2// SMCLK;

const Timer_B3.TBSSEL_3// INCLK;

var obj = new Timer_B3.ForceSetDefaultRegister_t// Force Set Default Register;

obj.register = String ...

obj.regForceSet = Bool ...

var obj = new Timer_B3.TBCCTLx_t// ;

obj.CM// Capture mode 00 No capture 01 Capture on rising edge 10 Capture on falling edge 11 Capture on both rising and falling edges = ITimer_B.CM_t ...

obj.CCIS// Capture/compare input select. These bits select the TBCCRx input signal. See the device-specific data sheet for specific signal connections. 00 CCIxA 01 CCIxB 10 GND 11 VCC = ITimer_B.CCIS_t ...

obj.SCS// Synchronize capture source. This bit is used to synchronize the capture input signal with the timer clock. 0 Asynchronous capture 1 Synchronous capture = ITimer_B.SCS_t ...

obj.CLLD// Compare latch load. These bits select the compare latch load event. 00 TBCLx loads on write to TBCCRx 01 TBCLx loads when TBR counts to 0 10 TBCLx loads when TBR counts to 0 (up or continuous mode) TBCLx loads when TBR counts to TBCL0 or to 0 (up/down mode) 11 TBCLx loads when TBR counts to TBCLx = ITimer_B.CLLD_t ...

obj.CAP// Capture mode 0 Compare mode 1 Capture mode = ITimer_B.CAP_t ...

obj.OUTMOD// Output mode. Modes 2, 3, 6, and 7 are not useful for TBCL0 because EQUx = EQU0. 000 OUT bit value 001 Set 010 Toggle/reset 011 Set/reset 100 Toggle 101 Reset 110 Toggle/set 111 Reset/set = ITimer_B.OUTMOD_t ...

obj.CCIE// Capture/compare interrupt enable. This bit enables the interrupt request of the corresponding CCIFG flag. 0 Interrupt disabled 1 Interrupt enabled = ITimer_B.CCIE_t ...

obj.CCI// Capture/compare input. The selected input signal can be read by this bit = ITimer_B.CCI_t ...

obj.OUT// Output. For output mode 0, this bit directly controls the state of the output. 0 Output low 1 Output high = ITimer_B.OUT_t ...

obj.COV// Capture overflow. This bit indicates a capture overflow occurred. COV must be reset with software. 0 No capture overflow occurred 1 Capture overflow occurred = ITimer_B.COV_t ...

obj.CCIFG// Capture/compare interrupt flag 0 No interrupt pending 1 Interrupt pending = ITimer_B.CCIFG_t ...

var obj = new Timer_B3.TBCTL_t// Timer_B Control Register;

obj.TBCLGRP// TBCLx group 00 Each TBCLx latch loads independently 01 TBCL1+TBCL2 (TBCCR1 CLLDx bits control the update) TBCL3+TBCL4 (TBCCR3 CLLDx bits control the update) TBCL5+TBCL6 (TBCCR5 CLLDx bits control the update) TBCL0 independent 10 TBCL1+TBCL2+TBCL3 (TBCCR1 CLLDx bits control the update) TBCL4+TBCL5+TBCL6 (TBCCR4 CLLDx bits control the update) TBCL0 independent 11 TBCL0+TBCL1+TBCL2+TBCL3+TBCL4+TBCL5+TBCL6 (TBCCR1 CLLDx bits control the update) = ITimer_B.TBCLGRP_t ...

obj.CNTL// Counter Length 00 16-bit, TBR(max) = 0FFFFh 01 12-bit, TBR(max) = 0FFFh 10 10-bit, TBR(max) = 03FFh 11 8-bit, TBR(max) = 0FFh = ITimer_B.CNTL_t ...

obj.TBSSEL// Timer_B clock source select. 00 TBCLK 01 ACLK 10 SMCLK 11 Inverted TBCLK = ITimer_B.TBSSEL_t ...

obj.ID// Input divider. These bits select the divider for the input clock. 00 /1 01 /2 10 /4 11 /8 = ITimer_B.ID_t ...

obj.MC// Mode control. Setting MCx = 00h when Timer_B is not in use conserves power. 00 Stop mode: the timer is halted 01 Up mode: the timer counts up to TBCL0 10 Continuous mode: the timer counts up to the value set by CNTLx 11 Up/down mode: the timer counts up to TBCL0 and down to 0000h = ITimer_B.MC_t ...

obj.TBCLR// Timer_B clear. Setting this bit resets TBR, the clock divider, and the count direction. The TBCLR bit is automatically reset and is always read as zero = ITimer_B.TBCLR_t ...

obj.TBIE// Timer_B interrupt enable. This bit enables the TBIFG interrupt request. 0 Interrupt disabled 1 Interrupt enabled = ITimer_B.TBIE_t ...

obj.TBIFG// Timer_B interrupt flag. 0 No interrupt pending 1 Interrupt pending = ITimer_B.TBIFG_t ...

module-wide functions

Timer_B3.addPeripheralsMap// Create a map of all peripherals available on a device(ICpuDataSheet.Instance cds) returns Void

Timer_B3.getAll// Find all peripherals of a certain type() returns IPeripheral.Instance[]

Timer_B3.getRegisters// Find all registers defined by the peripheral() returns String[]

per-instance config parameters

var params = new Timer_B3.Params// Instance config-params object;

params.INCLK// Timer_B INCLK = Float 0;

params.TBCCR0// TBCCR0, Timer_B Capture/Compare Register 0 = Int 0;

params.TBCCR1// TBCCR1, Timer_B Capture/Compare Register 1 = Int 0;

params.TBCCR2// TBCCR2, Timer_B Capture/Compare Register 2 = Int 0;

params.TBCCTL0// TBCCTL0, Capture/Compare Control Register 0 = Timer_B3.TBCCTLx_t {

CM: ITimer_B.CM_0,

CCIS: ITimer_B.CCIS_0,

SCS: ITimer_B.SCS_OFF,

CLLD: ITimer_B.CLLD_0,

CAP: ITimer_B.CAP_OFF,

OUTMOD: ITimer_B.OUTMOD_0,

CCIE: ITimer_B.CCIE_OFF,

CCI: ITimer_B.CCI_OFF,

OUT: ITimer_B.OUT_OFF,

COV: ITimer_B.COV_OFF,

CCIFG: ITimer_B.CCIFG_OFF

};

params.TBCCTL1// TBCCTL1, Capture/Compare Control Register 1 = Timer_B3.TBCCTLx_t {

CM: ITimer_B.CM_0,

CCIS: ITimer_B.CCIS_0,

SCS: ITimer_B.SCS_OFF,

CLLD: ITimer_B.CLLD_0,

CAP: ITimer_B.CAP_OFF,

OUTMOD: ITimer_B.OUTMOD_0,

CCIE: ITimer_B.CCIE_OFF,

CCI: ITimer_B.CCI_OFF,

OUT: ITimer_B.OUT_OFF,

COV: ITimer_B.COV_OFF,

CCIFG: ITimer_B.CCIFG_OFF

};

params.TBCCTL2// TBCCTL2, Capture/Compare Control Register 2 = Timer_B3.TBCCTLx_t {

CM: ITimer_B.CM_0,

CCIS: ITimer_B.CCIS_0,

SCS: ITimer_B.SCS_OFF,

CLLD: ITimer_B.CLLD_0,

CAP: ITimer_B.CAP_OFF,

OUTMOD: ITimer_B.OUTMOD_0,

CCIE: ITimer_B.CCIE_OFF,

CCI: ITimer_B.CCI_OFF,

OUT: ITimer_B.OUT_OFF,

COV: ITimer_B.COV_OFF,

CCIFG: ITimer_B.CCIFG_OFF

};

params.TBCLK// Timer_B TBCLK = Float 0;

params.TBCTL// TBCTL, Timer_B3 Control Register = Timer_B3.TBCTL_t {

TBCLGRP: ITimer_B.TBCLGRP_0,

CNTL: ITimer_B.CNTL_0,

TBSSEL: ITimer_B.TBSSEL_0,

ID: ITimer_B.ID_0,

MC: ITimer_B.MC_0,

TBCLR: ITimer_B.TBCLR_OFF,

TBIE: ITimer_B.TBIE_OFF,

TBIFG: ITimer_B.TBIFG_OFF

};

params.baseAddr// Address of the peripheral's control register = UInt undefined;

params.forceSetDefaultRegister// Determine if each Register needs to be forced set or not = Timer_B3.ForceSetDefaultRegister_t[] [

{

regForceSet: false

{

regForceSet: false

{

regForceSet: false

{

regForceSet: false

{

regForceSet: false

{

regForceSet: false

{

regForceSet: false

}

];

params.intNum// Interrupt source number = UInt undefined;

params.name// Specific peripheral name given by the device = String undefined;

params.owner// String specifying the entity that manages the peripheral = String undefined;

per-instance creation

var inst = Timer_B3.create// Create an instance-object(IClock.Instance clock, params);

per-instance functions

inst.getNumberOfTimers// () returns UChar

enum Timer_B3.CAP_t

index URL

XDCscript usage meta-domain

values of type Timer_B3.CAP_t

const Timer_B3.CAP_OFF;

const Timer_B3.CAP;

enum Timer_B3.CCIE_t

index URL

XDCscript usage meta-domain

values of type Timer_B3.CCIE_t

const Timer_B3.CCIE_OFF;

const Timer_B3.CCIE;

enum Timer_B3.CCIFG_t

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XDCscript usage meta-domain

values of type Timer_B3.CCIFG_t

const Timer_B3.CCIFG_OFF;

const Timer_B3.CCIFG;

enum Timer_B3.CCIS_t

index URL

XDCscript usage meta-domain

values of type Timer_B3.CCIS_t

const Timer_B3.CCIS_0;

// CCIxA

const Timer_B3.CCIS_1;

// CCIxB

const Timer_B3.CCIS_2;

// GND

const Timer_B3.CCIS_3;

// Vcc

enum Timer_B3.CCI_t

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XDCscript usage meta-domain

values of type Timer_B3.CCI_t

const Timer_B3.CCI_OFF;

const Timer_B3.CCI;

enum Timer_B3.CLLD_t

index URL

XDCscript usage meta-domain

values of type Timer_B3.CLLD_t

const Timer_B3.CLLD_0;

const Timer_B3.CLLD_1;

const Timer_B3.CLLD_2;

const Timer_B3.CLLD_3;

enum Timer_B3.CM_t

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XDCscript usage meta-domain

values of type Timer_B3.CM_t

const Timer_B3.CM_0;

// No Capture

const Timer_B3.CM_1;

// Rising Edge

const Timer_B3.CM_2;

// Falling Edge

const Timer_B3.CM_3;

// Both Edges

enum Timer_B3.CNTL_t

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XDCscript usage meta-domain

values of type Timer_B3.CNTL_t

const Timer_B3.CNTL_0;

// 16-bit, TBR(max) = 0FFFFh

const Timer_B3.CNTL_1;

// 12-bit, TBR(max) = 0FFFh

const Timer_B3.CNTL_2;

// 10-bit, TBR(max) = 03FFh

const Timer_B3.CNTL_3;

// 8-bit, TBR(max) = 0FFh

enum Timer_B3.COV_t

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XDCscript usage meta-domain

values of type Timer_B3.COV_t

const Timer_B3.COV_OFF;

const Timer_B3.COV;

enum Timer_B3.ID_t

index URL

XDCscript usage meta-domain

values of type Timer_B3.ID_t

const Timer_B3.ID_0;

// Divider - /1

const Timer_B3.ID_1;

// Divider - /2

const Timer_B3.ID_2;

// Divider - /4

const Timer_B3.ID_3;

// Divider - /8

enum Timer_B3.IVValues

index URL

TB3IV Definitions

XDCscript usage meta-domain

values of type Timer_B3.IVValues

const Timer_B3.TBIV_NONE;

// No Interrupt pending

const Timer_B3.TBIV_TBCCR1;

// TBCCR1_CCIFG

const Timer_B3.TBIV_TBCCR2;

// TBCCR2_CCIFG

const Timer_B3.TBIV_6;

// Reserved

const Timer_B3.TBIV_8;

// Reserved

const Timer_B3.TBIV_TBIFG;

// TBIFG

enum Timer_B3.MC_t

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XDCscript usage meta-domain

values of type Timer_B3.MC_t

const Timer_B3.MC_0;

// Stop Mode

const Timer_B3.MC_1;

// Up Mode

const Timer_B3.MC_2;

// Continuous Mode

const Timer_B3.MC_3;

// Up/Down Mode

enum Timer_B3.OUTMOD_t

index URL

XDCscript usage meta-domain

values of type Timer_B3.OUTMOD_t

const Timer_B3.OUTMOD_0;

// PWM output mode: 0 - OUT bit value

const Timer_B3.OUTMOD_1;

// PWM output mode: 1 - Set

const Timer_B3.OUTMOD_2;

// PWM output mode: 2 - PWM toggle/reset

const Timer_B3.OUTMOD_3;

// PWM output mode: 3 - PWM set/reset

const Timer_B3.OUTMOD_4;

// PWM output mode: 4 - Toggle

const Timer_B3.OUTMOD_5;

// PWM output mode: 5 - Reset

const Timer_B3.OUTMOD_6;

// PWM output mode: 6 - PWM toggle/set

const Timer_B3.OUTMOD_7;

// PWM output mode: 7 - PWM reset/set

enum Timer_B3.OUT_t

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XDCscript usage meta-domain

values of type Timer_B3.OUT_t

const Timer_B3.OUT_OFF;

const Timer_B3.OUT;

enum Timer_B3.SCCI_t

index URL

XDCscript usage meta-domain

values of type Timer_B3.SCCI_t

const Timer_B3.SCCI_OFF;

const Timer_B3.SCCI;

enum Timer_B3.SCS_t

index URL

XDCscript usage meta-domain

values of type Timer_B3.SCS_t

const Timer_B3.SCS_OFF;

const Timer_B3.SCS;

enum Timer_B3.TBCLGRP_t

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XDCscript usage meta-domain

values of type Timer_B3.TBCLGRP_t

const Timer_B3.TBCLGRP_0;

const Timer_B3.TBCLGRP_1;

const Timer_B3.TBCLGRP_2;

const Timer_B3.TBCLGRP_3;

enum Timer_B3.TBCLR_t

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XDCscript usage meta-domain

values of type Timer_B3.TBCLR_t

const Timer_B3.TBCLR_OFF;

const Timer_B3.TBCLR;

enum Timer_B3.TBIE_t

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XDCscript usage meta-domain

values of type Timer_B3.TBIE_t

const Timer_B3.TBIE_OFF;

const Timer_B3.TBIE;

enum Timer_B3.TBIFG_t

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XDCscript usage meta-domain

values of type Timer_B3.TBIFG_t

const Timer_B3.TBIFG_OFF;

const Timer_B3.TBIFG;

enum Timer_B3.TBSSEL_t

index URL

XDCscript usage meta-domain

values of type Timer_B3.TBSSEL_t

const Timer_B3.TBSSEL_0;

// TBCLK

const Timer_B3.TBSSEL_1;

// ACLK

const Timer_B3.TBSSEL_2;

// SMCLK

const Timer_B3.TBSSEL_3;

// INCLK

struct Timer_B3.ForceSetDefaultRegister_t

index URL

Force Set Default Register

XDCscript usage meta-domain

var obj = new Timer_B3.ForceSetDefaultRegister_t;

obj.register = String ...

obj.regForceSet = Bool ...

DETAILS

Type to store if each register needs to be forced initialized even if the register is in default state.

SEE

ForceSetDefaultRegister_t

struct Timer_B3.TBCCTLx_t

index URL

XDCscript usage meta-domain

var obj = new Timer_B3.TBCCTLx_t;

obj.CM = ITimer_B.CM_t ...

// Capture mode 00 No capture 01 Capture on rising edge 10 Capture on falling edge 11 Capture on both rising and falling edges

obj.CCIS = ITimer_B.CCIS_t ...

// Capture/compare input select. These bits select the TBCCRx input signal. See the device-specific data sheet for specific signal connections. 00 CCIxA 01 CCIxB 10 GND 11 VCC

obj.SCS = ITimer_B.SCS_t ...

// Synchronize capture source. This bit is used to synchronize the capture input signal with the timer clock. 0 Asynchronous capture 1 Synchronous capture

obj.CLLD = ITimer_B.CLLD_t ...

// Compare latch load. These bits select the compare latch load event. 00 TBCLx loads on write to TBCCRx 01 TBCLx loads when TBR counts to 0 10 TBCLx loads when TBR counts to 0 (up or continuous mode) TBCLx loads when TBR counts to TBCL0 or to 0 (up/down mode) 11 TBCLx loads when TBR counts to TBCLx

obj.CAP = ITimer_B.CAP_t ...

// Capture mode 0 Compare mode 1 Capture mode

obj.OUTMOD = ITimer_B.OUTMOD_t ...

// Output mode. Modes 2, 3, 6, and 7 are not useful for TBCL0 because EQUx = EQU0. 000 OUT bit value 001 Set 010 Toggle/reset 011 Set/reset 100 Toggle 101 Reset 110 Toggle/set 111 Reset/set

obj.CCIE = ITimer_B.CCIE_t ...

// Capture/compare interrupt enable. This bit enables the interrupt request of the corresponding CCIFG flag. 0 Interrupt disabled 1 Interrupt enabled

obj.CCI = ITimer_B.CCI_t ...

// Capture/compare input. The selected input signal can be read by this bit

obj.OUT = ITimer_B.OUT_t ...

// Output. For output mode 0, this bit directly controls the state of the output. 0 Output low 1 Output high

obj.COV = ITimer_B.COV_t ...

// Capture overflow. This bit indicates a capture overflow occurred. COV must be reset with software. 0 No capture overflow occurred 1 Capture overflow occurred

obj.CCIFG = ITimer_B.CCIFG_t ...

// Capture/compare interrupt flag 0 No interrupt pending 1 Interrupt pending

struct Timer_B3.TBCTL_t

index URL

Timer_B Control Register

XDCscript usage meta-domain

var obj = new Timer_B3.TBCTL_t;

obj.TBCLGRP = ITimer_B.TBCLGRP_t ...

// TBCLx group 00 Each TBCLx latch loads independently 01 TBCL1+TBCL2 (TBCCR1 CLLDx bits control the update) TBCL3+TBCL4 (TBCCR3 CLLDx bits control the update) TBCL5+TBCL6 (TBCCR5 CLLDx bits control the update) TBCL0 independent 10 TBCL1+TBCL2+TBCL3 (TBCCR1 CLLDx bits control the update) TBCL4+TBCL5+TBCL6 (TBCCR4 CLLDx bits control the update) TBCL0 independent 11 TBCL0+TBCL1+TBCL2+TBCL3+TBCL4+TBCL5+TBCL6 (TBCCR1 CLLDx bits control the update)

obj.CNTL = ITimer_B.CNTL_t ...

// Counter Length 00 16-bit, TBR(max) = 0FFFFh 01 12-bit, TBR(max) = 0FFFh 10 10-bit, TBR(max) = 03FFh 11 8-bit, TBR(max) = 0FFh

obj.TBSSEL = ITimer_B.TBSSEL_t ...

// Timer_B clock source select. 00 TBCLK 01 ACLK 10 SMCLK 11 Inverted TBCLK

obj.ID = ITimer_B.ID_t ...

// Input divider. These bits select the divider for the input clock. 00 /1 01 /2 10 /4 11 /8

obj.MC = ITimer_B.MC_t ...

// Mode control. Setting MCx = 00h when Timer_B is not in use conserves power. 00 Stop mode: the timer is halted 01 Up mode: the timer counts up to TBCL0 10 Continuous mode: the timer counts up to the value set by CNTLx 11 Up/down mode: the timer counts up to TBCL0 and down to 0000h

obj.TBCLR = ITimer_B.TBCLR_t ...

// Timer_B clear. Setting this bit resets TBR, the clock divider, and the count direction. The TBCLR bit is automatically reset and is always read as zero

obj.TBIE = ITimer_B.TBIE_t ...

// Timer_B interrupt enable. This bit enables the TBIFG interrupt request. 0 Interrupt disabled 1 Interrupt enabled

obj.TBIFG = ITimer_B.TBIFG_t ...

// Timer_B interrupt flag. 0 No interrupt pending 1 Interrupt pending

SEE

TBCTL_t

Timer_B3.addPeripheralsMap() // module-wide

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Create a map of all peripherals available on a device

XDCscript usage meta-domain

Timer_B3.addPeripheralsMap(ICpuDataSheet.Instance cds) returns Void

ARGUMENTS

cds — an xdc.platform.ICpuDataSheet instance

DETAILS

The config parameter peripherals is by default undefined in an xdc.platform.ICpuDataSheet instance. This function gathers all instance configuration parameters that are of the type xdc.platform.IPeripheral into the map peripherals.

Timer_B3.getAll() // module-wide

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Find all peripherals of a certain type

XDCscript usage meta-domain

Timer_B3.getAll() returns IPeripheral.Instance[]

DETAILS

The type of the peripherals returned is defined by the type of the caller.

RETURNS

Returns an array of IPeripheral instances

Timer_B3.getRegisters() // module-wide

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Find all registers defined by the peripheral

XDCscript usage meta-domain

Timer_B3.getRegisters() returns String[]

RETURNS

Returns an array of register names

Instance Config Parameters

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XDCscript usage meta-domain

var params = new Timer_B3.Params;

// Instance config-params object

params.INCLK = Float 0;

// Timer_B INCLK

params.TBCCR0 = Int 0;

// TBCCR0, Timer_B Capture/Compare Register 0

params.TBCCR1 = Int 0;

// TBCCR1, Timer_B Capture/Compare Register 1

params.TBCCR2 = Int 0;

// TBCCR2, Timer_B Capture/Compare Register 2

params.TBCCTL0 = Timer_B3.TBCCTLx_t {

// TBCCTL0, Capture/Compare Control Register 0

CM: ITimer_B.CM_0,

CCIS: ITimer_B.CCIS_0,

SCS: ITimer_B.SCS_OFF,

CLLD: ITimer_B.CLLD_0,

CAP: ITimer_B.CAP_OFF,

OUTMOD: ITimer_B.OUTMOD_0,

CCIE: ITimer_B.CCIE_OFF,

CCI: ITimer_B.CCI_OFF,

OUT: ITimer_B.OUT_OFF,

COV: ITimer_B.COV_OFF,

CCIFG: ITimer_B.CCIFG_OFF

};

params.TBCCTL1 = Timer_B3.TBCCTLx_t {

// TBCCTL1, Capture/Compare Control Register 1

CM: ITimer_B.CM_0,

CCIS: ITimer_B.CCIS_0,

SCS: ITimer_B.SCS_OFF,

CLLD: ITimer_B.CLLD_0,

CAP: ITimer_B.CAP_OFF,

OUTMOD: ITimer_B.OUTMOD_0,

CCIE: ITimer_B.CCIE_OFF,

CCI: ITimer_B.CCI_OFF,

OUT: ITimer_B.OUT_OFF,

COV: ITimer_B.COV_OFF,

CCIFG: ITimer_B.CCIFG_OFF

};

params.TBCCTL2 = Timer_B3.TBCCTLx_t {

// TBCCTL2, Capture/Compare Control Register 2

CM: ITimer_B.CM_0,

CCIS: ITimer_B.CCIS_0,

SCS: ITimer_B.SCS_OFF,

CLLD: ITimer_B.CLLD_0,

CAP: ITimer_B.CAP_OFF,

OUTMOD: ITimer_B.OUTMOD_0,

CCIE: ITimer_B.CCIE_OFF,

CCI: ITimer_B.CCI_OFF,

OUT: ITimer_B.OUT_OFF,

COV: ITimer_B.COV_OFF,

CCIFG: ITimer_B.CCIFG_OFF

};

params.TBCLK = Float 0;

// Timer_B TBCLK

params.TBCTL = Timer_B3.TBCTL_t {

// TBCTL, Timer_B3 Control Register

TBCLGRP: ITimer_B.TBCLGRP_0,

CNTL: ITimer_B.CNTL_0,

TBSSEL: ITimer_B.TBSSEL_0,

ID: ITimer_B.ID_0,

MC: ITimer_B.MC_0,

TBCLR: ITimer_B.TBCLR_OFF,

TBIE: ITimer_B.TBIE_OFF,

TBIFG: ITimer_B.TBIFG_OFF

};

params.baseAddr = UInt undefined;

// Address of the peripheral's control register

params.forceSetDefaultRegister = Timer_B3.ForceSetDefaultRegister_t[] [

// Determine if each Register needs to be forced set or not

{

regForceSet: false

{

regForceSet: false

{

regForceSet: false

{

regForceSet: false

{

regForceSet: false

{

regForceSet: false

{

regForceSet: false

}

];

params.intNum = UInt undefined;

// Interrupt source number

params.name = String undefined;

// Specific peripheral name given by the device

params.owner = String undefined;

// String specifying the entity that manages the peripheral

config Timer_B3.INCLK // instance

index URL

Timer_B INCLK

XDCscript usage meta-domain

var params = new Timer_B3.Params;

...

params.INCLK = Float 0;

config Timer_B3.TBCCR0 // instance

index URL

TBCCR0, Timer_B Capture/Compare Register 0

XDCscript usage meta-domain

var params = new Timer_B3.Params;

...

params.TBCCR0 = Int 0;

config Timer_B3.TBCCR1 // instance

index URL

TBCCR1, Timer_B Capture/Compare Register 1

XDCscript usage meta-domain

var params = new Timer_B3.Params;

...

params.TBCCR1 = Int 0;

config Timer_B3.TBCCR2 // instance

index URL

TBCCR2, Timer_B Capture/Compare Register 2

XDCscript usage meta-domain

var params = new Timer_B3.Params;

...

params.TBCCR2 = Int 0;

config Timer_B3.TBCCTL0 // instance

index URL

TBCCTL0, Capture/Compare Control Register 0

XDCscript usage meta-domain

var params = new Timer_B3.Params;

...

params.TBCCTL0 = Timer_B3.TBCCTLx_t {

CM: ITimer_B.CM_0,

CCIS: ITimer_B.CCIS_0,

SCS: ITimer_B.SCS_OFF,

CLLD: ITimer_B.CLLD_0,

CAP: ITimer_B.CAP_OFF,

OUTMOD: ITimer_B.OUTMOD_0,

CCIE: ITimer_B.CCIE_OFF,

CCI: ITimer_B.CCI_OFF,

OUT: ITimer_B.OUT_OFF,

COV: ITimer_B.COV_OFF,

CCIFG: ITimer_B.CCIFG_OFF

};

config Timer_B3.TBCCTL1 // instance

index URL

TBCCTL1, Capture/Compare Control Register 1

XDCscript usage meta-domain

var params = new Timer_B3.Params;

...

params.TBCCTL1 = Timer_B3.TBCCTLx_t {

CM: ITimer_B.CM_0,

CCIS: ITimer_B.CCIS_0,

SCS: ITimer_B.SCS_OFF,

CLLD: ITimer_B.CLLD_0,

CAP: ITimer_B.CAP_OFF,

OUTMOD: ITimer_B.OUTMOD_0,

CCIE: ITimer_B.CCIE_OFF,

CCI: ITimer_B.CCI_OFF,

OUT: ITimer_B.OUT_OFF,

COV: ITimer_B.COV_OFF,

CCIFG: ITimer_B.CCIFG_OFF

};

config Timer_B3.TBCCTL2 // instance

index URL

TBCCTL2, Capture/Compare Control Register 2

XDCscript usage meta-domain

var params = new Timer_B3.Params;

...

params.TBCCTL2 = Timer_B3.TBCCTLx_t {

CM: ITimer_B.CM_0,

CCIS: ITimer_B.CCIS_0,

SCS: ITimer_B.SCS_OFF,

CLLD: ITimer_B.CLLD_0,

CAP: ITimer_B.CAP_OFF,

OUTMOD: ITimer_B.OUTMOD_0,

CCIE: ITimer_B.CCIE_OFF,

CCI: ITimer_B.CCI_OFF,

OUT: ITimer_B.OUT_OFF,

COV: ITimer_B.COV_OFF,

CCIFG: ITimer_B.CCIFG_OFF

};

config Timer_B3.TBCLK // instance

index URL

Timer_B TBCLK

XDCscript usage meta-domain

var params = new Timer_B3.Params;

...

params.TBCLK = Float 0;

config Timer_B3.TBCTL // instance

index URL

TBCTL, Timer_B3 Control Register

XDCscript usage meta-domain

var params = new Timer_B3.Params;

...

params.TBCTL = Timer_B3.TBCTL_t {

TBCLGRP: ITimer_B.TBCLGRP_0,

CNTL: ITimer_B.CNTL_0,

TBSSEL: ITimer_B.TBSSEL_0,

ID: ITimer_B.ID_0,

MC: ITimer_B.MC_0,

TBCLR: ITimer_B.TBCLR_OFF,

TBIE: ITimer_B.TBIE_OFF,

TBIFG: ITimer_B.TBIFG_OFF

};

config Timer_B3.baseAddr // instance

index URL

Address of the peripheral's control register

XDCscript usage meta-domain

var params = new Timer_B3.Params;

...

params.baseAddr = UInt undefined;

DETAILS

A peripheral's registers are commonly accessed through a structure that defines the offsets of a particular register from the lowest address mapped to a peripheral. That lowest address is specified by this parameter.

config Timer_B3.forceSetDefaultRegister // instance

index URL

Determine if each Register needs to be forced set or not

XDCscript usage meta-domain

var params = new Timer_B3.Params;

...

const params.forceSetDefaultRegister = Timer_B3.ForceSetDefaultRegister_t[] [

{

regForceSet: false

{

regForceSet: false

{

regForceSet: false

{

regForceSet: false

{

regForceSet: false

{

regForceSet: false

{

regForceSet: false

}

];

config Timer_B3.intNum // instance

index URL

Interrupt source number

XDCscript usage meta-domain

var params = new Timer_B3.Params;

...

params.intNum = UInt undefined;

config Timer_B3.name // instance

index URL

Specific peripheral name given by the device

XDCscript usage meta-domain

var params = new Timer_B3.Params;

...

params.name = String undefined;

DETAILS

Devices can have more than one peripheral of the same type. In such cases, device data sheets give different names to the instances of a same peripheral. For example, the name for a timer module could be TimerA3, and a device that has two such timers can name them TA0 and TA1.

config Timer_B3.owner // instance

index URL

String specifying the entity that manages the peripheral

XDCscript usage meta-domain

var params = new Timer_B3.Params;

...

params.owner = String undefined;

Instance Creation

index URL

XDCscript usage meta-domain

var params = new Timer_B3.Params;

// Allocate instance config-params

params.config = ...

// Assign individual configs

var inst = Timer_B3.create(IClock.Instance clock, params);

// Create an instance-object

Timer_B3.getNumberOfTimers() // instance

index URL

XDCscript usage meta-domain

inst.getNumberOfTimers() returns UChar

generated on Tue, 24 Aug 2010 15:40:49 GMT