Directives that Change the Instruction Type

By default, the assembler begins assembling all instructions in a file as 32-bit instructions. You can change the default action by using command line options or the following directives.

.arch name
.arm
.code [16|32]
.cpu name
.force_thumb
.fpu name
.object_arch name
.sleb128 expressions
.syntax [unified | divided]
.thumb
.thumb_func
.uleb128 expressions

See Processor Options for compiler command line options related to these assembler directives.

.arch

.arch name

(Arm only) The .arch directive sets the target architecture to be used. The options for name are as follows:

  • thumbv6m - use for Cortex-M0 or Cortex-M0+

  • thumbv7m - use for Cortex-M3

  • thumbv7em - use for Cortex-M4

  • thumbv8m.main - use for Cortex-M33

  • armv7r - use for Cortex-R4 or Cortex-R5 with ARM mode instructions and little-endian mode (the default)

  • armebv7r - use for Cortex-R4 or Cortex-r5 with ARM mode instructions and big-endian mode

  • thumbv7r - use for Cortex-R4 or Cortex-r5 with Thumb mode and little-endian mode

  • thumbebv7r - use for Cortex-R4 or Cortex-R5 with Thumb mode and big-endian mode

Using the .arch directive clears any previously selected architecture extensions.

.arm

.arm

(Arm only) The .arm directive selects the ARM mode (32-bit) instruction set.

Using the .code 32 directive performs the same action.

.code

.code [16|32]

(Arm only) The .code directive selects which instruction set to generate. Using .code 32 selects Arm mode (32-bit) instructions. Using .code 16 selects Thumb (16-bit) instructions.

.cpu

.cpu name

The .cpu directive selects the target processor. The options for name are as follows:

  • cortex-m0

  • cortex-m0plus

  • cortex-m3

  • cortex-m4

  • cortex-m33

  • cortex-r4

  • cortex-r5

Using the .cpu directive clears any previously selected target processor setting.

.force_thumb

.force_thumb

(Arm only) The .force_thumb directive forces the selection of Thumb instructions, even if the target processor does not support those instructions.

.fpu

.fpu name

(Arm only) The .fpu directive selects the floating-point format to assemble for. The following values for name are currently supported:

  • vfpv3-d16 for Cortex-R4 and Cortex-R5

  • fpv4-sp-d16 for Cortex-M4

  • fpv5-sp-d16 for Cortex-M33

The assembler issues an error message if an attempt is made to assemble an instruction that will not execute on the target floating point unit.

In addition to determining which instructions are assembled, this directive also affects the way in which the .double assembler directive behaves when assembling little-endian code.

.object_arch

.object_arch name

(Arm only) The .object_arch directive overrides the architecture that is recorded in the EABI object attribute section. Valid values for name are the same as for the .arch directive. Typically this directive is useful when code uses run-time detection of CPU features.

.sleb128

.sleb128 expressions

(Arm only) The .sleb128 directive causes “signed little-endian base 128” to be used. This is a compact, variable-length representation of numbers used by the DWARF symbolic debugging format. See .uleb128.

.syntax

.syntax [unified | divided]

(Arm only) Two slightly different instruction sets–divided and unified–are supported for both Arm and Thumb instructions. The .syntax directive specifies which of these instruction sets to use.

The default syntax, divided, uses the old style in which Arm and Thumb instructions had their own, separate syntaxes.

The new syntax, unified, has the following main features:

  • Immediate operands do not require a # prefix.

  • The IT instruction may appear. If it does, it is validated against subsequent conditional affixes. In Arm mode it does not generate machine code, in Thumb mode it does.

  • For Arm instructions, conditional affixes always appear at the end of the instruction. For Thumb instructions, conditional affixes may be used, but only inside the scope of an IT instruction.

  • All of the instructions new to the V6T2 architecture (and later) are available. (Only a few such instructions can be used in the divided syntax).

  • The .N and .W suffixes are recognized and honored.

  • All instructions set the flags if and only if they have an s affix.

.thumb

.thumb

(Arm only) The .thumb directive selects the Thumb mode (32-bit) instruction set.

Using the .code 16 directive performs the same action.

.thumb_func

.thumb_func

(Arm only) The .thumb_func directive emits a code state mapping symbol that tells the assembler to assume that the instructions that follow are T16 or T32 instructions (THUMB or THUMB2, respectively).

.uleb128

.uleb128 expressions

(Arm only) The .uleb128 directive causes “unsigned little-endian base 128” to be used. This is a compact, variable-length representation of numbers used by the DWARF symbolic debugging format. See .sleb128.