EDMA3_DRV_ParamentryRegs Struct Reference
[EDMA3 Driver Data Structures]

EDMA3 PaRAM Set. More...

#include <edma3_drv.h>

Data Fields
volatile uint32_t	OPT
volatile uint32_t	SRC
	Starting byte address of Source For FIFO mode, srcAddr must be a 256-bit aligned address.
volatile uint32_t	A_B_CNT
volatile uint32_t	DST
	Starting byte address of destination For FIFO mode, destAddr must be a 256-bit aligned address. i.e. 5 LSBs should be 0.
volatile uint32_t	SRC_DST_BIDX
volatile uint32_t	LINK_BCNTRLD
	Address for linking (AutoReloading of a PaRAM Set) (16 bits) and Reload value of the numArrInFrame (BCNT) (16 bits).
volatile uint32_t	SRC_DST_CIDX
	Index between consecutive frames of a Source Block (SRCCIDX) (16 bits) and Index between consecutive frames of a Dest Block (DSTCIDX) (16 bits).
volatile uint32_t	CCNT
	Number of Frames in a block (CCNT) (16 bits).

Detailed Description

EDMA3 PaRAM Set.

This is a mapping of the EDMA3 PaRAM set provided to the user for ease of modification of the individual PaRAM words.

OPT field of PaRAM Set

Number of bytes in each Array (ACNT) (16 bits) and Number of Arrays in each Frame (BCNT) (16 bits).

Index between consec. arrays of a Source Frame (SRCBIDX) (16 bits) and Index between consec. arrays of a Destination Frame (DSTBIDX) (16 bits).

If SAM is set to 1 (via channelOptions) then srcInterArrIndex should be an even multiple of 32 bytes.

If DAM is set to 1 (via channelOptions) then destInterArrIndex should be an even multiple of 32 bytes

Address for linking (AutoReloading of a PaRAM Set) (16 bits) and Reload value of the numArrInFrame (BCNT) (16 bits).

Link field must point to a valid aligned 32-byte PaRAM set A value of 0xFFFF means no linking.

B count reload field is relevant only for A-sync transfers.

The documentation for this struct was generated from the following file: