EDMA3 Parameter RAM Set in User Configurable format. More...
#include <edma3_drv.h>
Data Fields | |
| volatile uint32_t | opt |
| volatile uint32_t | srcAddr |
| Starting byte address of Source For FIFO mode, srcAddr must be a 256-bit aligned address. | |
| volatile uint16_t | aCnt |
| Number of bytes in each Array (ACNT). | |
| volatile uint16_t | bCnt |
| Number of Arrays in each Frame (BCNT). | |
| volatile uint32_t | destAddr |
| Starting byte address of destination For FIFO mode, destAddr must be a 256-bit aligned address. i.e. 5 LSBs should be 0. | |
| volatile int16_t | srcBIdx |
| Index between consec. arrays of a Source Frame (SRCBIDX) If SAM is set to 1 (via channelOptions) then srcInterArrIndex should be an even multiple of 32 bytes. | |
| volatile int16_t | destBIdx |
| Index between consec. arrays of a Destination Frame (DSTBIDX) If DAM is set to 1 (via channelOptions) then destInterArrIndex should be an even multiple of 32 bytes. | |
| volatile uint16_t | linkAddr |
| Address for linking (AutoReloading of a PaRAM Set) This must point to a valid aligned 32-byte PaRAM set A value of 0xFFFF means no linking Linking is especially useful for use with ping-pong buffers and circular buffers. | |
| volatile uint16_t | bCntReload |
| Reload value of the numArrInFrame (BCNT) Relevant only for A-sync transfers. | |
| volatile int16_t | srcCIdx |
| Index between consecutive frames of a Source Block (SRCCIDX). | |
| volatile int16_t | destCIdx |
| Index between consecutive frames of a Dest Block (DSTCIDX). | |
| volatile uint16_t | cCnt |
| Number of Frames in a block (CCNT). | |
| volatile int16_t | reserved |
| Reserved. | |
EDMA3 Parameter RAM Set in User Configurable format.
This is a mapping of the EDMA3 PaRAM set provided to the user for ease of modification of the individual fields
| volatile uint32_t EDMA3_DRV_PaRAMRegs::opt |
OPT field of PaRAM Set
1.6.1