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00001 /* 00002 * Copyright (c) 2010, Texas Instruments Incorporated 00003 * All rights reserved. 00004 * 00005 * Redistribution and use in source and binary forms, with or without 00006 * modification, are permitted provided that the following conditions 00007 * are met: 00008 * 00009 * * Redistributions of source code must retain the above copyright 00010 * notice, this list of conditions and the following disclaimer. 00011 * 00012 * * Redistributions in binary form must reproduce the above copyright 00013 * notice, this list of conditions and the following disclaimer in the 00014 * documentation and/or other materials provided with the distribution. 00015 * 00016 * * Neither the name of Texas Instruments Incorporated nor the names of 00017 * its contributors may be used to endorse or promote products derived 00018 * from this software without specific prior written permission. 00019 * 00020 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 00021 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, 00022 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 00023 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR 00024 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, 00025 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 00026 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 00027 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 00028 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 00029 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, 00030 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 00031 * 00032 */ 00048 #ifndef ti_sdo_fc_ires_edma3chan_IRES_EDMA3CHAN_ 00049 #define ti_sdo_fc_ires_edma3chan_IRES_EDMA3CHAN_ 00050 00053 00054 #ifdef __cplusplus 00055 extern "C" { 00056 #endif 00057 00058 #include <ti/xdais/ires.h> 00059 00063 #define IRES_EDMA3CHAN_PROTOCOLNAME "ti.sdo.fc.ires.edma3chan" 00064 00068 #define EDMA3CHAN_GTNAME "ti.sdo.fc.ires.edma3chan" 00069 00070 /* 00071 * Note, we wrap the PROTOCOLVERSION in an ifdef so the 00072 * resource managers and algs get this version data placed in their object 00073 * files. Apps, which include rman.h, will have this 'NOPROTOCOLREV' defined. 00074 */ 00075 #ifndef ti_sdo_fc_ires_NOPROTOCOLREV 00076 00080 static IRES_ProtocolRevision IRES_EDMA3CHAN_PROTOCOLREVISION = {1, 0, 0}; 00081 00082 #endif 00083 00088 #define IRES_EDMA3CHAN_MAXPARAMS 512 00089 #define IRES_EDMA3CHAN_MAXTCCS 32 00090 00094 #define IRES_EDMA3CHAN_PARAM_ANY 512 00095 #define IRES_EDMA3CHAN_PARAM_NONE 513 00096 #define IRES_EDMA3CHAN_TCC_ANY 514 00097 #define IRES_EDMA3CHAN_TCC_NONE 515 00098 #define IRES_EDMA3CHAN_EDMACHAN_ANY 516 00099 #define IRES_EDMA3CHAN_QDMACHAN_ANY 516 00100 #define IRES_EDMA3CHAN_CHAN_NONE 518 00101 00105 typedef struct IRES_EDMA3CHAN_Obj *IRES_EDMA3CHAN_Handle; 00106 00110 typedef struct IRES_EDMA3CHAN_PaRamStruct { 00111 unsigned int opt; 00112 unsigned int src; 00113 unsigned short acnt; 00114 unsigned short bcnt; 00115 unsigned int dst; 00116 unsigned short srcElementIndex; 00117 unsigned short dstElementIndex; 00118 unsigned short link; 00119 unsigned short bCntrld; 00120 unsigned short srcFrameIndex; 00121 unsigned short dstFrameIndex; 00122 unsigned short ccnt; 00123 unsigned short rsvd; 00124 } IRES_EDMA3CHAN_PaRamStruct; 00125 00143 typedef struct IRES_EDMA3CHAN_ProtocolArgs { 00144 int size; 00145 IRES_RequestMode mode; 00148 short numPaRams; 00151 short paRamIndex; 00157 short numTccs; 00160 short tccIndex; 00166 short qdmaChan; 00167 short edmaChan; 00176 /* 00177 * If either QDMA or EDMA channel is not 00178 * required , set (qdmaChan or edmaChan) 00179 * to IRES_EDMA3CHAN_CHAN_NONE while 00180 * requesting an EDMA3CHAN handle. 00181 */ 00182 00183 short contiguousAllocation; 00187 short shadowPaRamsAllocation; 00190 } IRES_EDMA3CHAN_ProtocolArgs; 00191 00197 typedef struct IRES_EDMA3CHAN_Obj { 00198 00199 IRES_Obj ires; 00200 IRES_EDMA3CHAN_PaRamStruct * shadowPaRams; 00202 unsigned int * assignedPaRamAddresses; 00204 short * assignedPaRamIndices; 00205 short * assignedTccIndices; 00206 short assignedNumPaRams; 00207 short assignedNumTccs; 00208 short assignedQdmaChannelIndex; 00213 short assignedEdmaChannelIndex; 00218 unsigned int esrBitMaskL; 00219 unsigned int esrBitMaskH; 00222 unsigned int iprBitMaskL; 00223 unsigned int iprBitMaskH; 00226 } IRES_EDMA3CHAN_Obj; 00227 00232 typedef struct IRES_EDMA3CHAN_EDMA3ShadowRegister { 00233 volatile unsigned int ER; 00234 volatile unsigned int ERH; 00235 volatile unsigned int ECR; 00236 volatile unsigned int ECRH; 00237 volatile unsigned int ESR; 00238 volatile unsigned int ESRH; 00239 volatile unsigned int CER; 00240 volatile unsigned int CERH; 00241 volatile unsigned int EER; 00242 volatile unsigned int EERH; 00243 volatile unsigned int EECR; 00244 volatile unsigned int EECRH; 00245 volatile unsigned int EESR; 00246 volatile unsigned int EESRH; 00247 volatile unsigned int SER; 00248 volatile unsigned int SERH; 00249 volatile unsigned int SECR; 00250 volatile unsigned int SECRH; 00251 volatile unsigned char RSVD0[8]; 00252 volatile unsigned int IER; 00253 volatile unsigned int IERH; 00254 volatile unsigned int IECR; 00255 volatile unsigned int IECRH; 00256 volatile unsigned int IESR; 00257 volatile unsigned int IESRH; 00258 volatile unsigned int IPR; 00259 volatile unsigned int IPRH; 00260 volatile unsigned int ICR; 00261 volatile unsigned int ICRH; 00262 volatile unsigned int IEVAL; 00263 volatile unsigned char RSVD1[4]; 00264 volatile unsigned int QER; 00265 volatile unsigned int QEER; 00266 volatile unsigned int QEECR; 00267 volatile unsigned int QEESR; 00268 volatile unsigned int QSER; 00269 volatile unsigned int QSECR; 00270 volatile unsigned char RSVD2[360]; 00271 00272 } IRES_EDMA3CHAN_EDMA3ShadowRegister; 00273 00278 typedef struct IRES_EDMA3CHAN_EDMA3DraeRegister { 00279 volatile unsigned int DRAE; 00280 volatile unsigned int DRAEH; 00281 } IRES_EDMA3CHAN_EDMA3DraeRegister; 00282 00283 /* 00284 * @brief IRES_EDMA3CHAN_EDMA3RegisterLayer defines the EDMA3 CC 00285 * Register Layout 00286 */ 00287 typedef struct IRES_EDMA3CHAN_EDMA3RegisterLayer { 00288 volatile unsigned int REV; 00289 volatile unsigned int CCCFG; 00290 volatile unsigned char RSVD0[248]; 00291 volatile unsigned int DCHMAP[64]; 00292 volatile unsigned int QCHMAP[8]; 00293 volatile unsigned char RSVD1[32]; 00294 volatile unsigned int DMAQNUM[8]; 00295 volatile unsigned int QDMAQNUM; 00296 volatile unsigned char RSVD2[28]; 00297 volatile unsigned int QUETCMAP; 00298 volatile unsigned int QUEPRI; 00299 volatile unsigned char RSVD3[120]; 00300 volatile unsigned int EMR; 00301 volatile unsigned int EMRH; 00302 volatile unsigned int EMCR; 00303 volatile unsigned int EMCRH; 00304 volatile unsigned int QEMR; 00305 volatile unsigned int QEMCR; 00306 volatile unsigned int CCERR; 00307 volatile unsigned int CCERRCLR; 00308 volatile unsigned int EEVAL; 00309 volatile unsigned char RSVD4[28]; 00310 IRES_EDMA3CHAN_EDMA3DraeRegister DRA[8]; 00311 volatile unsigned int QRAE[8]; 00312 volatile unsigned char RSVD5[96]; 00313 volatile unsigned int QUEEVTENTRY[8][16]; 00314 volatile unsigned int QSTAT[8]; 00315 volatile unsigned int QWMTHRA; 00316 volatile unsigned int QWMTHRB; 00317 volatile unsigned char RSVD6[24]; 00318 volatile unsigned int CCSTAT; 00319 volatile unsigned char RSVD7[188]; 00320 volatile unsigned int AETCTL; 00321 volatile unsigned int AETSTAT; 00322 volatile unsigned int AETCMD; 00323 volatile unsigned char RSVD8[244]; 00324 volatile unsigned int MPFAR; 00325 volatile unsigned int MPFSR; 00326 volatile unsigned int MPFCR; 00327 volatile unsigned int MPPAG; 00328 volatile unsigned int MPPA[8]; 00329 volatile unsigned char RSVD9[2000]; 00330 volatile unsigned int ER; 00331 volatile unsigned int ERH; 00332 volatile unsigned int ECR; 00333 volatile unsigned int ECRH; 00334 volatile unsigned int ESR; 00335 volatile unsigned int ESRH; 00336 volatile unsigned int CER; 00337 volatile unsigned int CERH; 00338 volatile unsigned int EER; 00339 volatile unsigned int EERH; 00340 volatile unsigned int EECR; 00341 volatile unsigned int EECRH; 00342 volatile unsigned int EESR; 00343 volatile unsigned int EESRH; 00344 volatile unsigned int SER; 00345 volatile unsigned int SERH; 00346 volatile unsigned int SECR; 00347 volatile unsigned int SECRH; 00348 volatile unsigned char RSVD10[8]; 00349 volatile unsigned int IER; 00350 volatile unsigned int IERH; 00351 volatile unsigned int IECR; 00352 volatile unsigned int IECRH; 00353 volatile unsigned int IESR; 00354 volatile unsigned int IESRH; 00355 volatile unsigned int IPR; 00356 volatile unsigned int IPRH; 00357 volatile unsigned int ICR; 00358 volatile unsigned int ICRH; 00359 volatile unsigned int IEVAL; 00360 volatile unsigned char RSVD11[4]; 00361 volatile unsigned int QER; 00362 volatile unsigned int QEER; 00363 volatile unsigned int QEECR; 00364 volatile unsigned int QEESR; 00365 volatile unsigned int QSER; 00366 volatile unsigned int QSECR; 00367 volatile unsigned char RSVD12[3944]; 00368 IRES_EDMA3CHAN_EDMA3ShadowRegister SHADOW[8]; 00369 volatile unsigned char RSVD13[4096]; 00370 IRES_EDMA3CHAN_PaRamStruct PARAMENTRY[512]; 00371 } IRES_EDMA3CHAN_EDMA3RegisterLayer; 00372 00376 typedef struct IRES_EDMA3CHAN_Properties { 00377 00378 unsigned int numDmaChannels; 00380 unsigned int numQdmaChannels; 00383 unsigned int numTccs; 00385 unsigned int numPaRAMSets; 00386 unsigned int numEvtQueue; 00388 unsigned int numTcs; 00391 unsigned int numRegions; 00401 unsigned short dmaChPaRAMMapExists; 00402 00403 unsigned short memProtectionExists; 00406 IRES_EDMA3CHAN_EDMA3RegisterLayer *globalRegs; 00409 } IRES_EDMA3CHAN_Properties; 00410 00411 #ifdef __cplusplus 00412 } 00413 #endif /* extern "C" */ 00414 00417 #endif 00418 /* 00419 * @(#) ti.sdo.fc.ires.edma3chan; 1, 0, 0,177; 12-1-2010 17:25:02; /db/atree/library/trees/fc/fc-p01x/src/ xlibrary 00420 00421 */ 00422