ires_edma3Chan.h

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/* 
 * Copyright (c) 2012, Texas Instruments Incorporated
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * *  Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 *
 * *  Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 *
 * *  Neither the name of Texas Instruments Incorporated nor the names of
 *    its contributors may be used to endorse or promote products derived
 *    from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 * 
 */
#ifndef ti_sdo_fc_ires_edma3chan_IRES_EDMA3CHAN_
#define ti_sdo_fc_ires_edma3chan_IRES_EDMA3CHAN_


#ifdef __cplusplus
extern "C" {
#endif

#include <ti/xdais/xdas.h>
#include <ti/xdais/ires_common.h>

#define IRES_EDMA3CHAN_PROTOCOLNAME     "ti.sdo.fc.ires.edma3chan"

#define EDMA3CHAN_MODNAME  "ti.sdo.fc.ires.edma3chan"

/*
 * Note, we wrap the PROTOCOLVERSION in an ifdef so the
 * resource managers and algs get this version data placed in their object
 * files.  Apps, which include rman.h, will have this 'NOPROTOCOLREV' defined.
 */
#ifndef ti_sdo_fc_ires_NOPROTOCOLREV

static IRES_ProtocolRevision IRES_EDMA3CHAN_PROTOCOLREVISION = {1, 0, 0};

#endif

#define IRES_EDMA3CHAN_PROTOCOLREVISION_1_0_0 {1, 0, 0}
#define IRES_EDMA3CHAN_SETPROTOCOLREVISION_1_0_0(rev) {(rev)->Major = 1; \
        (rev)->Source = 0; (rev)->Radius = 0;}

#define IRES_EDMA3CHAN_PROTOCOLREVISION_2_0_0 {2, 0, 0}
#define IRES_EDMA3CHAN_SETPROTOCOLREVISION_2_0_0(rev) {(rev)->Major = 2; \
        (rev)->Source = 0; (rev)->Radius = 0;}

#define IRES_EDMA3CHAN_MAXPARAMS        512
#define IRES_EDMA3CHAN_MAXTCCS          32
#define IRES_EDMA3CHAN_NUMDESTTYPES     8

#define IRES_EDMA3CHAN_PARAM_ANY        512
#define IRES_EDMA3CHAN_PARAM_NONE       513
#define IRES_EDMA3CHAN_TCC_ANY          514
#define IRES_EDMA3CHAN_TCC_NONE         515
#define IRES_EDMA3CHAN_EDMACHAN_ANY     516
#define IRES_EDMA3CHAN_QDMACHAN_ANY     516
#define IRES_EDMA3CHAN_CHAN_NONE        518

typedef struct IRES_EDMA3CHAN_Obj *IRES_EDMA3CHAN_Handle;

typedef struct IRES_EDMA3CHAN2_Obj *IRES_EDMA3CHAN2_Handle;

/* Note that the field descriptions were originally taken from SPRU996. */
typedef struct IRES_EDMA3CHAN_PaRamStruct {
    unsigned int opt;                
    unsigned int src;                
    unsigned short acnt;             
    unsigned short bcnt;             
    unsigned int dst;                
    unsigned short srcElementIndex;  
    unsigned short dstElementIndex;  
    unsigned short link;             
    unsigned short bCntrld;          
    unsigned short srcFrameIndex;    
    unsigned short dstFrameIndex;    
    unsigned short ccnt;             
    unsigned short rsvd;             
} IRES_EDMA3CHAN_PaRamStruct;


typedef struct IRES_EDMA3CHAN_ProtocolArgs {
    int     size;                 
    IRES_RequestMode mode;        
    short   numPaRams;            
    short   paRamIndex;           
    short   numTccs;              
    short   tccIndex;             
    short   qdmaChan;             
    short   edmaChan;             
    short contiguousAllocation;   
    short shadowPaRamsAllocation;  
} IRES_EDMA3CHAN_ProtocolArgs;

typedef struct  IRES_EDMA3CHAN_Obj {

    IRES_Obj ires;
    IRES_EDMA3CHAN_PaRamStruct * shadowPaRams;  
    unsigned int * assignedPaRamAddresses;      
    short * assignedPaRamIndices;               
    short * assignedTccIndices;                 
    short assignedNumPaRams;                    
    short assignedNumTccs;                      
    short assignedQdmaChannelIndex;             
    short assignedEdmaChannelIndex;             
    unsigned int esrBitMaskL;                   
    unsigned int esrBitMaskH;                   
    unsigned int iprBitMaskL;                   
    unsigned int iprBitMaskH;                   
} IRES_EDMA3CHAN_Obj;

typedef struct IRES_EDMA3CHAN_EDMA3ShadowRegister {
    volatile unsigned int ER;
    volatile unsigned int ERH;
    volatile unsigned int ECR;
    volatile unsigned int ECRH;
    volatile unsigned int ESR;
    volatile unsigned int ESRH;
    volatile unsigned int CER;
    volatile unsigned int CERH;
    volatile unsigned int EER;
    volatile unsigned int EERH;
    volatile unsigned int EECR;
    volatile unsigned int EECRH;
    volatile unsigned int EESR;
    volatile unsigned int EESRH;
    volatile unsigned int SER;
    volatile unsigned int SERH;
    volatile unsigned int SECR;
    volatile unsigned int SECRH;
    volatile unsigned char RSVD0[8];
    volatile unsigned int IER;
    volatile unsigned int IERH;
    volatile unsigned int IECR;
    volatile unsigned int IECRH;
    volatile unsigned int IESR;
    volatile unsigned int IESRH;
    volatile unsigned int IPR;
    volatile unsigned int IPRH;
    volatile unsigned int ICR;
    volatile unsigned int ICRH;
    volatile unsigned int IEVAL;
    volatile unsigned char RSVD1[4];
    volatile unsigned int QER;
    volatile unsigned int QEER;
    volatile unsigned int QEECR;
    volatile unsigned int QEESR;
    volatile unsigned int QSER;
    volatile unsigned int QSECR;
    volatile unsigned char RSVD2[360];

} IRES_EDMA3CHAN_EDMA3ShadowRegister;

typedef struct IRES_EDMA3CHAN_EDMA3DraeRegister {
    volatile unsigned int DRAE;
    volatile unsigned int DRAEH;
} IRES_EDMA3CHAN_EDMA3DraeRegister;

typedef struct IRES_EDMA3CHAN_EDMA3RegisterLayer {
    volatile unsigned int REV;
    volatile unsigned int CCCFG;
    volatile unsigned char RSVD0[248];
    volatile unsigned int DCHMAP[64];
    volatile unsigned int QCHMAP[8];
    volatile unsigned char RSVD1[32];
    volatile unsigned int DMAQNUM[8];
    volatile unsigned int QDMAQNUM;
    volatile unsigned char RSVD2[28];
    volatile unsigned int QUETCMAP;
    volatile unsigned int QUEPRI;
    volatile unsigned char RSVD3[120];
    volatile unsigned int EMR;
    volatile unsigned int EMRH;
    volatile unsigned int EMCR;
    volatile unsigned int EMCRH;
    volatile unsigned int QEMR;
    volatile unsigned int QEMCR;
    volatile unsigned int CCERR;
    volatile unsigned int CCERRCLR;
    volatile unsigned int EEVAL;
    volatile unsigned char RSVD4[28];
    IRES_EDMA3CHAN_EDMA3DraeRegister DRA[8];
    volatile unsigned int QRAE[8];
    volatile unsigned char RSVD5[96];
    volatile unsigned int QUEEVTENTRY[8][16];
    volatile unsigned int QSTAT[8];
    volatile unsigned int QWMTHRA;
    volatile unsigned int QWMTHRB;
    volatile unsigned char RSVD6[24];
    volatile unsigned int CCSTAT;
    volatile unsigned char RSVD7[188];
    volatile unsigned int AETCTL;
    volatile unsigned int AETSTAT;
    volatile unsigned int AETCMD;
    volatile unsigned char RSVD8[244];
    volatile unsigned int MPFAR;
    volatile unsigned int MPFSR;
    volatile unsigned int MPFCR;
    volatile unsigned int MPPAG;
    volatile unsigned int MPPA[8];
    volatile unsigned char RSVD9[2000];
    volatile unsigned int ER;
    volatile unsigned int ERH;
    volatile unsigned int ECR;
    volatile unsigned int ECRH;
    volatile unsigned int ESR;
    volatile unsigned int ESRH;
    volatile unsigned int CER;
    volatile unsigned int CERH;
    volatile unsigned int EER;
    volatile unsigned int EERH;
    volatile unsigned int EECR;
    volatile unsigned int EECRH;
    volatile unsigned int EESR;
    volatile unsigned int EESRH;
    volatile unsigned int SER;
    volatile unsigned int SERH;
    volatile unsigned int SECR;
    volatile unsigned int SECRH;
    volatile unsigned char RSVD10[8];
    volatile unsigned int IER;
    volatile unsigned int IERH;
    volatile unsigned int IECR;
    volatile unsigned int IECRH;
    volatile unsigned int IESR;
    volatile unsigned int IESRH;
    volatile unsigned int IPR;
    volatile unsigned int IPRH;
    volatile unsigned int ICR;
    volatile unsigned int ICRH;
    volatile unsigned int IEVAL;
    volatile unsigned char RSVD11[4];
    volatile unsigned int QER;
    volatile unsigned int QEER;
    volatile unsigned int QEECR;
    volatile unsigned int QEESR;
    volatile unsigned int QSER;
    volatile unsigned int QSECR;
    volatile unsigned char RSVD12[3944];
    IRES_EDMA3CHAN_EDMA3ShadowRegister SHADOW[8];
    volatile unsigned char RSVD13[4096];
    IRES_EDMA3CHAN_PaRamStruct PARAMENTRY[512];
} IRES_EDMA3CHAN_EDMA3RegisterLayer;

typedef struct IRES_EDMA3CHAN_Properties {

    unsigned int        numDmaChannels;         
    unsigned int        numQdmaChannels;        
    unsigned int        numTccs;                
    unsigned int        numPaRAMSets;           
    unsigned int        numEvtQueue;            
    unsigned int        numTcs;                 
    unsigned int        numRegions;             
    unsigned short dmaChPaRAMMapExists;

    unsigned short memProtectionExists;         
    IRES_EDMA3CHAN_EDMA3RegisterLayer *globalRegs; 
} IRES_EDMA3CHAN_Properties;

typedef enum IRES_EDMA3CHAN_DmaDestType {
    INTMEMORY0 = 0,
    INTMEMORY1 = 1,
    INTMEMORY2 = 2,
    EXTMEMORY0 = 3,
    EXTMEMORY1 = 4,
    EXTMEMORY2 = 5,
    OTHER0     = 6,
    OTHER1     = 7
} IRES_EDMA3CHAN_DmaDestType;

typedef struct  IRES_EDMA3CHAN2_Obj {

    IRES_Obj ires;

    IRES_EDMA3CHAN_PaRamStruct * shadowPaRams;

    unsigned int * assignedPaRamAddresses;

    short * assignedPaRamIndices;

    short * assignedTccIndices;

    short assignedNumPaRams;

    short assignedNumTccs;

    short assignedQdmaChannelIndex;

    short assignedEdmaChannelIndex;

    unsigned int esrBitMaskL;

    unsigned int esrBitMaskH;

    unsigned int iprBitMaskL;

    unsigned int iprBitMaskH;

    XDAS_Int32 * queueMap;                  
} IRES_EDMA3CHAN2_Obj;

#ifdef __cplusplus
}
#endif /* extern "C" */

#endif
/*
 *  @(#) ti.sdo.fc.ires.edma3chan; 1, 0, 0,3; 4-16-2012 00:01:10; /db/atree/library/trees/fc/fc-q08/src/ xlibrary

 */