Detailed Description

Defines constants and interfaces for configuration of DSPLINK.

============================================================================

Path:: /gpp/inc/usr/

Version:: 1.65.02.09 ============================================================================

Copyright:: Copyright (C) 2002-2012, Texas Instruments Incorporated - https://www.ti.com/

Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met:

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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ============================================================================

#include <dsplink.h>
#include <linkcfgdefs_os.h>

Include dependency graph for linkcfgdefs.h:

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Data Structures

struct LINKCFG_Gpp_tag

struct LINKCFG_Dsp_tag

struct LINKCFG_MemEntry_tag

struct CFG_LinkDrv_tag

struct LINKCFG_Ips_tag

struct LINKCFG_Pool_tag

struct LINKCFG_DataDrv_tag

struct LINKCFG_Mqt_tag

struct LINKCFG_RingIo_tag

struct LINKCFG_MpList_tag

struct LINKCFG_Mpcs_tag

struct LINKCFG_Log_tag

struct LINKCFG_DspConfig_tag

struct LINKCFG_Object_tag

Typedefs

LINKCFG_Gpp

This structure defines the configuration structure for the GPP.

============================================================================

Parameters:

name	Name of GPP Processor.
maxMsgqs	Maximum MSGQs that can be opened on the GPP.
maxChnlQueue	Maximum Queue Length for all channels created on the GPP.
poolTableId	POOL table ID to be used for intra-GPP communication. A value of -1 indicates that no POOL is required by the GPP.
numPools	Number of POOLs within the pool table for the GPP.
gppOsObject	Pointer to the GPP OS-specific configuration object. ============================================================================

typedef struct LINKCFG_Gpp_tag LINKCFG_Gpp

LINKCFG_Dsp

This structure defines the configuration structure for the DSP.

============================================================================

Parameters:

name	Name of DSP processor.
dspArch	Architecture of the DSP.
loaderName	Name of loader to be used for loading the DSP executable.
autoStart	AutoStart flag indicating whether a default DSP image should be loaded on startup. Currently not supported.
execName	Name of executable to load in case autostart is used.
doDspCtrl	Indicates whether DSP/BIOS LINK should do the dsp control for the DSP. This depends on the DSPLink boot mode chosen.
resumeAddr	The resume address after hibernating.
resetVector	Address of reset vector of DSP.
resetCodeSize	Size of code at DSP Reset Vector.
maduSize	Minimum addressable unit on the DSP.
cpuFreq	The frequency at which the DSP is running (in KHz). Specify -1 if the cpuFreq is not to be set from GPP-side and the default DSP/BIOS setting is to be used.
endian	Endianism info of DSP.
wordSwap	Indicates whether words need to be swapped while writing into the memory for the DSP.
memTableId	Table number of the MEM entries for this DSP.
memEntries	Number of entries in the MEM table.
linkDrvId	Link Driver table identifier for this DSP.
arg1	Platform specific argument.
arg2	Platform specific argument.
arg3	Platform specific argument.
arg4	Platform specific argument.
arg5	Platform specific argument. ============================================================================

typedef struct LINKCFG_Dsp_tag LINKCFG_Dsp

LINKCFG_MemEntry

This structure defines an entry in the MEM table.

============================================================================

Parameters:

entry	Entry number in the memory table.
name	Name identifying the memory region.
physAddr	Physical address of the memory region.
dspVirtAddr	DSP virtual address of the memory region.
gppVirtAddr	GPP virtual address of the memory region. If specified as -1, the GPP virtual address is assumed to be invalid, and shall be set internally within the DSPLINK driver.
size	Size of the memory region.
shared	Flag indicating whether the memory region is shared between GPP and DSP.
syncd	Flag indicating whether the memory region is synchonized between GPP and DSP. ============================================================================

typedef struct LINKCFG_MemEntry_tag LINKCFG_MemEntry

LINKCFG_LinkDrv

This structure defines the configuration information for the physical link driver.

============================================================================

Parameters:

name	Name of the physical link driver.
hshkPollCount	Poll count to be used for the handshake between GPP and DSP. The GPP spins in a loop for number of iterations equal to the handshake poll count or till the DSP completes its handshake. A value of -1 indicates infinite wait.
memEntry	MEM Entry for the memory area used by this physical link. This field is optional and can be specified as -1 in case a MEM entry is not required.
ipsTableId	IPS table ID.
numIpsEntries	Number of IPS table entries for this link driver.
poolTableId	POOL table ID.
numPools	Number of POOLs within the pool table for this link driver.
dataTableId	Table number of the data driver(s) used with this DSP.
numDataDrivers	Number of data drivers used with this DSP.
mqtId	The ID of the MQT which is to be used for this DSP.
ringIoTableId	Table number of the RINGIO object(s) for this DSP.
mplistTableId	Table number of the MPLIST object(s) for this DSP.
mpcsTableId	Table number of the MPCS object(s) for this DSP. ============================================================================

typedef struct CFG_LinkDrv_tag LINKCFG_LinkDrv

LINKCFG_Ips

This structure defines the configuration information for the Inter-processor Signaling Component.

============================================================================

Parameters:

name	Name of the IPS component.
numIpsEvents	Number of events supported by the IPS.
memEntry	MEM entry for the memory area used for this IPS component. This field is optional and can be specified as -1 in case a MEM entry is not required.
gppIntId	Interrupt Number to used by the IPS on GPP-side.
dspIntId	Interrupt Number to used by the IPS on DSP-side.
dspIntVectorId	Interrupt Vector Number to used by the IPS on DSP-side.
arg1	First IPS-specific optional argument.
arg2	Second IPS-specific optional argument. ============================================================================

typedef struct LINKCFG_Ips_tag LINKCFG_Ips

LINKCFG_Pool

This structure defines the configuration information for a buffer pool, from which buffers for use with DSPLINK can be allocated through the POOL interface(s).

============================================================================

Parameters:

name	Name of the pool.
memEntry	MEM Entry for the memory area used by this buffer pool. This field is optional and can be specified as -1 in case a MEM entry is not required.
poolSize	Size of the buffer pool.
ipsId	ID of the IPS used (if any). A value of -1 indicates that no IPS is required by the pool.
ipsEventNo	IPS Event number associated with POOL (if any). A value of -1 indicates that no IPS is required by the pool.
poolMemEntry	Pool memory region section ID.
arg1	First optional pool-specific argument.
arg2	Second optional pool-specific argument. ============================================================================

typedef struct LINKCFG_Pool_tag LINKCFG_Pool

LINKCFG_DataDrv

This structure defines the configuration structure for the data streaming driver using the CHNL component.

============================================================================

Parameters:

name	Name of the data transfer driver.
baseChnlId	Base channel ID for this data driver.
numChannels	Number of logical channels for this data driver.
maxBufSize	Maximum size of data buffer supported by this data driver. If no limit is imposed by the driver, a value of -1 can be specified.
memEntry	MEM entry for the memory area for data streaming driver. This field is optional and can be specified as -1 in case a MEM entry is not required.
poolId	Identifier for the pool from where buffers are allocated.
queuePerChnl	Buffer Queue length on each channel supported by the data driver.
ipsId	ID of the IPS to be used (if any). A value of -1 indicates that no IPS is required by the data driver.
ipsEventNo	IPS Event number associated with data driver (if any). A value of -1 indicates that no IPS is required by the data driver.
arg1	First optional data driver specific argument. The significance of this argument is specific to a data driver.
arg2	Second optional data driver specific argument 2. The significance of this argument is specific to a data driver. ============================================================================

typedef struct LINKCFG_DataDrv_tag LINKCFG_DataDrv

LINKCFG_Mqt

This structure defines the configuration structure for the Message Queue Transport.

============================================================================

Parameters:

name	Name of the MQT.
memEntry	MEM entry id for the memory area used by this MQT. This field is optional and can be specified as -1 in case a MEM entry is not required.
maxMsgSize	Maximum size of message supported by MQT. May be -1 if there is no limit on maximum message size for the MQT.
ipsId	ID of the IPS to be used (if any). A value of -1 indicates that no IPS is required by the MQT.
ipsEventNo	IPS Event number associated with MQT (if any). A value of -1 indicates that no IPS is required by the MQT.
arg1	First optional argument for this MQT. The significance of this argument is specific to the MQT.
arg2	Second optional argument for this MQT. The significance of this argument is specific to the MQT. ============================================================================

typedef struct LINKCFG_Mqt_tag LINKCFG_Mqt

LINKCFG_RingIo

This structure defines the configuration structure for the RingIO component.

============================================================================

Parameters:

name	Name of the RingIO.
memEntry	MEM entry ID for the memory area used by this RingIO.
maxEntries	Maximum number of RingIO instances supported by the RingIO.
ipsId	ID of the IPS to be used.
ipsEventNo	IPS Event number associated with the RingIO. ============================================================================

typedef struct LINKCFG_RingIo_tag LINKCFG_RingIo

LINKCFG_MpList

This structure defines the configuration structure for the MPLIST component.

============================================================================

Parameters:

name	Name of the MPLIST.
memEntry	MEM entry ID for the memory area used by this MPLIST.
maxEntries	Maximum number of MPLIST instances supported by the MPLIST.
ipsId	ID of the IPS to be used (if any). A value of -1 indicates that no IPS is required by the MPLIST.
ipsEventNo	IPS Event number associated with MPLIST (if any). A value of -1 indicates that no IPS is required by the MPLIST. ============================================================================

typedef struct LINKCFG_MpList_tag LINKCFG_MpList

LINKCFG_Mpcs

This structure defines the configuration structure for the MPCS component.

============================================================================

Parameters:

name	Name of the MPCS.
memEntry	MEM entry ID for the memory area used by this MPCS.
maxEntries	Maximum number of MPCS instances supported by the MPCS.
ipsId	ID of the IPS to be used (if any). A value of -1 indicates that no IPS is required by the MPCS.
ipsEventNo	IPS Event number associated with MPCS (if any). A value of -1 indicates that no IPS is required by the MPCS. ============================================================================

typedef struct LINKCFG_Mpcs_tag LINKCFG_Mpcs

LINKCFG_Log

This structure defines the configuration structure for the LOG component.

============================================================================

Parameters:

gdMsgqPut	GPP->DSP MSG Transfer - MSGQ_put call.
gdMsgqSendInt	GPP->DSP MSG Transfer - GPP sends interrupt.
gdMsgqIsr	GPP->DSP MSG Transfer - DSP receives interrupt.
gdMsgqQue	GPP->DSP MSG Transfer - Message queued at DSP.
dgMsgqPut	DSP->GPP MSG Transfer - MSGQ_put call.
dgMsgqSendInt	DSP->GPP MSG Transfer - DSP sends interrupt.
dgMsgqIsr	DSP->GPP MSG Transfer - GPP receives interrupt.
dgMsgqQue	DSP->GPP MSG Transfer - Message queued at GPP.
gdChnlIssueStart	GPP->DSP CHNL Transfer - Entering inside ISSUE call.
gdChnlIssueQue	GPP->DSP CHNL Transfer - ISSUE: Buffer is queued in internal structure on GPP.
gdChnlIssueCompl	GPP->DSP CHNL Transfer - ISSUE call completed.
gdChnlXferStart	GPP->DSP CHNL Transfer - Initiating a buffer transfer by GPP.
gdChnlXferProcess	GPP->DSP CHNL Transfer - Actual transfer of buffer is going to take place.
gdChnlXferCompl	GPP->DSP CHNL Transfer - Buffer transfer is complete.
gdChnlReclStart	GPP->DSP CHNL Transfer - Entering RECLAIM call.
gdChnlReclPend	GPP->DSP CHNL Transfer - RECLAIM: Wait on a semaphore.
gdChnlReclPost	GPP->DSP CHNL Transfer - RECLAIM: Posting the Semaphore.
gdChnlReclCompl	GPP->DSP CHNL Transfer - RECLAIM call completed.
dgChnlIssueQue	DSP->GPP CHNL Transfer - ISSUE: Buffer is queued in internal structure on DSP.
dgChnlXferStart	DSP->GPP CHNL Transfer - Initiating a buffer transfer by DSP.
dgChnlXferProcess	DSP->GPP CHNL Transfer - Actual transfer of buffer is going to take place.
dgChnlXferCompl	DSP->GPP CHNL Transfer - Buffer transfer is complete.
dgChnlReclPend	DSP->GPP CHNL Transfer - RECLAIM: Wait on a semaphore.
dgChnlReclPost	DSP->GPP CHNL Transfer - RECLAIM: Posting the Semaphore.
msgIdRangeStart	MSG ID range: lower limit.
msgIdRangeEnd	MSG ID range: upper limit. ============================================================================

typedef struct LINKCFG_Log_tag LINKCFG_Log

LINKCFG_DspConfig

Defines the object containing all configuration items for DSPs.

============================================================================

Parameters:

dspObject	DSP object.
numDrvs	Number of link Drv specified in configuration database.
linkDrvObjects	Pointer to the array of link Drv objects.
numMemTables	Number of MEM tables specified in configuration database.
memTables	Pointer to the array of memory information table arrays.
numIpsTables	Number of IPS tables.
ipsTables	Pointer to the array of IPS table arrays.
numPoolTables	Number of POOL tables.
poolTables	Pointer to the array of POOL table arrays.
numDataTables	Number of data tables.
dataTables	Pointer to the array data table arrays.
numMqts	Number of Message Queue Transports.
mqtObjects	Pointer to the array of MQT objects.
numRingIo	Number of RingIO tables.
ringIoObjects	Pointer to the array of RingIO tables.
numMpList	Number of MPLIST tables.
mplistObjects	Pointer to the array of MPLIST tables.
numMpcs	Number of MPCS tables.
mpcsObjects	Pointer to the array of MPCS tables.
logObject	Pointer to the LOG object. ============================================================================

typedef struct
LINKCFG_DspConfig_tag LINKCFG_DspConfig

LINKCFG_Object

This structure defines the configuration structure for the system.

============================================================================

Parameters:

gppObject	Pointer to the GPP specific configuration object.
linkObjects	DSP/BIOS LINK configuration structures. ============================================================================

typedef struct LINKCFG_Object_tag LINKCFG_Object

Enumerations

DSP_BootMode

This structure defines the configuration structure for the GPP.

============================================================================

Parameters:

DSP_BootMode_Boot_NoPwr	This is backward compatible with the default false i.e. DSPLINK_BOOT_MODE. Wherein DSPLink does not do power management of DSP PROC_attach will put DSP in local reset. It will not power up the DSP. PROC_start will set entry point for DSP i.e. c_int00 and release DSP from reset. PROC_stop will put DSP in local reset. PROC_detach will not power down the DSP.
DSP_BootMode_Boot_Pwr	This is backward compatible with the default true i.e. DSPLINK_BOOT_MODE. Wherein DSPLink does power management of DSP PROC_attach will put DSP in local reset. It will power up the DSP. PROC_start will set entry point for DSP i.e. c_int00 and release DSP from reset. PROC_stop will put DSP in local reset. PROC_detach will power down the DSP.
DSP_BootMode_NoLoad_NoPwr	This is added to support DSPLINK_NOLOAD_MODE. PROC_attach will put DSP in local reset. It will not power up the DSP. PROC_start will set entry point for DSP i.e. c_int00 and release DSP from reset PROC_stop will put DSP in local reset. PROC_detach will not power down the DSP.
DSP_BootMode_NoLoad_Pwr	This is added to support DSPLINK_NOLOAD_MODE. PROC_attach will put DSP in local reset. It will power up the DSP. PROC_start will set entry point for DSP i.e. c_int00 and release DSP from reset PROC_stop will put DSP in local reset. PROC_detach will power down the DSP.
DSP_BootMode_NoBoot	This is added to support DSPLINK_NOBOOT_MODE PROC_attach will not put DSP in local reset. It will not power up the DSP. PROC_start will not set entry point for DSP i.e. c_int00 and not release DSP from reset PROC_stop will not put DSP in local reset. PROC_detach will not power down the DSP.

============================================================================

enum DSP_BootMode {
DSP_BootMode_Boot_NoPwr = 0x0,
DSP_BootMode_Boot_Pwr,
DSP_BootMode_NoLoad_NoPwr,
DSP_BootMode_NoLoad_Pwr,
DSP_BootMode_NoBoot
}

Endianism

Enumeration of data endianism.

============================================================================

Parameters:

Endianism_Default	Default endianism - no conversion required.
Endianism_Big	Big endian.
Endianism_Little	Little endian. ============================================================================

enum Endianism {
Endianism_Default = 1u,
Endianism_Big = 2u,
Endianism_Little = 3u
}

DspArch

Enumerates the various architectures of DSP supported by DSP/BIOS LINK.

============================================================================

Parameters:

DspArch_Unknown	It indicates that the architecture is not supported.
DspArch_C55x	It indicates that the architecture is C55x.
DspArch_C64x	It indicates that the architecture is C64x.
DspArch_C64x_Bios5	It indicates that the architecture is C64x and the DSP OS version is DSP/BIOS 5.xx.
DspArch_C64x_Bios6	It indicates that the architecture is C64x and the DSP OS version is DSP/BIOS 6.xx. ============================================================================

enum DspArch {
DspArch_Unknown = 0u,
DspArch_C55x = 1u,
DspArch_C64x = 2u,
DspArch_C64x_Bios5 = 3u,
DspArch_C64x_Bios6 = 4u
}