00001 00044 #if !defined (DM648_HAL_PCI_H) 00045 #define DM648_HAL_PCI_H 00046 00047 00048 /* ----------------------------------- DSP/BIOS Link */ 00049 #include <dsplink.h> 00050 00051 /* ----------------------------------- Hardware Abstraction Layer */ 00052 #include <dm648_hal.h> 00053 00054 00055 #if defined (__cplusplus) 00056 extern "C" { 00057 #endif /* if defined (__cplusplus) */ 00058 00059 00066 #define NUM_BARS 6 00067 00074 #define PCI33_DMA_MAXTHROUGHPUT 132u 00075 00082 #define SCRATCH_BAR_NUMBER 0 00083 00090 #define DDR_REGS_BAR_NO 1u 00091 00092 00099 #define CFG_REGS_BAR_NO 2u 00100 00107 #define RWMEM_BAR_NO 4u 00108 00115 #define SHMEM_BAR_NO 5u 00116 00123 #define LPSC_GEM 33u 00124 00131 #define LPSC_EDMA_TPCC 0u 00132 00139 #define LPSC_DDR 7u 00140 00147 #define DM648_BAR2_BASE 0x02000000u 00148 00155 #define DM648_PCIMEM_BASE 0x40000000u 00156 00163 #define DM648_DEVREG_BASE 0x02049000u 00164 00171 #define DM648_EDMAREG_BASE 0x02A00000u 00172 00179 #define DM648_DDRREG_BASE 0x78000000u 00180 00187 #define DM648_MDCTL_BASE 0x02046A00 00188 00195 #define DM648_MDSTAT_BASE 0x02046800 00196 00203 #define DM648_PTCMD_BASE 0x02046120 00204 00211 #define DM648_PTSTAT_BASE 0x02046128 00212 00219 #define DM648_PCIREG_BASE 0x02048400u 00220 00221 00228 #define DM648_SOFTINT0_MASK 0x01000000u 00229 00236 #define DM648_SOFTINT1_MASK 0x02000000 00237 00244 #define DM648_LRESET_MASK 0x00000100u 00245 00252 #define DM648_INTSTATUS_MASK 0x00080000u 00253 00260 #define DM648_BOOTCMPLTBC_MASK 0x00000001u 00261 00268 #define DM648_PCIADLEN 0x00800000u 00269 00276 #define DM648_PCIADWRBITMASK 0xFF800000u 00277 00284 #define DM648_PAGEWRBITMASK 0xFF800000 00285 00292 #define HAL_CONFIGURE_MAP 0x1 00293 00300 #define HAL_CONFIGURE_UNMAP 0x2 00301 00308 #define HAL_CONFIGURE_SET 0x3 00309 00322 typedef struct DM648_devRegs_tag { 00323 volatile Uint32 PINMUX0 ; 00324 volatile Uint32 PINMUX1 ; 00325 volatile Uint32 DSPBOOTADDR ; 00326 volatile Uint32 BOOTCMPLT ; 00327 volatile Uint32 RSVD0 ; 00328 volatile Uint32 BOOTCFG ; 00329 volatile Uint32 VDD1P0V_ADJ ; 00330 volatile Uint32 VDD1P2V_ADJ ; 00331 volatile Uint32 DDR_SLEW ; 00332 volatile Uint32 PERIPHEN ; 00333 volatile Uint32 DEVICE_ID ; 00334 volatile Uint32 DAC_DEMEN ; 00335 volatile Uint32 UHPICTL ; 00336 volatile Uint32 RSVD1 [2] ; 00337 volatile Uint32 MSTPRI0 ; 00338 volatile Uint32 MSTPRI1 ; 00339 volatile Uint32 VPSS_CLK_CTRL ; 00340 volatile Uint32 VDD3P3V_PWRDN ; 00341 volatile Uint32 DFT_ENABLE ; 00342 volatile Uint32 SEC_SCAN_REG ; 00343 volatile Uint32 SEC_TEST_REG ; 00344 volatile Uint32 SEC_TAP_CTL ; 00345 volatile Uint32 PUBLIC_KEY0 ; 00346 volatile Uint32 PUBLIC_KEY1 ; 00347 volatile Uint32 PUBLIC_KEY2 ; 00348 volatile Uint32 PUBLIC_KEY3 ; 00349 volatile Uint32 VLYNQ_DELAY ; 00350 volatile Uint32 SEC_PSEUDO0 ; 00351 volatile Uint32 SEC_PSEUDO1 ; 00352 volatile Uint32 RSVD2 [3] ; 00353 volatile Uint32 TIMERCTL ; 00354 volatile Uint32 TPTCCCFG ; 00355 volatile Uint32 RSVD3 ; 00356 } DM648_devRegs ; 00357 00364 typedef struct { 00365 volatile Uint32 MIDR ; 00366 volatile Uint32 SDSTAT ; 00367 volatile Uint32 SDCFG ; 00368 volatile Uint32 SDREF ; 00369 volatile Uint32 SDTIM1 ; 00370 volatile Uint32 SDTIM2 ; 00371 volatile Uint8 RSVD0[8] ; 00372 volatile Uint32 BPRIO ; 00373 volatile Uint8 RSVD1 [192] ; 00374 volatile Uint32 DDRCTL ; 00375 volatile Uint32 PHYSTAT ; 00376 } DM648_ddrRegs ; 00377 00384 typedef struct DM648_paramEntry_tags { 00385 volatile Uint32 OPTION ; 00386 volatile Uint32 SRC ; 00387 volatile Uint32 A_B_CNT ; 00388 volatile Uint32 DST ; 00389 volatile Uint32 SRC_DST_BIDX ; 00390 volatile Uint32 LINK_BCNTRLD ; 00391 volatile Uint32 SRC_DST_CIDX ; 00392 volatile Uint32 CCNT ; 00393 } DM648_paramEntry ; 00394 00401 typedef struct DM648_edmaRegs_tag { 00402 volatile Uint32 REV ; 00403 volatile Uint32 CCCFG ; 00404 volatile Uint8 RSVD0 [248] ; 00405 volatile Uint32 DCHMAP [64] ; 00406 volatile Uint32 QCHMAP [8] ; 00407 volatile Uint8 RSVD1 [32] ; 00408 volatile Uint32 DMAQNUM [8] ; 00409 volatile Uint32 QDMAQNUM ; 00410 volatile Uint8 RSVD2 [28] ; 00411 volatile Uint32 QUETCMAP ; 00412 volatile Uint32 QUEPRI ; 00413 volatile Uint8 RSVD3 [120] ; 00414 volatile Uint32 EMR ; 00415 volatile Uint32 EMRH ; 00416 volatile Uint32 EMCR ; 00417 volatile Uint32 EMCRH ; 00418 volatile Uint32 QEMR ; 00419 volatile Uint32 QEMCR ; 00420 volatile Uint32 CCERR ; 00421 volatile Uint32 CCERRCLR ; 00422 volatile Uint32 EEVAL ; 00423 volatile Uint8 RSVD4 [28] ; 00424 volatile Uint8 RSVD5 [64] ; 00425 volatile Uint32 QRAE [8] ; 00426 volatile Uint8 RSVD6[96] ; 00427 volatile Uint8 RSVD7 [512] ; 00428 volatile Uint32 QSTAT [8] ; 00429 volatile Uint32 QWMTHRA ; 00430 volatile Uint32 QWMTHRB ; 00431 volatile Uint8 RSVD8 [24] ; 00432 volatile Uint32 CCSTAT ; 00433 volatile Uint8 RSVD9 [188] ; 00434 volatile Uint32 AETCTL ; 00435 volatile Uint32 AETSTAT ; 00436 volatile Uint32 AETCMD ; 00437 volatile Uint8 RSVD10 [244] ; 00438 volatile Uint32 MPFAR ; 00439 volatile Uint32 MPFSR ; 00440 volatile Uint32 MPFCR ; 00441 volatile Uint32 MPPAG ; 00442 volatile Uint32 MPPA [8] ; 00443 volatile Uint8 RSVD11 [2000] ; 00444 volatile Uint32 ER ; 00445 volatile Uint32 ERH ; 00446 volatile Uint32 ECR ; 00447 volatile Uint32 ECRH ; 00448 volatile Uint32 ESR ; 00449 volatile Uint32 ESRH ; 00450 volatile Uint32 CER ; 00451 volatile Uint32 CERH ; 00452 volatile Uint32 EER ; 00453 volatile Uint32 EERH ; 00454 volatile Uint32 EECR ; 00455 volatile Uint32 EECRH ; 00456 volatile Uint32 EESR ; 00457 volatile Uint32 EESRH ; 00458 volatile Uint32 SER ; 00459 volatile Uint32 SERH ; 00460 volatile Uint32 SECR ; 00461 volatile Uint32 SECRH ; 00462 volatile Uint8 RSVD12 [8] ; 00463 volatile Uint32 IER ; 00464 volatile Uint32 IERH ; 00465 volatile Uint32 IECR ; 00466 volatile Uint32 IECRH ; 00467 volatile Uint32 IESR ; 00468 volatile Uint32 IESRH ; 00469 volatile Uint32 IPR ; 00470 volatile Uint32 IPRH ; 00471 volatile Uint32 ICR ; 00472 volatile Uint32 ICRH ; 00473 volatile Uint32 IEVAL ; 00474 volatile Uint8 RSVD13 [4] ; 00475 volatile Uint32 QER ; 00476 volatile Uint32 QEER ; 00477 volatile Uint32 QEECR ; 00478 volatile Uint32 QEESR ; 00479 volatile Uint32 QSER ; 00480 volatile Uint32 QSECR ; 00481 volatile Uint8 RSVD14 [3944] ; 00482 volatile Uint8 RSVD15 [4096] ; 00483 volatile Uint8 RSVD16 [4096] ; 00484 DM648_paramEntry PARAMENTRY[512] ; 00485 } DM648_edmaRegs ; 00486 00493 typedef struct DM648_pciRegs_tag { 00494 volatile Uint32 PCIREVID ; 00495 volatile Uint8 RSVD0 [12] ; 00496 volatile Uint32 PCISTATSET ; 00497 volatile Uint32 PCISTATCLR ; 00498 volatile Uint8 RSVD1 [8] ; 00499 volatile Uint32 PCIHINTSET ; 00500 volatile Uint32 PCIHINTCLR ; 00501 volatile Uint8 RSVD2 [8] ; 00502 volatile Uint32 PCIBINTSET ; 00503 volatile Uint32 PCIBINTCLR ; 00504 volatile Uint32 PCIBCLKMGT ; 00505 volatile Uint8 RSVD3 [196] ; 00506 volatile Uint32 PCIVENDEVMIR ; 00507 volatile Uint32 PCICSRMIR ; 00508 volatile Uint32 PCICLREVMIR ; 00509 volatile Uint32 PCICLINEMIR ; 00510 volatile Uint32 PCIBAR0MSK ; 00511 volatile Uint32 PCIBAR1MSK ; 00512 volatile Uint32 PCIBAR2MSK ; 00513 volatile Uint32 PCIBAR3MSK ; 00514 volatile Uint32 PCIBAR4MSK ; 00515 volatile Uint32 PCIBAR5MSK ; 00516 volatile Uint8 RSVD4[4] ; 00517 volatile Uint32 PCISUBIDMIR ; 00518 volatile Uint8 RSVD5 [4] ; 00519 volatile Uint32 PCICPBPTRMIR ; 00520 volatile Uint8 RSVD6 [4] ; 00521 volatile Uint32 PCILGINTMIR ; 00522 volatile Uint8 RSVD7 [64] ; 00523 volatile Uint32 PCISLVCNTL ; 00524 volatile Uint8 RSVD8 [60] ; 00525 volatile Uint32 PCIBAR0TRL ; 00526 volatile Uint32 PCIBAR1TRL ; 00527 volatile Uint32 PCIBAR2TRL ; 00528 volatile Uint32 PCIBAR3TRL ; 00529 volatile Uint32 PCIBAR4TRL ; 00530 volatile Uint32 PCIBAR5TRL ; 00531 volatile Uint8 RSVD9 [8] ; 00532 volatile Uint32 PCIBARMIR [6] ; 00533 volatile Uint8 RSVD10 [264] ; 00534 volatile Uint32 PCIMCFGDAT ; 00535 volatile Uint32 PCIMCFGADR ; 00536 volatile Uint32 PCIMCFGCMD ; 00537 volatile Uint8 RSVD11 [4] ; 00538 volatile Uint32 PCIMSTCFG ; 00539 volatile Uint32 PCIADDSUB [32] ; 00540 volatile Uint32 PCIVENDEVPRG ; 00541 volatile Uint32 PCICMDSTATPRG ; 00542 volatile Uint32 PCICLREVPRG ; 00543 volatile Uint32 PCISUBIDPRG ; 00544 volatile Uint32 PCIMAXLGPRG ; 00545 volatile Uint32 PCILRSTREG ; 00546 volatile Uint32 PCICFGDONE ; 00547 volatile Uint32 PCIBAR0MPRG ; 00548 volatile Uint32 PCIBAR1MPRG ; 00549 volatile Uint32 PCIBAR2MPRG ; 00550 volatile Uint32 PCIBAR3MPRG ; 00551 volatile Uint32 PCIBAR4MPRG ; 00552 volatile Uint32 PCIBAR5MPRG ; 00553 volatile Uint32 PCIBAR0PRG ; 00554 volatile Uint32 PCIBAR1PRG ; 00555 volatile Uint32 PCIBAR2PRG ; 00556 volatile Uint32 PCIBAR3PRG ; 00557 volatile Uint32 PCIBAR4PRG ; 00558 volatile Uint32 PCIBAR5PRG ; 00559 volatile Uint32 PCIBAR0TRLPRG ; 00560 volatile Uint32 PCIBAR1TRLPRG ; 00561 volatile Uint32 PCIBAR2TRLPRG ; 00562 volatile Uint32 PCIBAR3TRLPRG ; 00563 volatile Uint32 PCIBAR4TRLPRG ; 00564 volatile Uint32 PCIBAR5TRLPRG ; 00565 volatile Uint32 PCIBASENPRG ; 00566 } DM648_pciRegs ; 00567 00568 00594 struct DM648_HalPciPhyObj_tag { 00595 Pvoid dev ; 00596 Uint32 irqId ; 00597 Uint32 busNo ; 00598 Uint32 slotNo ; 00599 Uint32 prevPageAddr ; 00600 Uint32 shMemDspAddr ; 00601 Uint32 shMemVirtAddr ; 00602 Uint32 shMemPhysAddr ; 00603 Uint32 barPhys [NUM_BARS] ; 00604 Uint32 barLen [NUM_BARS] ; 00605 Uint32 barVirt [NUM_BARS] ; 00606 Uint32 edmaChnlId ; 00607 } ; 00608 00609 00610 #if defined (__cplusplus) 00611 } 00612 #endif /* if defined (__cplusplus) */ 00613 00614 #endif /* !defined (DM648_HAL_PCI_H) */