Hardware Abstraction Layer for PC-DM64LC VLYNQ interface. Defines interfaces to initialize the VLYNQ interface.
============================================================================
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#include <dsplink.h>
#include <dm6437_hal.h>
Go to the source code of this file.
Data Structures | |
struct | DM6437_devRegs_tag |
struct | DM6437_pllRegs_tag |
struct | DM6437_ddrRegs |
struct | DM6437_pscRegs_tag |
struct | DM6437_pciRegs |
struct | DM6437_vlynqRegs |
struct | DM6437_paramEntry_tags |
struct | DRA44XGEM_EDMA3_CCRL_DraRegs |
struct | DRA44XGEM_EDMA3_CCRL_QueevtentryRegs |
struct | DRA44XGEM_EDMA3_CCRL_ShadowRegs |
struct | DRA44XGEM_edmaRegs |
struct | DM6437_HalVlynqPhyObj_tag |
Defines | |
#define | VLYNQ_DMA_MAXTHROUGHPUT 10u |
Approx. Maximum through put of VLYNQ interface (100Mhz * 4 /32) words (32bit)/Sec. ============================================================================. | |
#define | LPSC_GEM 39u |
Module number for GEM. ============================================================================. | |
#define | LPSC_EDMA_TPCC 2u |
Module number for EDMA TPCC. ============================================================================. | |
#define | LPSC_EDMA_TPTC0 3u |
Module number for EDMA TPTC0. ============================================================================. | |
#define | LPSC_EDMA_TPTC1 4u |
Module number for EDMA TPTC1. ============================================================================. | |
#define | LPSC_DDR 13u |
Module number for DDR. ============================================================================. | |
#define | DM6437_DEVREG_BASE 0x00440000u |
Base address of Device config registers. ============================================================================. | |
#define | DM6437_PLL0REG_BASE 0x00440800u |
Base address of PLL0 registers. ============================================================================. | |
#define | DM6437_PLL1REG_BASE 0x00440C00u |
Base address of PLL1 registers. ============================================================================. | |
#define | DM6437_EDMAREG_BASE 0x400000u |
Base address of EDMA registers. ============================================================================. | |
#define | DM6437_DDRREG_BASE 0x20000000u |
Base address of DDR PHY registers. ============================================================================. | |
#define | DM6437_PSCREG_BASE 0x00441000u |
Base address of PSC registers. ============================================================================. | |
#define | DM6437_PCIREG_BASE 0x0041A000u |
Base address of PCI backend registers. ============================================================================. | |
#define | DM6437_PEERVLYNQREG_BASE 0x00601000u |
Base address of VLYNQ registers. ============================================================================. | |
#define | DM6437_SOFTINT1_MASK 0x02000000u |
Mask for generating soft int1 (DSP->GPP) ============================================================================. | |
#define | DM6437_LRESET_MASK 0x00000100u |
Mask for reseting/releasing GEM. ============================================================================. | |
#define | DM6437_INTSTATUS_MASK 0x00080000u |
Bitmask for Interrupt status (DSP->GPP) ============================================================================. | |
#define | DM6437_BOOTCMPLTBC_MASK 0x00000001u |
Bitmask for Setting BC bit in BOOTCOMPLT register. ============================================================================. | |
#define | DM6437_VLYNQ_WINDOWSIZE 0x04000000u |
Total size exposed by VLYNQ 64MB. ============================================================================. | |
#define | DRA44XGEM_EDMA_REGBASE 0x01C00000u |
Base Address of DRA44xGEM EDMA controller registers. ============================================================================. | |
Typedefs | |
DM6437_devRegs | |
Register Overlay Structure for Device config registers. ============================================================================ ============================================================================ | |
typedef struct DM6437_devRegs_tag | DM6437_devRegs |
DM6437_pllRegs | |
Register Overlay Structure for PLL. ============================================================================ ============================================================================ | |
typedef struct DM6437_pllRegs_tag | DM6437_pllRegs |
DM6437_pscRegs | |
Register Overlay Structure for PSC. ============================================================================ ============================================================================ | |
typedef struct DM6437_pscRegs_tag | DM6437_pscRegs |
DM6437_pciRegs | |
PCI Back end register overlay structure. ============================================================================ ============================================================================ | |
typedef struct DM6437_pciRegs | DM6437_pciRegs |
DM6437_vlynqRegs | |
VLYNQ register structure. ============================================================================ ============================================================================ | |
typedef struct DM6437_vlynqRegs | DM6437_vlynqRegs |
DRA44XGEM_paramEntry | |
Register Overlay Structure for PARAMENTRY. ============================================================================ ============================================================================ | |
typedef struct DM6437_paramEntry_tags | DRA44XGEM_paramEntry |
#define VLYNQ_DMA_MAXTHROUGHPUT 10u |
Approx. Maximum through put of VLYNQ interface (100Mhz * 4 /32) words (32bit)/Sec. ============================================================================.
============================================================================
#define LPSC_GEM 39u |
Module number for GEM. ============================================================================.
============================================================================
#define LPSC_EDMA_TPCC 2u |
Module number for EDMA TPCC. ============================================================================.
============================================================================
#define LPSC_EDMA_TPTC0 3u |
Module number for EDMA TPTC0. ============================================================================.
============================================================================
#define LPSC_EDMA_TPTC1 4u |
Module number for EDMA TPTC1. ============================================================================.
============================================================================
#define LPSC_DDR 13u |
Module number for DDR. ============================================================================.
============================================================================
#define DM6437_DEVREG_BASE 0x00440000u |
Base address of Device config registers. ============================================================================.
============================================================================
#define DM6437_PLL0REG_BASE 0x00440800u |
Base address of PLL0 registers. ============================================================================.
============================================================================
#define DM6437_PLL1REG_BASE 0x00440C00u |
Base address of PLL1 registers. ============================================================================.
============================================================================
#define DM6437_EDMAREG_BASE 0x400000u |
Base address of EDMA registers. ============================================================================.
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#define DM6437_DDRREG_BASE 0x20000000u |
Base address of DDR PHY registers. ============================================================================.
============================================================================
#define DM6437_PSCREG_BASE 0x00441000u |
Base address of PSC registers. ============================================================================.
============================================================================
#define DM6437_PCIREG_BASE 0x0041A000u |
Base address of PCI backend registers. ============================================================================.
============================================================================
#define DM6437_PEERVLYNQREG_BASE 0x00601000u |
Base address of VLYNQ registers. ============================================================================.
============================================================================
#define DM6437_SOFTINT1_MASK 0x02000000u |
Mask for generating soft int1 (DSP->GPP) ============================================================================.
============================================================================
#define DM6437_LRESET_MASK 0x00000100u |
Mask for reseting/releasing GEM. ============================================================================.
============================================================================
#define DM6437_INTSTATUS_MASK 0x00080000u |
Bitmask for Interrupt status (DSP->GPP) ============================================================================.
============================================================================
#define DM6437_BOOTCMPLTBC_MASK 0x00000001u |
Bitmask for Setting BC bit in BOOTCOMPLT register. ============================================================================.
============================================================================
#define DM6437_VLYNQ_WINDOWSIZE 0x04000000u |
Total size exposed by VLYNQ 64MB. ============================================================================.
============================================================================
#define DRA44XGEM_EDMA_REGBASE 0x01C00000u |
Base Address of DRA44xGEM EDMA controller registers. ============================================================================.
============================================================================
typedef struct DM6437_devRegs_tag DM6437_devRegs |
typedef struct DM6437_pllRegs_tag DM6437_pllRegs |
typedef struct DM6437_pscRegs_tag DM6437_pscRegs |
typedef struct DM6437_pciRegs DM6437_pciRegs |
typedef struct DM6437_vlynqRegs DM6437_vlynqRegs |
typedef struct DM6437_paramEntry_tags DRA44XGEM_paramEntry |