J721S2 Device Group descriptions

Introduction

This chapter provides information of specific device groups(DEVGRP) that are permitted in the J721S2 SoC. These device groups are more specific grouping of devices and resources used optionally to have staged init sequence control of the SoC.

Enumeration of Device group IDs

SoC Devgrp ID Generic Devgrp ID Flag Value Description
MCU_WAKEUP DEVGRP_00 0x1U << 0U Set of MCU domain peripherals to initialize at boot and use during runtime. Utilize this device group of MCU/Wakeup domain peripherals to achieve a faster boot sequence
MAIN DEVGRP_01 0x1U << 1U Set of Main domain peripherals to initialize at boot and use during runtime. Utilize this device group of non-critical peripherals for advanced use cases.

Enumeration Devices accessible in devgrp “MCU_WAKEUP”

Device ID Device Name
0 J721S2_DEV_MCU_ADC12FC_16FFC0
1 J721S2_DEV_MCU_ADC12FC_16FFC1
22 J721S2_DEV_WKUP_SMS0
29 J721S2_DEV_MCU_CPSW0
35 J721S2_DEV_MCU_TIMER0
37 J721S2_DEV_MCU_CPT2_AGGR0
53 J721S2_DEV_MCU_DCC0
54 J721S2_DEV_MCU_DCC1
55 J721S2_DEV_MCU_DCC2
83 J721S2_DEV_MCU_TIMER1
84 J721S2_DEV_MCU_TIMER2
85 J721S2_DEV_MCU_TIMER3
86 J721S2_DEV_MCU_TIMER4
87 J721S2_DEV_MCU_TIMER5
88 J721S2_DEV_MCU_TIMER6
89 J721S2_DEV_MCU_TIMER7
90 J721S2_DEV_MCU_TIMER8
91 J721S2_DEV_MCU_TIMER9
104 J721S2_DEV_WKUP_ESM0
105 J721S2_DEV_MCU_ESM0
106 J721S2_DEV_MCU_FSS0
107 J721S2_DEV_MCU_FSS0_FSAS_0
108 J721S2_DEV_MCU_FSS0_HYPERBUS1P0_0
109 J721S2_DEV_MCU_FSS0_OSPI_0
110 J721S2_DEV_MCU_FSS0_OSPI_1
115 J721S2_DEV_WKUP_GPIO0
116 J721S2_DEV_WKUP_GPIO1
118 J721S2_DEV_MCU_I3C0
119 J721S2_DEV_MCU_I3C1
123 J721S2_DEV_WKUP_PORZ_SYNC0
125 J721S2_DEV_WKUP_GPIOMUX_INTRTR0
126 J721S2_DEV_WKUP_PSC0
147 J721S2_DEV_WKUP_J7AM_WAKEUP_16FF0
149 J721S2_DEV_MCU_UART0
151 J721S2_DEV_WKUP_DDPA0
176 J721S2_DEV_MCU_PBIST0
177 J721S2_DEV_MCU_PBIST1
178 J721S2_DEV_MCU_PBIST2
180 J721S2_DEV_WKUP_VTM0
181 J721S2_DEV_MAIN2WKUPMCU_VD
207 J721S2_DEV_MCU_MCAN0
208 J721S2_DEV_MCU_MCAN1
221 J721S2_DEV_MCU_I2C0
222 J721S2_DEV_MCU_I2C1
223 J721S2_DEV_WKUP_I2C0
267 J721S2_DEV_MCU_NAVSS0
268 J721S2_DEV_MCU_NAVSS0_INTR_ROUTER_0
269 J721S2_DEV_MCU_NAVSS0_MCRC_0
270 J721S2_DEV_MCU_NAVSS0_MODSS
271 J721S2_DEV_MCU_NAVSS0_PROXY0
272 J721S2_DEV_MCU_NAVSS0_RINGACC0
273 J721S2_DEV_MCU_NAVSS0_UDMAP_0
274 J721S2_DEV_MCU_NAVSS0_UDMASS
275 J721S2_DEV_MCU_NAVSS0_UDMASS_INTA_0
283 J721S2_DEV_MCU_R5FSS0
284 J721S2_DEV_MCU_R5FSS0_CORE0
285 J721S2_DEV_MCU_R5FSS0_CORE1
295 J721S2_DEV_MCU_RTI0
296 J721S2_DEV_MCU_RTI1
304 J721S2_DEV_WKUP_HSM0
347 J721S2_DEV_MCU_MCSPI0
348 J721S2_DEV_MCU_MCSPI1
349 J721S2_DEV_MCU_MCSPI2
359 J721S2_DEV_WKUP_UART0
366 J721S2_DEV_WKUPMCU2MAIN_VD

Enumeration Devices accessible in devgrp “MAIN”

Device ID Device Name
2 J721S2_DEV_ATL0
3 J721S2_DEV_C71X_0_PBIST_VD
4 J721S2_DEV_A72SS0
5 J721S2_DEV_C71X_1_PBIST_VD
6 J721S2_DEV_COMPUTE_CLUSTER0
7 J721S2_DEV_A72SS0_CORE0_PBIST_WRAP
8 J721S2_DEV_COMPUTE_CLUSTER0_C71SS0_0
9 J721S2_DEV_COMPUTE_CLUSTER0_C71SS0_MMA_0
10 J721S2_DEV_COMPUTE_CLUSTER0_C71SS0_PBIST_WRAP_0
11 J721S2_DEV_COMPUTE_CLUSTER0_C71SS1_0
12 J721S2_DEV_COMPUTE_CLUSTER0_C71SS1_PBIST_WRAP_0
13 J721S2_DEV_COMPUTE_CLUSTER0_CFG_WRAP_0
14 J721S2_DEV_COMPUTE_CLUSTER0_CLEC
15 J721S2_DEV_COMPUTE_CLUSTER0_CORE_CORE
16 J721S2_DEV_COMPUTE_CLUSTER0_DDR32SS_EMIF0_EW_0
17 J721S2_DEV_COMPUTE_CLUSTER0_DDR32SS_EMIF1_EW_0
18 J721S2_DEV_COMPUTE_CLUSTER0_DEBUG_WRAP_0
19 J721S2_DEV_COMPUTE_CLUSTER0_DIVH2_DIVH0_0
20 J721S2_DEV_COMPUTE_CLUSTER0_DIVH2_DIVH0_1
21 J721S2_DEV_COMPUTE_CLUSTER0_DIVP_TFT0_0
23 J721S2_DEV_COMPUTE_CLUSTER0_DIVP_TFT0_1
24 J721S2_DEV_COMPUTE_CLUSTER0_DMSC_WRAP_0
25 J721S2_DEV_COMPUTE_CLUSTER0_EN_MSMC_DOMAIN_0
26 J721S2_DEV_COMPUTE_CLUSTER0_GIC500SS
27 J721S2_DEV_COMPUTE_CLUSTER0_PBIST_WRAP_0
28 J721S2_DEV_CPSW1
30 J721S2_DEV_CPT2_AGGR1
31 J721S2_DEV_CPT2_AGGR5
32 J721S2_DEV_CPT2_AGGR2
33 J721S2_DEV_CPT2_AGGR4
34 J721S2_DEV_CPT2_AGGR3
36 J721S2_DEV_CPT2_AGGR0
38 J721S2_DEV_CSI_RX_IF0
39 J721S2_DEV_CSI_RX_IF1
40 J721S2_DEV_CSI_TX_IF_V2_0
41 J721S2_DEV_CSI_TX_IF_V2_1
42 J721S2_DEV_STM0
43 J721S2_DEV_DCC0
44 J721S2_DEV_DCC1
45 J721S2_DEV_DCC2
46 J721S2_DEV_DCC3
47 J721S2_DEV_DCC4
48 J721S2_DEV_DCC5
49 J721S2_DEV_DCC6
50 J721S2_DEV_DCC7
51 J721S2_DEV_DCC8
52 J721S2_DEV_DCC9
57 J721S2_DEV_DEBUGSS_WRAP0
58 J721S2_DEV_DMPAC0
59 J721S2_DEV_DMPAC0_CTSET_0
60 J721S2_DEV_DMPAC0_INTD_0
61 J721S2_DEV_GTC0
62 J721S2_DEV_DMPAC0_SDE_0
63 J721S2_DEV_TIMER0
64 J721S2_DEV_TIMER1
65 J721S2_DEV_TIMER2
66 J721S2_DEV_TIMER3
67 J721S2_DEV_TIMER4
68 J721S2_DEV_TIMER5
69 J721S2_DEV_TIMER6
70 J721S2_DEV_TIMER7
71 J721S2_DEV_TIMER8
72 J721S2_DEV_TIMER9
73 J721S2_DEV_TIMER10
74 J721S2_DEV_TIMER11
75 J721S2_DEV_TIMER12
76 J721S2_DEV_TIMER13
77 J721S2_DEV_TIMER14
78 J721S2_DEV_TIMER15
79 J721S2_DEV_TIMER16
80 J721S2_DEV_TIMER17
81 J721S2_DEV_TIMER18
82 J721S2_DEV_TIMER19
92 J721S2_DEV_ECAP0
93 J721S2_DEV_ECAP1
94 J721S2_DEV_ECAP2
95 J721S2_DEV_ELM0
96 J721S2_DEV_EMIF_DATA_0_VD
97 J721S2_DEV_EMIF_DATA_1_VD
98 J721S2_DEV_MMCSD0
99 J721S2_DEV_MMCSD1
100 J721S2_DEV_EQEP0
101 J721S2_DEV_EQEP1
102 J721S2_DEV_EQEP2
103 J721S2_DEV_ESM0
111 J721S2_DEV_GPIO0
112 J721S2_DEV_GPIO2
113 J721S2_DEV_GPIO4
114 J721S2_DEV_GPIO6
117 J721S2_DEV_GPMC0
120 J721S2_DEV_LED0
121 J721S2_DEV_MAIN2MCU_LVL_INTRTR0
122 J721S2_DEV_MAIN2MCU_PLS_INTRTR0
124 J721S2_DEV_TIMESYNC_INTRTR0
127 J721S2_DEV_J7AEP_GPU_BXS464_WRAP0
128 J721S2_DEV_J7AEP_GPU_BXS464_WRAP0_DFT_EMBED_PBIST_0
130 J721S2_DEV_J7AEP_GPU_BXS464_WRAP0_GPU_SS_0
131 J721S2_DEV_J7AM_32_64_ATB_FUNNEL0
132 J721S2_DEV_J7AM_32_64_ATB_FUNNEL1
133 J721S2_DEV_J7AM_32_64_ATB_FUNNEL2
134 J721S2_DEV_AGGR_ATB0
135 J721S2_DEV_J7AM_BOLT_PGD0
136 J721S2_DEV_CSI_PSILSS0
137 J721S2_DEV_DEBUGSUSPENDRTR0
138 J721S2_DEV_DDR0
139 J721S2_DEV_DDR1
140 J721S2_DEV_DMPAC_VPAC_PSILSS0
141 J721S2_DEV_J7AM_HWA_ATB_FUNNEL0
142 J721S2_DEV_J7AM_MAIN_16FF0
143 J721S2_DEV_PSC0
144 J721S2_DEV_J7AM_PULSAR_ATB_FUNNEL0
145 J721S2_DEV_SA2_CPSW_PSILSS0
146 J721S2_DEV_UART0
148 J721S2_DEV_GPIOMUX_INTRTR0
150 J721S2_DEV_CMPEVENT_INTRTR0
152 J721S2_DEV_DPHY_RX0
153 J721S2_DEV_DPHY_RX1
154 J721S2_DEV_DSS_DSI0
155 J721S2_DEV_DSS_DSI1
156 J721S2_DEV_DSS_EDP0
157 J721S2_DEV_BOARD0
158 J721S2_DEV_DSS0
160 J721S2_DEV_EPWM0
161 J721S2_DEV_EPWM1
162 J721S2_DEV_EPWM2
163 J721S2_DEV_EPWM3
164 J721S2_DEV_EPWM4
165 J721S2_DEV_EPWM5
166 J721S2_DEV_PBIST7
167 J721S2_DEV_PBIST5
168 J721S2_DEV_PBIST11
169 J721S2_DEV_PBIST8
170 J721S2_DEV_PBIST3
171 J721S2_DEV_PBIST0
172 J721S2_DEV_PBIST1
173 J721S2_DEV_PBIST4
174 J721S2_DEV_PBIST2
175 J721S2_DEV_PBIST10
179 J721S2_DEV_CODEC0
182 J721S2_DEV_MCAN0
183 J721S2_DEV_MCAN1
184 J721S2_DEV_MCAN2
185 J721S2_DEV_MCAN3
186 J721S2_DEV_MCAN4
187 J721S2_DEV_MCAN5
188 J721S2_DEV_MCAN6
189 J721S2_DEV_MCAN7
190 J721S2_DEV_MCAN8
191 J721S2_DEV_MCAN9
192 J721S2_DEV_MCAN10
193 J721S2_DEV_MCAN11
194 J721S2_DEV_MCAN12
195 J721S2_DEV_MCAN13
197 J721S2_DEV_MCAN14
199 J721S2_DEV_MCAN15
201 J721S2_DEV_MCAN16
202 J721S2_DEV_A72SS0_CORE0
203 J721S2_DEV_A72SS0_CORE1
206 J721S2_DEV_MCAN17
209 J721S2_DEV_MCASP0
210 J721S2_DEV_MCASP1
211 J721S2_DEV_MCASP2
212 J721S2_DEV_MCASP3
213 J721S2_DEV_MCASP4
214 J721S2_DEV_I2C0
215 J721S2_DEV_I2C1
216 J721S2_DEV_I2C2
217 J721S2_DEV_I2C3
218 J721S2_DEV_I2C4
219 J721S2_DEV_I2C5
220 J721S2_DEV_I2C6
224 J721S2_DEV_NAVSS0
225 J721S2_DEV_NAVSS0_BCDMA_0
226 J721S2_DEV_NAVSS0_CPTS_0
227 J721S2_DEV_NAVSS0_INTR_0
228 J721S2_DEV_NAVSS0_MAILBOX1_0
229 J721S2_DEV_NAVSS0_MAILBOX1_1
230 J721S2_DEV_NAVSS0_MAILBOX1_2
231 J721S2_DEV_NAVSS0_MAILBOX1_3
232 J721S2_DEV_NAVSS0_MAILBOX1_4
233 J721S2_DEV_NAVSS0_MAILBOX1_5
234 J721S2_DEV_NAVSS0_MAILBOX1_6
235 J721S2_DEV_NAVSS0_MAILBOX1_7
236 J721S2_DEV_NAVSS0_MAILBOX1_8
237 J721S2_DEV_NAVSS0_MAILBOX1_9
238 J721S2_DEV_NAVSS0_MAILBOX1_10
239 J721S2_DEV_NAVSS0_MAILBOX1_11
240 J721S2_DEV_NAVSS0_MAILBOX_0
241 J721S2_DEV_NAVSS0_MAILBOX_1
242 J721S2_DEV_NAVSS0_MAILBOX_2
243 J721S2_DEV_NAVSS0_MAILBOX_3
244 J721S2_DEV_NAVSS0_MAILBOX_4
245 J721S2_DEV_NAVSS0_MAILBOX_5
246 J721S2_DEV_NAVSS0_MAILBOX_6
247 J721S2_DEV_NAVSS0_MAILBOX_7
248 J721S2_DEV_NAVSS0_MAILBOX_8
249 J721S2_DEV_NAVSS0_MAILBOX_9
250 J721S2_DEV_NAVSS0_MAILBOX_10
251 J721S2_DEV_NAVSS0_MAILBOX_11
252 J721S2_DEV_NAVSS0_MCRC_0
253 J721S2_DEV_NAVSS0_MODSS
254 J721S2_DEV_NAVSS0_MODSS_INTA_0
255 J721S2_DEV_NAVSS0_MODSS_INTA_1
256 J721S2_DEV_NAVSS0_PROXY_0
257 J721S2_DEV_NAVSS0_PVU_0
258 J721S2_DEV_NAVSS0_PVU_1
259 J721S2_DEV_NAVSS0_RINGACC_0
260 J721S2_DEV_NAVSS0_SPINLOCK_0
261 J721S2_DEV_NAVSS0_TIMERMGR_0
262 J721S2_DEV_NAVSS0_TIMERMGR_1
263 J721S2_DEV_NAVSS0_UDMAP_0
264 J721S2_DEV_NAVSS0_UDMASS
265 J721S2_DEV_NAVSS0_UDMASS_INTA_0
266 J721S2_DEV_NAVSS0_VIRTSS
276 J721S2_DEV_PCIE1
277 J721S2_DEV_R5FSS0
278 J721S2_DEV_R5FSS1
279 J721S2_DEV_R5FSS0_CORE0
280 J721S2_DEV_R5FSS0_CORE1
281 J721S2_DEV_R5FSS1_CORE0
282 J721S2_DEV_R5FSS1_CORE1
286 J721S2_DEV_RTI0
287 J721S2_DEV_RTI1
288 J721S2_DEV_RTI16
289 J721S2_DEV_RTI17
290 J721S2_DEV_RTI15
291 J721S2_DEV_RTI28
292 J721S2_DEV_RTI29
293 J721S2_DEV_RTI30
294 J721S2_DEV_RTI31
297 J721S2_DEV_SA2_UL0
339 J721S2_DEV_MCSPI0
340 J721S2_DEV_MCSPI1
341 J721S2_DEV_MCSPI2
342 J721S2_DEV_MCSPI3
343 J721S2_DEV_MCSPI4
344 J721S2_DEV_MCSPI5
345 J721S2_DEV_MCSPI6
346 J721S2_DEV_MCSPI7
350 J721S2_DEV_UART1
351 J721S2_DEV_UART2
352 J721S2_DEV_UART3
353 J721S2_DEV_UART4
354 J721S2_DEV_UART5
355 J721S2_DEV_UART6
356 J721S2_DEV_UART7
357 J721S2_DEV_UART8
358 J721S2_DEV_UART9
360 J721S2_DEV_USB0
361 J721S2_DEV_VPAC0
362 J721S2_DEV_VUSR_DUAL0
363 J721S2_DEV_DPHY_TX0
364 J721S2_DEV_DPHY_TX1
365 J721S2_DEV_SERDES_10G0
367 J721S2_DEV_FFI_MAIN_AC_CBASS_VD
368 J721S2_DEV_FFI_MAIN_AC_QM_CBASS_VD
369 J721S2_DEV_FFI_MAIN_HC_CBASS_VD
370 J721S2_DEV_FFI_MAIN_INFRA_CBASS_VD
371 J721S2_DEV_FFI_MAIN_IP_CBASS_VD
372 J721S2_DEV_FFI_MAIN_RC_CBASS_VD
373 J721S2_DEV_J7AEP_GPU_BXS464_WRAP0_GPUCORE_0
374 J721S2_DEV_DMPAC0_UTC_0
375 J721S2_DEV_ACSPCIE_BUFFER0
376 J721S2_DEV_MCU_TIMER1_CLKSEL_VD
377 J721S2_DEV_MCU_TIMER3_CLKSEL_VD
378 J721S2_DEV_MCU_TIMER5_CLKSEL_VD
379 J721S2_DEV_MCU_TIMER7_CLKSEL_VD
380 J721S2_DEV_MCU_TIMER9_CLKSEL_VD
381 J721S2_DEV_TIMER1_CLKSEL_VD
382 J721S2_DEV_TIMER3_CLKSEL_VD
383 J721S2_DEV_TIMER5_CLKSEL_VD
384 J721S2_DEV_TIMER7_CLKSEL_VD
385 J721S2_DEV_TIMER9_CLKSEL_VD
386 J721S2_DEV_TIMER11_CLKSEL_VD
387 J721S2_DEV_TIMER13_CLKSEL_VD
388 J721S2_DEV_TIMER15_CLKSEL_VD
389 J721S2_DEV_TIMER17_CLKSEL_VD
390 J721S2_DEV_TIMER19_CLKSEL_VD
391 J721S2_DEV_MAIN_PLL8_SEL_EXTWAVE_VD