AM64X Secure Proxy Descriptions¶
Introduction¶
This chapter provides information of Secure Proxies and communication paths that are permitted in the AM64X SoC. These host IDs represent processing entities (or PEs) which is mandatory identification of a Host in a processor. See PE/Host documentation for further information
Enumeration of Secure Proxies¶
| Sproxy ID | Sproxy Name |
|---|---|
| 0 | DMASS0_SEC_PROXY_0 |
Thread Allocation per Secure Proxy¶
Secure Proxy thread allocation for DMASS0_SEC_PROXY_0¶
| Secure Proxy Thread ID | Direction (write or read) | Number of Messages | Host | Host Function | IRQ (threshold) | IRQ (error) |
|---|---|---|---|---|---|---|
| 0 | read | 11 | MAIN_0_R5_0 | response | R5FSS0_CORE0/INTR_64 | R5FSS0_CORE0/INTR_64 |
| 1 | write | 10 | MAIN_0_R5_0 | low_priority | N/A | N/A |
| 2 | read | 11 | MAIN_0_R5_1 | response | R5FSS0_CORE0/INTR_65 | R5FSS0_CORE0/INTR_65 |
| 3 | write | 10 | MAIN_0_R5_1 | low_priority | N/A | N/A |
| 4 | read | 2 | MAIN_0_R5_2 | response | R5FSS0_CORE1/INTR_66 | R5FSS0_CORE1/INTR_66 |
| 5 | write | 1 | MAIN_0_R5_2 | low_priority | N/A | N/A |
| 6 | read | 2 | MAIN_0_R5_3 | response | R5FSS0_CORE1/INTR_67 | R5FSS0_CORE1/INTR_67 |
| 7 | write | 1 | MAIN_0_R5_3 | low_priority | N/A | N/A |
| 8 | read | 11 | A53_0 | response | GICSS0/SPI_64 | GICSS0/SPI_64 |
| 9 | write | 10 | A53_0 | low_priority | N/A | N/A |
| 10 | read | 6 | A53_1 | response | GICSS0/SPI_65 | GICSS0/SPI_65 |
| 11 | write | 5 | A53_1 | low_priority | N/A | N/A |
| 12 | read | 6 | A53_2 | response | GICSS0/SPI_66 | GICSS0/SPI_66 |
| 13 | write | 5 | A53_2 | low_priority | N/A | N/A |
| 14 | read | 6 | A53_3 | response | GICSS0/SPI_67 | GICSS0/SPI_67 |
| 15 | write | 5 | A53_3 | low_priority | N/A | N/A |
| 16 | read | 6 | M4_0 | response | N/A | N/A |
| 17 | write | 5 | M4_0 | low_priority | N/A | N/A |
| 18 | read | 6 | MAIN_1_R5_0 | response | R5FSS1_CORE0/INTR_64 | R5FSS1_CORE0/INTR_64 |
| 19 | write | 5 | MAIN_1_R5_0 | low_priority | N/A | N/A |
| 20 | read | 6 | MAIN_1_R5_1 | response | R5FSS1_CORE0/INTR_65 | R5FSS1_CORE0/INTR_65 |
| 21 | write | 5 | MAIN_1_R5_1 | low_priority | N/A | N/A |
| 22 | read | 2 | MAIN_1_R5_2 | response | R5FSS1_CORE1/INTR_66 | R5FSS1_CORE1/INTR_66 |
| 23 | write | 1 | MAIN_1_R5_2 | low_priority | N/A | N/A |
| 24 | read | 2 | MAIN_1_R5_3 | response | R5FSS1_CORE1/INTR_67 | R5FSS1_CORE1/INTR_67 |
| 25 | write | 1 | MAIN_1_R5_3 | low_priority | N/A | N/A |
| 26 | read | 2 | ICSSG_0 | response | N/A | N/A |
| 27 | write | 1 | ICSSG_0 | low_priority | N/A | N/A |