AM62PX Devices Descriptions¶
Introduction¶
This chapter provides information on Device IDs that are permitted in the am62px SoC. The device IDs represent SoC subsystems that can be modified via DMSC TISCI message APIs. Some Secure, Power, and Resource Management DMSC subsystem TISCI message APIs define a device ID as a parameter allowing a user to specify management of a particular SoC subsystem.
Enumeration of Device IDs¶
| Device ID | Device Name |
|---|---|
| 2 | AM62PX_DEV_DBGSUSPENDROUTER0 |
| 3 | AM62PX_DEV_MAIN_GPIOMUX_INTROUTER0 |
| 5 | AM62PX_DEV_WKUP_MCU_GPIOMUX_INTROUTER0 |
| 6 | AM62PX_DEV_TIMESYNC_EVENT_INTROUTER0 |
| 7 | AM62PX_DEV_MCU_R5FSS0 |
| 9 | AM62PX_DEV_MCU_R5FSS0_CORE0 |
| 13 | AM62PX_DEV_CPSW0 |
| 15 | AM62PX_DEV_STM0 |
| 16 | AM62PX_DEV_DCC0 |
| 17 | AM62PX_DEV_DCC1 |
| 18 | AM62PX_DEV_DCC2 |
| 19 | AM62PX_DEV_DCC3 |
| 20 | AM62PX_DEV_DCC4 |
| 21 | AM62PX_DEV_DCC5 |
| 22 | AM62PX_DEV_SMS0 |
| 23 | AM62PX_DEV_MCU_DCC0 |
| 24 | AM62PX_DEV_DEBUGSS_WRAP0 |
| 25 | AM62PX_DEV_DMASS0 |
| 26 | AM62PX_DEV_DMASS0_BCDMA_0 |
| 27 | AM62PX_DEV_DMASS0_CBASS_0 |
| 28 | AM62PX_DEV_DMASS0_INTAGGR_0 |
| 29 | AM62PX_DEV_DMASS0_IPCSS_0 |
| 30 | AM62PX_DEV_DMASS0_PKTDMA_0 |
| 33 | AM62PX_DEV_DMASS0_RINGACC_0 |
| 35 | AM62PX_DEV_MCU_TIMER0 |
| 36 | AM62PX_DEV_TIMER0 |
| 37 | AM62PX_DEV_TIMER1 |
| 38 | AM62PX_DEV_TIMER2 |
| 39 | AM62PX_DEV_TIMER3 |
| 40 | AM62PX_DEV_TIMER4 |
| 41 | AM62PX_DEV_TIMER5 |
| 42 | AM62PX_DEV_TIMER6 |
| 43 | AM62PX_DEV_TIMER7 |
| 48 | AM62PX_DEV_MCU_TIMER1 |
| 49 | AM62PX_DEV_MCU_TIMER2 |
| 50 | AM62PX_DEV_MCU_TIMER3 |
| 51 | AM62PX_DEV_ECAP0 |
| 52 | AM62PX_DEV_ECAP1 |
| 53 | AM62PX_DEV_ECAP2 |
| 54 | AM62PX_DEV_ELM0 |
| 55 | AM62PX_DEV_MAIN_EMIF_DATA_ISO_VD |
| 57 | AM62PX_DEV_MMCSD0 |
| 58 | AM62PX_DEV_MMCSD1 |
| 59 | AM62PX_DEV_EQEP0 |
| 60 | AM62PX_DEV_EQEP1 |
| 61 | AM62PX_DEV_WKUP_GTC0 |
| 62 | AM62PX_DEV_EQEP2 |
| 63 | AM62PX_DEV_ESM0 |
| 64 | AM62PX_DEV_WKUP_ESM0 |
| 73 | AM62PX_DEV_FSS0 |
| 74 | AM62PX_DEV_FSS0_FSAS_0 |
| 75 | AM62PX_DEV_FSS0_OSPI_0 |
| 76 | AM62PX_DEV_GICSS0 |
| 77 | AM62PX_DEV_GPIO0 |
| 78 | AM62PX_DEV_GPIO1 |
| 79 | AM62PX_DEV_MCU_GPIO0 |
| 80 | AM62PX_DEV_GPMC0 |
| 83 | AM62PX_DEV_LED0 |
| 85 | AM62PX_DEV_DDPA0 |
| 86 | AM62PX_DEV_EPWM0 |
| 87 | AM62PX_DEV_EPWM1 |
| 88 | AM62PX_DEV_EPWM2 |
| 95 | AM62PX_DEV_WKUP_VTM0 |
| 96 | AM62PX_DEV_MAILBOX0 |
| 97 | AM62PX_DEV_MAIN2MCU_VD |
| 98 | AM62PX_DEV_MCAN0 |
| 99 | AM62PX_DEV_MCAN1 |
| 100 | AM62PX_DEV_MCU_MCRC64_0 |
| 102 | AM62PX_DEV_I2C0 |
| 103 | AM62PX_DEV_I2C1 |
| 104 | AM62PX_DEV_I2C2 |
| 105 | AM62PX_DEV_I2C3 |
| 106 | AM62PX_DEV_MCU_I2C0 |
| 107 | AM62PX_DEV_WKUP_I2C0 |
| 110 | AM62PX_DEV_WKUP_TIMER0 |
| 111 | AM62PX_DEV_WKUP_TIMER1 |
| 114 | AM62PX_DEV_WKUP_UART0 |
| 116 | AM62PX_DEV_MCRC64_0 |
| 117 | AM62PX_DEV_WKUP_RTCSS0 |
| 118 | AM62PX_DEV_WKUP_R5FSS0_SS0 |
| 119 | AM62PX_DEV_WKUP_R5FSS0 |
| 121 | AM62PX_DEV_WKUP_R5FSS0_CORE0 |
| 125 | AM62PX_DEV_RTI0 |
| 126 | AM62PX_DEV_RTI1 |
| 127 | AM62PX_DEV_RTI2 |
| 128 | AM62PX_DEV_RTI3 |
| 130 | AM62PX_DEV_RTI15 |
| 131 | AM62PX_DEV_MCU_RTI0 |
| 132 | AM62PX_DEV_WKUP_RTI0 |
| 134 | AM62PX_DEV_COMPUTE_CLUSTER0 |
| 135 | AM62PX_DEV_A53SS0_CORE_0 |
| 136 | AM62PX_DEV_A53SS0_CORE_1 |
| 137 | AM62PX_DEV_A53SS0_CORE_2 |
| 138 | AM62PX_DEV_A53SS0_CORE_3 |
| 139 | AM62PX_DEV_PSCSS0 |
| 140 | AM62PX_DEV_WKUP_PSC0 |
| 141 | AM62PX_DEV_MCSPI0 |
| 142 | AM62PX_DEV_MCSPI1 |
| 143 | AM62PX_DEV_MCSPI2 |
| 146 | AM62PX_DEV_UART0 |
| 147 | AM62PX_DEV_MCU_MCSPI0 |
| 148 | AM62PX_DEV_MCU_MCSPI1 |
| 149 | AM62PX_DEV_MCU_UART0 |
| 150 | AM62PX_DEV_SPINLOCK0 |
| 152 | AM62PX_DEV_UART1 |
| 153 | AM62PX_DEV_UART2 |
| 154 | AM62PX_DEV_UART3 |
| 155 | AM62PX_DEV_UART4 |
| 156 | AM62PX_DEV_UART5 |
| 157 | AM62PX_DEV_BOARD0 |
| 158 | AM62PX_DEV_UART6 |
| 161 | AM62PX_DEV_USB0 |
| 162 | AM62PX_DEV_USB1 |
| 163 | AM62PX_DEV_PBIST0 |
| 165 | AM62PX_DEV_WKUP_PBIST0 |
| 166 | AM62PX_DEV_A53SS0 |
| 167 | AM62PX_DEV_COMPUTE_CLUSTER0_PBIST_0 |
| 168 | AM62PX_DEV_PSC0_FW_0 |
| 169 | AM62PX_DEV_PSC0 |
| 170 | AM62PX_DEV_DDR32SS0 |
| 171 | AM62PX_DEV_DEBUGSS0 |
| 172 | AM62PX_DEV_A53_RS_BW_LIMITER0 |
| 173 | AM62PX_DEV_A53_WS_BW_LIMITER1 |
| 174 | AM62PX_DEV_GPU_RS_BW_LIMITER9 |
| 175 | AM62PX_DEV_GPU_WS_BW_LIMITER10 |
| 176 | AM62PX_DEV_WKUP_DEEPSLEEP_SOURCES0 |
| 177 | AM62PX_DEV_MAIN_EMIF_CFG_ISO_VD |
| 178 | AM62PX_DEV_MAIN_USB0_ISO_VD |
| 179 | AM62PX_DEV_MAIN_USB2_ISO_VD |
| 180 | AM62PX_DEV_MCU_MCU_16FF0 |
| 182 | AM62PX_DEV_CSI_RX_IF0 |
| 183 | AM62PX_DEV_DCC6 |
| 184 | AM62PX_DEV_MMCSD2 |
| 185 | AM62PX_DEV_DPHY_RX0 |
| 186 | AM62PX_DEV_DSS0 |
| 188 | AM62PX_DEV_MCU_MCAN0 |
| 189 | AM62PX_DEV_MCU_MCAN1 |
| 190 | AM62PX_DEV_MCASP0 |
| 191 | AM62PX_DEV_MCASP1 |
| 192 | AM62PX_DEV_MCASP2 |
| 193 | AM62PX_DEV_CLK_32K_RC_SEL_DEV_VD |
| 194 | AM62PX_DEV_CPT2_AGGR1 |
| 195 | AM62PX_DEV_CPT2_AGGR0 |
| 196 | AM62PX_DEV_MCU_CPT2_AGGR0 |
| 197 | AM62PX_DEV_MCU_DCC1 |
| 198 | AM62PX_DEV_DMASS1 |
| 199 | AM62PX_DEV_DMASS1_BCDMA_0 |
| 200 | AM62PX_DEV_DMASS1_INTAGGR_0 |
| 202 | AM62PX_DEV_WKUP_PBIST1 |
| 203 | AM62PX_DEV_MCU_PBIST0 |
| 204 | AM62PX_DEV_CODEC0 |
| 220 | AM62PX_DEV_PBIST3 |
| 221 | AM62PX_DEV_CODEC_RS_BW_LIMITER2 |
| 222 | AM62PX_DEV_CODEC_WS_BW_LIMITER3 |
| 225 | AM62PX_DEV_HSM0 |
| 226 | AM62PX_DEV_WKUP_CLKOUT_SEL_DEV_VD |
| 227 | AM62PX_DEV_MCU_OBSCLK_MUX_SEL_DEV_VD |
| 228 | AM62PX_DEV_OBSCLK0_MUX_SEL_DEV_VD |
| 229 | AM62PX_DEV_DCC7 |
| 230 | AM62PX_DEV_DCC8 |
| 231 | AM62PX_DEV_DSS_DSI0 |
| 232 | AM62PX_DEV_DSS1 |
| 233 | AM62PX_DEV_PBIST1 |
| 234 | AM62PX_DEV_OLDI_TX_CORE0 |
| 235 | AM62PX_DEV_OLDI_TX_CORE1 |
| 237 | AM62PX_DEV_GPU0 |
| 238 | AM62PX_DEV_DPHY_TX0 |
| 240 | AM62PX_DEV_DSS1_DPI1_PLLSEL_DEV_VD |
| 241 | AM62PX_DEV_DSS1_DPI0_PLLSEL_DEV_VD |
| 242 | AM62PX_DEV_GPU0_CORE_VD |
| 243 | AM62PX_DEV_OLDI0_VD |
| 244 | AM62PX_DEV_OLDI1_VD |
| 245 | AM62PX_DEV_DPI0_OUT_SEL_DEV_VD |