spi.h

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/* --COPYRIGHT--,BSD
 * Copyright (c) 2017, Texas Instruments Incorporated
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * *  Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 *
 * *  Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 *
 * *  Neither the name of Texas Instruments Incorporated nor the names of
 *    its contributors may be used to endorse or promote products derived
 *    from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
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 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
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 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 * --/COPYRIGHT--*/
#ifndef SPI_H_
#define SPI_H_

//*****************************************************************************
//
//
//*****************************************************************************

//*****************************************************************************
//
// If building with a C++ compiler, make all of the definitions in this header
// have a C binding.
//
//*****************************************************************************
#ifdef __cplusplus
extern "C"
{
#endif

#include <stdbool.h>
#include <stdint.h>
#include <ti/devices/msp432p4xx/inc/msp.h>
#include <ti/devices/msp432p4xx/driverlib/eusci.h>

/* Configuration Defines */
#define EUSCI_SPI_CLOCKSOURCE_ACLK    EUSCI_B_CTLW0_SSEL__ACLK
#define EUSCI_SPI_CLOCKSOURCE_SMCLK   EUSCI_B_CTLW0_SSEL__SMCLK

#define EUSCI_SPI_MSB_FIRST    EUSCI_B_CTLW0_MSB
#define EUSCI_SPI_LSB_FIRST    0x00

#define EUSCI_SPI_BUSY        EUSCI_A_STATW_BUSY
#define EUSCI_SPI_NOT_BUSY    0x00

#define EUSCI_SPI_PHASE_DATA_CHANGED_ONFIRST_CAPTURED_ON_NEXT    0x00
#define EUSCI_SPI_PHASE_DATA_CAPTURED_ONFIRST_CHANGED_ON_NEXT    EUSCI_B_CTLW0_CKPH

#define EUSCI_SPI_3PIN                      EUSCI_B_CTLW0_MODE_0
#define EUSCI_SPI_4PIN_UCxSTE_ACTIVE_HIGH   EUSCI_B_CTLW0_MODE_1
#define EUSCI_SPI_4PIN_UCxSTE_ACTIVE_LOW    EUSCI_B_CTLW0_MODE_2

#define EUSCI_SPI_CLOCKPOLARITY_INACTIVITY_HIGH    EUSCI_B_CTLW0_CKPL
#define EUSCI_SPI_CLOCKPOLARITY_INACTIVITY_LOW     0x00

#define EUSCI_SPI_TRANSMIT_INTERRUPT    EUSCI_B_IE_TXIE
#define EUSCI_SPI_RECEIVE_INTERRUPT     EUSCI_B_IE_RXIE

#define EUSCI_SPI_ENABLE_SIGNAL_FOR_4WIRE_SLAVE           EUSCI_B_CTLW0_STEM
#define EUSCI_SPI_PREVENT_CONFLICTS_WITH_OTHER_MASTERS    0x00

//*****************************************************************************
//
//
//*****************************************************************************
typedef struct _eUSCI_SPI_MasterConfig
{
    uint_fast8_t selectClockSource;
    uint32_t clockSourceFrequency;
    uint32_t desiredSpiClock;
    uint_fast16_t msbFirst;
    uint_fast16_t clockPhase;
    uint_fast16_t clockPolarity;
    uint_fast16_t spiMode;
} eUSCI_SPI_MasterConfig;

//*****************************************************************************
//
//
//*****************************************************************************
typedef struct _eUSCI_SPI_SlaveConfig
{
    uint_fast16_t msbFirst;
    uint_fast16_t clockPhase;
    uint_fast16_t clockPolarity;
    uint_fast16_t spiMode;
} eUSCI_SPI_SlaveConfig;

//*****************************************************************************
//
//
//*****************************************************************************
extern bool SPI_initMaster(uint32_t moduleInstance,
        const eUSCI_SPI_MasterConfig *config);

//*****************************************************************************
//
//
//*****************************************************************************
extern void SPI_selectFourPinFunctionality(uint32_t moduleInstance,
        uint_fast8_t select4PinFunctionality);

//*****************************************************************************
//
//
//*****************************************************************************
extern void SPI_changeMasterClock(uint32_t moduleInstance,
        uint32_t clockSourceFrequency, uint32_t desiredSpiClock);

//*****************************************************************************
//
//*****************************************************************************
extern bool SPI_initSlave(uint32_t moduleInstance,
        const eUSCI_SPI_SlaveConfig *config);

//*****************************************************************************
//
//
//*****************************************************************************
extern void SPI_changeClockPhasePolarity(uint32_t moduleInstance,
        uint_fast16_t clockPhase, uint_fast16_t clockPolarity);

//*****************************************************************************
//
//
//*****************************************************************************
extern void SPI_transmitData(uint32_t moduleInstance,
        uint_fast8_t transmitData);

//*****************************************************************************
//
//
//*****************************************************************************
extern uint8_t SPI_receiveData(uint32_t moduleInstance);

//*****************************************************************************
//
//
//*****************************************************************************
extern void SPI_enableModule(uint32_t moduleInstance);

//*****************************************************************************
//
//
//*****************************************************************************
extern void SPI_disableModule(uint32_t moduleInstance);

//*****************************************************************************
//
//
//*****************************************************************************
extern uint32_t SPI_getReceiveBufferAddressForDMA(uint32_t moduleInstance);

//*****************************************************************************
//
//
//*****************************************************************************
extern uint32_t SPI_getTransmitBufferAddressForDMA(uint32_t moduleInstance);

//*****************************************************************************
//
//
//*****************************************************************************
extern uint_fast8_t SPI_isBusy(uint32_t moduleInstance);

//*****************************************************************************
//
//
//*****************************************************************************
extern void SPI_enableInterrupt(uint32_t moduleInstance, uint_fast16_t mask);

//*****************************************************************************
//
//
//*****************************************************************************
extern void SPI_disableInterrupt(uint32_t moduleInstance, uint_fast16_t mask);

//*****************************************************************************
//
//
//*****************************************************************************
extern uint_fast8_t SPI_getInterruptStatus(uint32_t moduleInstance,
        uint16_t mask);

//*****************************************************************************
//
//
//*****************************************************************************
extern uint_fast8_t SPI_getEnabledInterruptStatus(uint32_t moduleInstance);

//*****************************************************************************
//
//
//*****************************************************************************
extern void SPI_clearInterruptFlag(uint32_t moduleInstance, uint_fast16_t mask);

//*****************************************************************************
//
//
//*****************************************************************************
extern void SPI_registerInterrupt(uint32_t moduleInstance,
        void (*intHandler)(void));

//*****************************************************************************
//
//
//*****************************************************************************
extern void SPI_unregisterInterrupt(uint32_t moduleInstance);

/* Backwards Compatibility Layer */
#define EUSCI_B_SPI_PHASE_DATA_CHANGED_ONFIRST_CAPTURED_ON_NEXT            0x00
#define EUSCI_B_SPI_PHASE_DATA_CAPTURED_ONFIRST_CHANGED_ON_NEXT EUSCI_B_CTLW0_CKPH

#define EUSCI_B_SPI_MSB_FIRST                                  EUSCI_B_CTLW0_MSB
#define EUSCI_B_SPI_LSB_FIRST                                              0x00

#define EUSCI_B_SPI_CLOCKPOLARITY_INACTIVITY_HIGH            EUSCI_B_CTLW0_CKPL
#define EUSCI_B_SPI_CLOCKPOLARITY_INACTIVITY_LOW                           0x00

#define EUSCI_B_SPI_CLOCKSOURCE_ACLK                    EUSCI_B_CTLW0_SSEL__ACLK
#define EUSCI_B_SPI_CLOCKSOURCE_SMCLK                  EUSCI_B_CTLW0_SSEL__SMCLK

#define EUSCI_B_SPI_3PIN                                    EUSCI_B_CTLW0_MODE_0
#define EUSCI_B_SPI_4PIN_UCxSTE_ACTIVE_HIGH                 EUSCI_B_CTLW0_MODE_1
#define EUSCI_B_SPI_4PIN_UCxSTE_ACTIVE_LOW                  EUSCI_B_CTLW0_MODE_2

#define EUSCI_B_SPI_PREVENT_CONFLICTS_WITH_OTHER_MASTERS                   0x00
#define EUSCI_B_SPI_ENABLE_SIGNAL_FOR_4WIRE_SLAVE            EUSCI_B_CTLW0_STEM

#define EUSCI_B_SPI_TRANSMIT_INTERRUPT                          EUSCI_B_IE_TXIE0
#define EUSCI_B_SPI_RECEIVE_INTERRUPT                           EUSCI_B_IE_RXIE0

#define EUSCI_B_SPI_BUSY                                     EUSCI_B_STATW_BBUSY
#define EUSCI_B_SPI_NOT_BUSY                                               0x00

#define EUSCI_A_SPI_PHASE_DATA_CHANGED_ONFIRST_CAPTURED_ON_NEXT            0x00
#define EUSCI_A_SPI_PHASE_DATA_CAPTURED_ONFIRST_CHANGED_ON_NEXT EUSCI_A_CTLW0_CKPH

#define EUSCI_A_SPI_MSB_FIRST                                 EUSCI_A_CTLW0_MSB
#define EUSCI_A_SPI_LSB_FIRST                                              0x00

#define EUSCI_A_SPI_CLOCKPOLARITY_INACTIVITY_HIGH            EUSCI_A_CTLW0_CKPL
#define EUSCI_A_SPI_CLOCKPOLARITY_INACTIVITY_LOW                           0x00

#define EUSCI_A_SPI_CLOCKSOURCE_ACLK                   EUSCI_A_CTLW0_SSEL__ACLK
#define EUSCI_A_SPI_CLOCKSOURCE_SMCLK                 EUSCI_A_CTLW0_SSEL__SMCLK

#define EUSCI_A_SPI_3PIN                                   EUSCI_A_CTLW0_MODE_0
#define EUSCI_A_SPI_4PIN_UCxSTE_ACTIVE_HIGH                EUSCI_A_CTLW0_MODE_1
#define EUSCI_A_SPI_4PIN_UCxSTE_ACTIVE_LOW                 EUSCI_A_CTLW0_MODE_2

#define EUSCI_A_SPI_PREVENT_CONFLICTS_WITH_OTHER_MASTERS                   0x00
#define EUSCI_A_SPI_ENABLE_SIGNAL_FOR_4WIRE_SLAVE            EUSCI_A_CTLW0_STEM

#define EUSCI_A_SPI_TRANSMIT_INTERRUPT                          EUSCI_A_IE_TXIE
#define EUSCI_A_SPI_RECEIVE_INTERRUPT                           EUSCI_A_IE_RXIE

#define EUSCI_A_SPI_BUSY                                    EUSCI_B_STATW_BBUSY
#define EUSCI_A_SPI_NOT_BUSY                                               0x00

extern void EUSCI_A_SPI_select4PinFunctionality(uint32_t baseAddress,
        uint8_t select4PinFunctionality);
extern void EUSCI_A_SPI_masterChangeClock(uint32_t baseAddress,
        uint32_t clockSourceFrequency, uint32_t desiredSpiClock);
extern bool EUSCI_A_SPI_slaveInit(uint32_t baseAddress, uint16_t msbFirst,
        uint16_t clockPhase, uint16_t clockPolarity, uint16_t spiMode);
extern void EUSCI_A_SPI_changeClockPhasePolarity(uint32_t baseAddress,
        uint16_t clockPhase, uint16_t clockPolarity);
extern void EUSCI_A_SPI_transmitData(uint32_t baseAddress,
        uint8_t transmitData);
extern uint8_t EUSCI_A_SPI_receiveData(uint32_t baseAddress);
extern void EUSCI_A_SPI_enableInterrupt(uint32_t baseAddress, uint16_t mask);
extern void EUSCI_A_SPI_disableInterrupt(uint32_t baseAddress, uint16_t mask);
extern uint8_t EUSCI_A_SPI_getInterruptStatus(uint32_t baseAddress,
        uint8_t mask);
extern void EUSCI_A_SPI_clearInterruptFlag(uint32_t baseAddress, uint16_t mask);
extern void EUSCI_A_SPI_enable(uint32_t baseAddress);
extern void EUSCI_A_SPI_disable(uint32_t baseAddress);
extern uint32_t EUSCI_A_SPI_getReceiveBufferAddressForDMA(uint32_t baseAddress);
extern uint32_t EUSCI_A_SPI_getTransmitBufferAddressForDMA(
        uint32_t baseAddress);
extern bool EUSCI_A_SPI_isBusy(uint32_t baseAddress);
extern void EUSCI_B_SPI_select4PinFunctionality(uint32_t baseAddress,
        uint8_t select4PinFunctionality);
extern void EUSCI_B_SPI_masterChangeClock(uint32_t baseAddress,
        uint32_t clockSourceFrequency, uint32_t desiredSpiClock);
extern bool EUSCI_B_SPI_slaveInit(uint32_t baseAddress, uint16_t msbFirst,
        uint16_t clockPhase, uint16_t clockPolarity, uint16_t spiMode);
extern void EUSCI_B_SPI_changeClockPhasePolarity(uint32_t baseAddress,
        uint16_t clockPhase, uint16_t clockPolarity);
extern void EUSCI_B_SPI_transmitData(uint32_t baseAddress,
        uint8_t transmitData);
extern uint8_t EUSCI_B_SPI_receiveData(uint32_t baseAddress);
extern void EUSCI_B_SPI_enableInterrupt(uint32_t baseAddress, uint16_t mask);
extern void EUSCI_B_SPI_disableInterrupt(uint32_t baseAddress, uint16_t mask);
extern uint8_t EUSCI_B_SPI_getInterruptStatus(uint32_t baseAddress,
        uint8_t mask);
extern void EUSCI_B_SPI_clearInterruptFlag(uint32_t baseAddress, uint16_t mask);
extern void EUSCI_B_SPI_enable(uint32_t baseAddress);
extern void EUSCI_B_SPI_disable(uint32_t baseAddress);
extern uint32_t EUSCI_B_SPI_getReceiveBufferAddressForDMA(uint32_t baseAddress);
extern uint32_t EUSCI_B_SPI_getTransmitBufferAddressForDMA(
        uint32_t baseAddress);
extern bool EUSCI_B_SPI_isBusy(uint32_t baseAddress);

//*****************************************************************************
//
// Mark the end of the C bindings section for C++ compilers.
//
//*****************************************************************************
#ifdef __cplusplus
}
#endif

//*****************************************************************************
//
// Close the Doxygen group.
//
//*****************************************************************************

#endif /* SPI_H_ */