56 #include <ti/devices/msp432p4xx/inc/msp.h>
57 #include <ti/devices/msp432p4xx/driverlib/eusci.h>
59 #define DEFAULT_SYNC 0x00
60 #define EUSCI_A_UART_AUTOMATICBAUDRATE_SYNC 0x55
62 #define EUSCI_A_UART_NO_PARITY 0x00
63 #define EUSCI_A_UART_ODD_PARITY 0x01
64 #define EUSCI_A_UART_EVEN_PARITY 0x02
66 #define EUSCI_A_UART_8_BIT_LEN 0x00
67 #define EUSCI_A_UART_7_BIT_LEN 0x01
68 #define EUSCI_A_UART_MSB_FIRST EUSCI_A_CTLW0_MSB
69 #define EUSCI_A_UART_LSB_FIRST 0x00
71 #define EUSCI_A_UART_MODE EUSCI_A_CTLW0_MODE_0
72 #define EUSCI_A_UART_IDLE_LINE_MULTI_PROCESSOR_MODE EUSCI_A_CTLW0_MODE_1
73 #define EUSCI_A_UART_ADDRESS_BIT_MULTI_PROCESSOR_MODE EUSCI_A_CTLW0_MODE_2
74 #define EUSCI_A_UART_AUTOMATIC_BAUDRATE_DETECTION_MODE EUSCI_A_CTLW0_MODE_3
76 #define EUSCI_A_UART_CLOCKSOURCE_SMCLK EUSCI_A_CTLW0_SSEL__SMCLK
77 #define EUSCI_A_UART_CLOCKSOURCE_ACLK EUSCI_A_CTLW0_SSEL__ACLK
79 #define EUSCI_A_UART_ONE_STOP_BIT 0x00
80 #define EUSCI_A_UART_TWO_STOP_BITS EUSCI_A_CTLW0_SPB
82 #define EUSCI_A_UART_OVERSAMPLING_BAUDRATE_GENERATION 0x01
83 #define EUSCI_A_UART_LOW_FREQUENCY_BAUDRATE_GENERATION 0x00
85 #define EUSCI_A_UART_RECEIVE_INTERRUPT EUSCI_A_IE_RXIE
86 #define EUSCI_A_UART_TRANSMIT_INTERRUPT EUSCI_A_IE_TXIE
87 #define EUSCI_A_UART_RECEIVE_ERRONEOUSCHAR_INTERRUPT EUSCI_A_CTLW0_RXEIE
88 #define EUSCI_A_UART_BREAKCHAR_INTERRUPT EUSCI_A_CTLW0_BRKIE
89 #define EUSCI_A_UART_STARTBIT_INTERRUPT EUSCI_A_IE_STTIE
90 #define EUSCI_A_UART_TRANSMIT_COMPLETE_INTERRUPT EUSCI_B_IE_STPIE
92 #define EUSCI_A_UART_RECEIVE_INTERRUPT_FLAG EUSCI_A_IFG_RXIFG
93 #define EUSCI_A_UART_TRANSMIT_INTERRUPT_FLAG EUSCI_A_IFG_TXIFG
94 #define EUSCI_A_UART_STARTBIT_INTERRUPT_FLAG EUSCI_A_IFG_STTIFG
95 #define EUSCI_A_UART_TRANSMIT_COMPLETE_INTERRUPT_FLAG EUSCI_A_IFG_TXCPTIFG
97 #define EUSCI_A_UART_LISTEN_ENABLE EUSCI_A_STATW_LISTEN
98 #define EUSCI_A_UART_FRAMING_ERROR EUSCI_A_STATW_FE
99 #define EUSCI_A_UART_OVERRUN_ERROR EUSCI_A_STATW_OE
100 #define EUSCI_A_UART_PARITY_ERROR EUSCI_A_STATW_PE
101 #define EUSCI_A_UART_BREAK_DETECT EUSCI_A_STATW_BRK
102 #define EUSCI_A_UART_RECEIVE_ERROR EUSCI_A_STATW_RXERR
103 #define EUSCI_A_UART_ADDRESS_RECEIVED EUSCI_A_STATW_ADDR_IDLE
104 #define EUSCI_A_UART_IDLELINE EUSCI_A_STATW_ADDR_IDLE
105 #define EUSCI_A_UART_BUSY EUSCI_A_STATW_BUSY
107 #define EUSCI_A_UART_DEGLITCH_TIME_2ns 0x00
108 #define EUSCI_A_UART_DEGLITCH_TIME_50ns 0x0001
109 #define EUSCI_A_UART_DEGLITCH_TIME_100ns 0x0002
110 #define EUSCI_A_UART_DEGLITCH_TIME_200ns (0x0001 + 0x0002)
240 uint_fast8_t transmitData);
419 uint_fast8_t transmitAddress);
519 uint32_t deglitchTime);
700 void (*intHandler)(
void));
729 #define EUSCI_A_UART_transmitData UART_transmitData
730 #define EUSCI_A_UART_receiveData UART_receiveData
731 #define EUSCI_A_UART_enableInterrupt UART_enableInterrupt
732 #define EUSCI_A_UART_disableInterrupt UART_disableInterrupt
733 #define EUSCI_A_UART_getInterruptStatus UART_getInterruptStatus
734 #define EUSCI_A_UART_clearInterruptFlag UART_clearInterruptFlag
735 #define EUSCI_A_UART_enable UART_enableModule
736 #define EUSCI_A_UART_disable UART_disableModule
737 #define EUSCI_A_UART_queryStatusFlags UART_queryStatusFlags
738 #define EUSCI_A_UART_setDormant UART_setDormant
739 #define EUSCI_A_UART_resetDormant UART_resetDormant
740 #define EUSCI_A_UART_transmitAddress UART_transmitAddress
741 #define EUSCI_A_UART_transmitBreak UART_transmitBreak
742 #define EUSCI_A_UART_getReceiveBufferAddressForDMA UART_getReceiveBufferAddressForDMA
743 #define EUSCI_A_UART_getTransmitBufferAddressForDMA UART_getTransmitBufferAddressForDMA
744 #define EUSCI_A_UART_selectDeglitchTime UART_selectDeglitchTime
void UART_resetDormant(uint32_t moduleInstance)
Definition: uart.c:179
Type definition for _eUSCI_UART_Config structure.
Definition: uart.h:124
uint_fast8_t UART_queryStatusFlags(uint32_t moduleInstance, uint_fast8_t mask)
Definition: uart.c:159
void UART_disableInterrupt(uint32_t moduleInstance, uint_fast8_t mask)
Definition: uart.c:263
void UART_selectDeglitchTime(uint32_t moduleInstance, uint32_t deglitchTime)
Definition: uart.c:223
bool UART_initModule(uint32_t moduleInstance, const eUSCI_UART_ConfigV1 *config)
Definition: uart.c:37
uint_fast16_t numberofStopBits
Definition: uart.h:132
uint_fast8_t secondModReg
Definition: uart.h:129
void UART_transmitData(uint32_t moduleInstance, uint_fast8_t transmitData)
Definition: uart.c:127
uint_fast16_t msborLsbFirst
Definition: uart.h:131
uint_fast8_t overSampling
Definition: uart.h:134
uint_fast8_t selectClockSource
Definition: uart.h:126
uint_fast16_t dataLength
Definition: uart.h:135
void UART_unregisterInterrupt(uint32_t moduleInstance)
Definition: uart.c:377
uint_fast8_t UART_getInterruptStatus(uint32_t moduleInstance, uint8_t mask)
Definition: uart.c:288
uint32_t UART_getReceiveBufferAddressForDMA(uint32_t moduleInstance)
Definition: uart.c:213
uint8_t UART_receiveData(uint32_t moduleInstance)
Definition: uart.c:137
void UART_enableInterrupt(uint32_t moduleInstance, uint_fast8_t mask)
Definition: uart.c:237
void UART_transmitBreak(uint32_t moduleInstance)
Definition: uart.c:193
void UART_clearInterruptFlag(uint32_t moduleInstance, uint_fast8_t mask)
Definition: uart.c:335
struct _eUSCI_eUSCI_UART_ConfigV1 eUSCI_UART_ConfigV1
uint32_t UART_getTransmitBufferAddressForDMA(uint32_t moduleInstance)
Definition: uart.c:218
uint_fast8_t firstModReg
Definition: uart.h:128
uint_fast16_t clockPrescalar
Definition: uart.h:127
uint_fast16_t uartMode
Definition: uart.h:133
void UART_transmitAddress(uint32_t moduleInstance, uint_fast8_t transmitAddress)
Definition: uart.c:184
uint_fast8_t UART_getEnabledInterruptStatus(uint32_t moduleInstance)
Definition: uart.c:300
void UART_setDormant(uint32_t moduleInstance)
Definition: uart.c:174
void UART_enableModule(uint32_t moduleInstance)
Definition: uart.c:147
void UART_registerInterrupt(uint32_t moduleInstance, void(*intHandler)(void))
Definition: uart.c:348
uint_fast8_t parity
Definition: uart.h:130
void UART_disableModule(uint32_t moduleInstance)
Definition: uart.c:153