spi.h
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32 #ifndef SPI_H_
33 #define SPI_H_
34 
35 //*****************************************************************************
36 //
39 //
40 //*****************************************************************************
41 
42 //*****************************************************************************
43 //
44 // If building with a C++ compiler, make all of the definitions in this header
45 // have a C binding.
46 //
47 //*****************************************************************************
48 #ifdef __cplusplus
49 extern "C"
50 {
51 #endif
52 
53 #include <stdbool.h>
54 #include <stdint.h>
55 #include <ti/devices/msp432p4xx/inc/msp.h>
56 #include <ti/devices/msp432p4xx/driverlib/eusci.h>
57 
58 /* Configuration Defines */
59 #define EUSCI_SPI_CLOCKSOURCE_ACLK EUSCI_B_CTLW0_SSEL__ACLK
60 #define EUSCI_SPI_CLOCKSOURCE_SMCLK EUSCI_B_CTLW0_SSEL__SMCLK
61 
62 #define EUSCI_SPI_MSB_FIRST EUSCI_B_CTLW0_MSB
63 #define EUSCI_SPI_LSB_FIRST 0x00
64 
65 #define EUSCI_SPI_BUSY EUSCI_A_STATW_BUSY
66 #define EUSCI_SPI_NOT_BUSY 0x00
67 
68 #define EUSCI_SPI_PHASE_DATA_CHANGED_ONFIRST_CAPTURED_ON_NEXT 0x00
69 #define EUSCI_SPI_PHASE_DATA_CAPTURED_ONFIRST_CHANGED_ON_NEXT EUSCI_B_CTLW0_CKPH
70 
71 #define EUSCI_SPI_3PIN EUSCI_B_CTLW0_MODE_0
72 #define EUSCI_SPI_4PIN_UCxSTE_ACTIVE_HIGH EUSCI_B_CTLW0_MODE_1
73 #define EUSCI_SPI_4PIN_UCxSTE_ACTIVE_LOW EUSCI_B_CTLW0_MODE_2
74 
75 #define EUSCI_SPI_CLOCKPOLARITY_INACTIVITY_HIGH EUSCI_B_CTLW0_CKPL
76 #define EUSCI_SPI_CLOCKPOLARITY_INACTIVITY_LOW 0x00
77 
78 #define EUSCI_SPI_TRANSMIT_INTERRUPT EUSCI_B_IE_TXIE_OFS
79 #define EUSCI_SPI_RECEIVE_INTERRUPT EUSCI_B_IE_RXIE_OFS
80 
81 #define EUSCI_SPI_ENABLE_SIGNAL_FOR_4WIRE_SLAVE EUSCI_B_CTLW0_STEM
82 #define EUSCI_SPI_PREVENT_CONFLICTS_WITH_OTHER_MASTERS 0x00
83 
84 //*****************************************************************************
85 //
92 //
93 //*****************************************************************************
95 {
96  uint_fast8_t selectClockSource;
98  uint32_t desiredSpiClock;
99  uint_fast16_t msbFirst;
100  uint_fast16_t clockPhase;
101  uint_fast16_t clockPolarity;
102  uint_fast16_t spiMode;
104 
105 //*****************************************************************************
106 //
113 //
114 //*****************************************************************************
116 {
117  uint_fast16_t msbFirst;
118  uint_fast16_t clockPhase;
119  uint_fast16_t clockPolarity;
120  uint_fast16_t spiMode;
122 
123 //*****************************************************************************
124 //
174 //
175 //*****************************************************************************
176 extern bool SPI_initMaster(uint32_t moduleInstance,
177  const eUSCI_SPI_MasterConfig *config);
178 
179 //*****************************************************************************
180 //
203 //
204 //*****************************************************************************
205 extern void SPI_selectFourPinFunctionality(uint32_t moduleInstance,
206  uint_fast8_t select4PinFunctionality);
207 
208 //*****************************************************************************
209 //
231 //
232 //*****************************************************************************
233 extern void SPI_changeMasterClock(uint32_t moduleInstance,
234  uint32_t clockSourceFrequency, uint32_t desiredSpiClock);
235 
236 //*****************************************************************************
237 //
282 //*****************************************************************************
283 extern bool SPI_initSlave(uint32_t moduleInstance,
284  const eUSCI_SPI_SlaveConfig *config);
285 
286 //*****************************************************************************
287 //
316 //
317 //*****************************************************************************
318 extern void SPI_changeClockPhasePolarity(uint32_t moduleInstance,
319  uint_fast16_t clockPhase, uint_fast16_t clockPolarity);
320 
321 //*****************************************************************************
322 //
344 //
345 //*****************************************************************************
346 extern void SPI_transmitData(uint32_t moduleInstance,
347  uint_fast8_t transmitData);
348 
349 //*****************************************************************************
350 //
369 //
370 //*****************************************************************************
371 extern uint8_t SPI_receiveData(uint32_t moduleInstance);
372 
373 //*****************************************************************************
374 //
393 //
394 //*****************************************************************************
395 extern void SPI_enableModule(uint32_t moduleInstance);
396 
397 //*****************************************************************************
398 //
418 //
419 //*****************************************************************************
420 extern void SPI_disableModule(uint32_t moduleInstance);
421 
422 //*****************************************************************************
423 //
442 //
443 //*****************************************************************************
444 extern uint32_t SPI_getReceiveBufferAddressForDMA(uint32_t moduleInstance);
445 
446 //*****************************************************************************
447 //
466 //
467 //*****************************************************************************
468 extern uint32_t SPI_getTransmitBufferAddressForDMA(uint32_t moduleInstance);
469 
470 //*****************************************************************************
471 //
491 //
492 //*****************************************************************************
493 extern uint_fast8_t SPI_isBusy(uint32_t moduleInstance);
494 
495 //*****************************************************************************
496 //
523 //
524 //*****************************************************************************
525 extern void SPI_enableInterrupt(uint32_t moduleInstance, uint_fast8_t mask);
526 
527 //*****************************************************************************
528 //
556 //
557 //*****************************************************************************
558 extern void SPI_disableInterrupt(uint32_t moduleInstance, uint_fast8_t mask);
559 
560 //*****************************************************************************
561 //
584 //
585 //*****************************************************************************
586 extern uint_fast8_t SPI_getInterruptStatus(uint32_t moduleInstance,
587  uint16_t mask);
588 
589 //*****************************************************************************
590 //
613 //
614 //*****************************************************************************
615 extern uint_fast8_t SPI_getEnabledInterruptStatus(uint32_t moduleInstance);
616 
617 //*****************************************************************************
618 //
640 //
641 //*****************************************************************************
642 extern void SPI_clearInterruptFlag(uint32_t moduleInstance, uint_fast8_t mask);
643 
644 //*****************************************************************************
645 //
672 //
673 //*****************************************************************************
674 extern void SPI_registerInterrupt(uint32_t moduleInstance,
675  void (*intHandler)(void));
676 
677 //*****************************************************************************
678 //
700 //
701 //*****************************************************************************
702 extern void SPI_unregisterInterrupt(uint32_t moduleInstance);
703 
704 /* Backwards Compatibility Layer */
705 #define EUSCI_B_SPI_PHASE_DATA_CHANGED_ONFIRST_CAPTURED_ON_NEXT 0x00
706 #define EUSCI_B_SPI_PHASE_DATA_CAPTURED_ONFIRST_CHANGED_ON_NEXT EUSCI_B_CTLW0_CKPH
707 
708 #define EUSCI_B_SPI_MSB_FIRST EUSCI_B_CTLW0_MSB
709 #define EUSCI_B_SPI_LSB_FIRST 0x00
710 
711 #define EUSCI_B_SPI_CLOCKPOLARITY_INACTIVITY_HIGH EUSCI_B_CTLW0_CKPL
712 #define EUSCI_B_SPI_CLOCKPOLARITY_INACTIVITY_LOW 0x00
713 
714 #define EUSCI_B_SPI_CLOCKSOURCE_ACLK EUSCI_B_CTLW0_SSEL__ACLK
715 #define EUSCI_B_SPI_CLOCKSOURCE_SMCLK EUSCI_B_CTLW0_SSEL__SMCLK
716 
717 #define EUSCI_B_SPI_3PIN EUSCI_B_CTLW0_MODE_0
718 #define EUSCI_B_SPI_4PIN_UCxSTE_ACTIVE_HIGH EUSCI_B_CTLW0_MODE_1
719 #define EUSCI_B_SPI_4PIN_UCxSTE_ACTIVE_LOW EUSCI_B_CTLW0_MODE_2
720 
721 #define EUSCI_B_SPI_PREVENT_CONFLICTS_WITH_OTHER_MASTERS 0x00
722 #define EUSCI_B_SPI_ENABLE_SIGNAL_FOR_4WIRE_SLAVE EUSCI_B_CTLW0_STEM
723 
724 #define EUSCI_B_SPI_TRANSMIT_INTERRUPT EUSCI_B_IE_TXIE0
725 #define EUSCI_B_SPI_RECEIVE_INTERRUPT EUSCI_B_IE_RXIE0
726 
727 #define EUSCI_B_SPI_BUSY EUSCI_B_STATW_BBUSY
728 #define EUSCI_B_SPI_NOT_BUSY 0x00
729 
730 #define EUSCI_A_SPI_PHASE_DATA_CHANGED_ONFIRST_CAPTURED_ON_NEXT 0x00
731 #define EUSCI_A_SPI_PHASE_DATA_CAPTURED_ONFIRST_CHANGED_ON_NEXT EUSCI_A_CTLW0_CKPH
732 
733 #define EUSCI_A_SPI_MSB_FIRST EUSCI_A_CTLW0_MSB
734 #define EUSCI_A_SPI_LSB_FIRST 0x00
735 
736 #define EUSCI_A_SPI_CLOCKPOLARITY_INACTIVITY_HIGH EUSCI_A_CTLW0_CKPL
737 #define EUSCI_A_SPI_CLOCKPOLARITY_INACTIVITY_LOW 0x00
738 
739 #define EUSCI_A_SPI_CLOCKSOURCE_ACLK EUSCI_A_CTLW0_SSEL__ACLK
740 #define EUSCI_A_SPI_CLOCKSOURCE_SMCLK EUSCI_A_CTLW0_SSEL__SMCLK
741 
742 #define EUSCI_A_SPI_3PIN EUSCI_A_CTLW0_MODE_0
743 #define EUSCI_A_SPI_4PIN_UCxSTE_ACTIVE_HIGH EUSCI_A_CTLW0_MODE_1
744 #define EUSCI_A_SPI_4PIN_UCxSTE_ACTIVE_LOW EUSCI_A_CTLW0_MODE_2
745 
746 #define EUSCI_A_SPI_PREVENT_CONFLICTS_WITH_OTHER_MASTERS 0x00
747 #define EUSCI_A_SPI_ENABLE_SIGNAL_FOR_4WIRE_SLAVE EUSCI_A_CTLW0_STEM
748 
749 #define EUSCI_A_SPI_TRANSMIT_INTERRUPT EUSCI_A_IE_TXIE
750 #define EUSCI_A_SPI_RECEIVE_INTERRUPT EUSCI_A_IE_RXIE
751 
752 #define EUSCI_A_SPI_BUSY EUSCI_B_STATW_BBUSY
753 #define EUSCI_A_SPI_NOT_BUSY 0x00
754 
755 extern void EUSCI_A_SPI_select4PinFunctionality(uint32_t baseAddress,
756  uint8_t select4PinFunctionality);
757 extern void EUSCI_A_SPI_masterChangeClock(uint32_t baseAddress,
758  uint32_t clockSourceFrequency, uint32_t desiredSpiClock);
759 extern bool EUSCI_A_SPI_slaveInit(uint32_t baseAddress, uint16_t msbFirst,
760  uint16_t clockPhase, uint16_t clockPolarity, uint16_t spiMode);
761 extern void EUSCI_A_SPI_changeClockPhasePolarity(uint32_t baseAddress,
762  uint16_t clockPhase, uint16_t clockPolarity);
763 extern void EUSCI_A_SPI_transmitData(uint32_t baseAddress,
764  uint8_t transmitData);
765 extern uint8_t EUSCI_A_SPI_receiveData(uint32_t baseAddress);
766 extern void EUSCI_A_SPI_enableInterrupt(uint32_t baseAddress, uint8_t mask);
767 extern void EUSCI_A_SPI_disableInterrupt(uint32_t baseAddress, uint8_t mask);
768 extern uint8_t EUSCI_A_SPI_getInterruptStatus(uint32_t baseAddress,
769  uint8_t mask);
770 extern void EUSCI_A_SPI_clearInterruptFlag(uint32_t baseAddress, uint8_t mask);
771 extern void EUSCI_A_SPI_enable(uint32_t baseAddress);
772 extern void EUSCI_A_SPI_disable(uint32_t baseAddress);
773 extern uint32_t EUSCI_A_SPI_getReceiveBufferAddressForDMA(uint32_t baseAddress);
775  uint32_t baseAddress);
776 extern bool EUSCI_A_SPI_isBusy(uint32_t baseAddress);
777 extern void EUSCI_B_SPI_select4PinFunctionality(uint32_t baseAddress,
778  uint8_t select4PinFunctionality);
779 extern void EUSCI_B_SPI_masterChangeClock(uint32_t baseAddress,
780  uint32_t clockSourceFrequency, uint32_t desiredSpiClock);
781 extern bool EUSCI_B_SPI_slaveInit(uint32_t baseAddress, uint16_t msbFirst,
782  uint16_t clockPhase, uint16_t clockPolarity, uint16_t spiMode);
783 extern void EUSCI_B_SPI_changeClockPhasePolarity(uint32_t baseAddress,
784  uint16_t clockPhase, uint16_t clockPolarity);
785 extern void EUSCI_B_SPI_transmitData(uint32_t baseAddress,
786  uint8_t transmitData);
787 extern uint8_t EUSCI_B_SPI_receiveData(uint32_t baseAddress);
788 extern void EUSCI_B_SPI_enableInterrupt(uint32_t baseAddress, uint8_t mask);
789 extern void EUSCI_B_SPI_disableInterrupt(uint32_t baseAddress, uint8_t mask);
790 extern uint8_t EUSCI_B_SPI_getInterruptStatus(uint32_t baseAddress,
791  uint8_t mask);
792 extern void EUSCI_B_SPI_clearInterruptFlag(uint32_t baseAddress, uint8_t mask);
793 extern void EUSCI_B_SPI_enable(uint32_t baseAddress);
794 extern void EUSCI_B_SPI_disable(uint32_t baseAddress);
795 extern uint32_t EUSCI_B_SPI_getReceiveBufferAddressForDMA(uint32_t baseAddress);
797  uint32_t baseAddress);
798 extern bool EUSCI_B_SPI_isBusy(uint32_t baseAddress);
799 
800 //*****************************************************************************
801 //
802 // Mark the end of the C bindings section for C++ compilers.
803 //
804 //*****************************************************************************
805 #ifdef __cplusplus
806 }
807 #endif
808 
809 //*****************************************************************************
810 //
811 // Close the Doxygen group.
813 //
814 //*****************************************************************************
815 
816 #endif /* SPI_H_ */
817 
bool SPI_initMaster(uint32_t moduleInstance, const eUSCI_SPI_MasterConfig *config)
Definition: spi.c:52
uint_fast16_t clockPhase
Definition: spi.h:118
uint_fast8_t selectClockSource
Definition: spi.h:96
Type definition for _eUSCI_SPI_SlaveConfig structure.
Definition: spi.h:115
void EUSCI_A_SPI_clearInterruptFlag(uint32_t baseAddress, uint8_t mask)
Clears the selected SPI interrupt status flag.
Definition: spi.c:1262
uint8_t EUSCI_A_SPI_receiveData(uint32_t baseAddress)
Receives a byte that has been sent to the SPI Module.
Definition: spi.c:1155
bool SPI_initSlave(uint32_t moduleInstance, const eUSCI_SPI_SlaveConfig *config)
Definition: spi.c:197
void EUSCI_A_SPI_enableInterrupt(uint32_t baseAddress, uint8_t mask)
Enables individual SPI interrupt sources.
Definition: spi.c:1179
void SPI_registerInterrupt(uint32_t moduleInstance, void(*intHandler)(void))
Definition: spi.c:439
uint32_t SPI_getReceiveBufferAddressForDMA(uint32_t moduleInstance)
Definition: spi.c:338
void EUSCI_A_SPI_enable(uint32_t baseAddress)
Enables the SPI block.
Definition: spi.c:1285
bool EUSCI_B_SPI_isBusy(uint32_t baseAddress)
Indicates whether or not the SPI bus is busy.
Definition: spi.c:945
void SPI_changeMasterClock(uint32_t moduleInstance, uint32_t clockSourceFrequency, uint32_t desiredSpiClock)
Definition: spi.c:182
void EUSCI_B_SPI_transmitData(uint32_t baseAddress, uint8_t transmitData)
Transmits a byte from the SPI Module.
Definition: spi.c:727
void EUSCI_B_SPI_disable(uint32_t baseAddress)
Disables the SPI block.
Definition: spi.c:893
void SPI_disableModule(uint32_t moduleInstance)
Definition: spi.c:326
void EUSCI_A_SPI_select4PinFunctionality(uint32_t baseAddress, uint8_t select4PinFunctionality)
Selects 4Pin Functionality.
Definition: spi.c:969
uint_fast8_t SPI_getInterruptStatus(uint32_t moduleInstance, uint16_t mask)
Definition: spi.c:398
struct _eUSCI_SPI_SlaveConfig eUSCI_SPI_SlaveConfig
void SPI_enableInterrupt(uint32_t moduleInstance, uint_fast8_t mask)
Definition: spi.c:374
void EUSCI_A_SPI_disableInterrupt(uint32_t baseAddress, uint8_t mask)
Disables individual SPI interrupt sources.
Definition: spi.c:1208
void EUSCI_B_SPI_masterChangeClock(uint32_t baseAddress, uint32_t clockSourceFrequency, uint32_t desiredSpiClock)
Initializes the SPI Master clock. At the end of this function call, SPI module is left enabled...
Definition: spi.c:585
uint_fast16_t clockPhase
Definition: spi.h:100
void EUSCI_B_SPI_changeClockPhasePolarity(uint32_t baseAddress, uint16_t clockPhase, uint16_t clockPolarity)
Changes the SPI colock phase and polarity. At the end of this function call, SPI module is left enabl...
Definition: spi.c:689
void EUSCI_B_SPI_enable(uint32_t baseAddress)
Enables the SPI block.
Definition: spi.c:874
void SPI_enableModule(uint32_t moduleInstance)
Definition: spi.c:314
void SPI_unregisterInterrupt(uint32_t moduleInstance)
Definition: spi.c:488
void EUSCI_A_SPI_changeClockPhasePolarity(uint32_t baseAddress, uint16_t clockPhase, uint16_t clockPolarity)
Changes the SPI colock phase and polarity. At the end of this function call, SPI module is left enabl...
Definition: spi.c:1100
void SPI_clearInterruptFlag(uint32_t moduleInstance, uint_fast8_t mask)
Definition: spi.c:427
void EUSCI_A_SPI_disable(uint32_t baseAddress)
Disables the SPI block.
Definition: spi.c:1304
void SPI_changeClockPhasePolarity(uint32_t moduleInstance, uint_fast16_t clockPhase, uint_fast16_t clockPolarity)
Definition: spi.c:275
void SPI_transmitData(uint32_t moduleInstance, uint_fast8_t transmitData)
Definition: spi.c:290
uint32_t desiredSpiClock
Definition: spi.h:98
void SPI_disableInterrupt(uint32_t moduleInstance, uint_fast8_t mask)
Definition: spi.c:386
uint_fast16_t spiMode
Definition: spi.h:102
uint32_t EUSCI_B_SPI_getTransmitBufferAddressForDMA(uint32_t baseAddress)
Returns the address of the TX Buffer of the SPI for the DMA module.
Definition: spi.c:928
uint_fast16_t clockPolarity
Definition: spi.h:101
uint_fast16_t msbFirst
Definition: spi.h:117
Type definition for _eUSCI_SPI_MasterConfig structure.
Definition: spi.h:94
uint_fast16_t spiMode
Definition: spi.h:120
uint_fast16_t msbFirst
Definition: spi.h:99
bool EUSCI_B_SPI_slaveInit(uint32_t baseAddress, uint16_t msbFirst, uint16_t clockPhase, uint16_t clockPolarity, uint16_t spiMode)
Initializes the SPI Slave block.
Definition: spi.c:633
void SPI_selectFourPinFunctionality(uint32_t moduleInstance, uint_fast8_t select4PinFunctionality)
Definition: spi.c:167
struct _eUSCI_SPI_MasterConfig eUSCI_SPI_MasterConfig
void EUSCI_B_SPI_select4PinFunctionality(uint32_t baseAddress, uint8_t select4PinFunctionality)
Selects 4Pin Functionality.
Definition: spi.c:558
uint8_t SPI_receiveData(uint32_t moduleInstance)
Definition: spi.c:302
uint_fast8_t SPI_getEnabledInterruptStatus(uint32_t moduleInstance)
Definition: spi.c:410
bool EUSCI_A_SPI_slaveInit(uint32_t baseAddress, uint16_t msbFirst, uint16_t clockPhase, uint16_t clockPolarity, uint16_t spiMode)
Initializes the SPI Slave block.
Definition: spi.c:1044
uint32_t SPI_getTransmitBufferAddressForDMA(uint32_t moduleInstance)
Definition: spi.c:350
uint_fast16_t clockPolarity
Definition: spi.h:119
void EUSCI_B_SPI_clearInterruptFlag(uint32_t baseAddress, uint8_t mask)
Clears the selected SPI interrupt status flag.
Definition: spi.c:851
uint8_t EUSCI_B_SPI_receiveData(uint32_t baseAddress)
Receives a byte that has been sent to the SPI Module.
Definition: spi.c:744
uint32_t EUSCI_A_SPI_getTransmitBufferAddressForDMA(uint32_t baseAddress)
Returns the address of the TX Buffer of the SPI for the DMA module.
Definition: spi.c:1339
void EUSCI_B_SPI_enableInterrupt(uint32_t baseAddress, uint8_t mask)
Enables individual SPI interrupt sources.
Definition: spi.c:768
uint32_t EUSCI_B_SPI_getReceiveBufferAddressForDMA(uint32_t baseAddress)
Returns the address of the RX Buffer of the SPI for the DMA module.
Definition: spi.c:911
uint8_t EUSCI_B_SPI_getInterruptStatus(uint32_t baseAddress, uint8_t mask)
Gets the current SPI interrupt status.
Definition: spi.c:826
uint_fast8_t SPI_isBusy(uint32_t moduleInstance)
Definition: spi.c:362
uint8_t EUSCI_A_SPI_getInterruptStatus(uint32_t baseAddress, uint8_t mask)
Gets the current SPI interrupt status.
Definition: spi.c:1237
void EUSCI_A_SPI_masterChangeClock(uint32_t baseAddress, uint32_t clockSourceFrequency, uint32_t desiredSpiClock)
Initializes the SPI Master clock. At the end of this function call, SPI module is left enabled...
Definition: spi.c:996
uint32_t clockSourceFrequency
Definition: spi.h:97
uint32_t EUSCI_A_SPI_getReceiveBufferAddressForDMA(uint32_t baseAddress)
Returns the address of the RX Buffer of the SPI for the DMA module.
Definition: spi.c:1322
bool EUSCI_A_SPI_isBusy(uint32_t baseAddress)
Indicates whether or not the SPI bus is busy.
Definition: spi.c:1355
void EUSCI_A_SPI_transmitData(uint32_t baseAddress, uint8_t transmitData)
Transmits a byte from the SPI Module.
Definition: spi.c:1138
void EUSCI_B_SPI_disableInterrupt(uint32_t baseAddress, uint8_t mask)
Disables individual SPI interrupt sources.
Definition: spi.c:797

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