156 #ifndef ti_drivers_capture_CaptureMSP432__include 157 #define ti_drivers_capture_CaptureMSP432__include 167 #include <ti/drivers/dpl/HwiP.h> 171 #include <ti/devices/DeviceFamily.h> 172 #include <ti/devices/msp432p4xx/driverlib/interrupt.h> 192 #define CAPTUREMSP432_INT_OFS 24 193 #define CAPTUREMSP432_CCR_OFS 16 194 #define CAPTUREMSP432_PMAP_OFS 8 206 #define CaptureMSP432_P2_0_TA0 ((PMAP_TA0CCR1A << CAPTUREMSP432_PMAP_OFS) | 0x20 | \ 207 (INT_TA0_N << CAPTUREMSP432_INT_OFS) | \ 208 (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS)) 215 #define CaptureMSP432_P2_0_TA1 ((PMAP_TA1CCR1A << CAPTUREMSP432_PMAP_OFS) | \ 216 0x20 | (INT_TA1_N << CAPTUREMSP432_INT_OFS) | \ 217 (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS)) 224 #define CaptureMSP432_P2_1_TA0 ((PMAP_TA0CCR1A << CAPTUREMSP432_PMAP_OFS) | \ 225 0x21 | (INT_TA0_N << CAPTUREMSP432_INT_OFS) | \ 226 (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS)) 233 #define CaptureMSP432_P2_1_TA1 ((PMAP_TA1CCR1A << CAPTUREMSP432_PMAP_OFS) | \ 234 0x21 | (INT_TA2_N << CAPTUREMSP432_INT_OFS) | \ 235 (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS)) 241 #define CaptureMSP432_P2_2_TA0 ((PMAP_TA0CCR1A << CAPTUREMSP432_PMAP_OFS) | \ 242 0x22 | (INT_TA0_N << CAPTUREMSP432_INT_OFS) | \ 243 (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS)) 250 #define CaptureMSP432_P2_2_TA1 ((PMAP_TA1CCR1A << CAPTUREMSP432_PMAP_OFS) | \ 251 0x22 | (INT_TA1_N << CAPTUREMSP432_INT_OFS) | \ 252 (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS)) 259 #define CaptureMSP432_P2_3_TA0 ((PMAP_TA0CCR1A << CAPTUREMSP432_PMAP_OFS) | \ 260 0x23 | (INT_TA0_N << CAPTUREMSP432_INT_OFS) | \ 261 (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS)) 268 #define CaptureMSP432_P2_3_TA1 ((PMAP_TA1CCR1A << CAPTUREMSP432_PMAP_OFS) | \ 269 0x23 | (INT_TA1_N << CAPTUREMSP432_INT_OFS) | \ 270 (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS)) 277 #define CaptureMSP432_P2_4_TA0 ((PMAP_TA0CCR1A << CAPTUREMSP432_PMAP_OFS) | \ 278 0x24 | (INT_TA0_N << CAPTUREMSP432_INT_OFS) | \ 279 (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS)) 286 #define CaptureMSP432_P2_4_TA1 ((PMAP_TA1CCR1A << CAPTUREMSP432_PMAP_OFS) | \ 287 0x24 | (INT_TA1_N << CAPTUREMSP432_INT_OFS) | \ 288 (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS)) 295 #define CaptureMSP432_P2_5_TA0 ((PMAP_TA0CCR1A << CAPTUREMSP432_PMAP_OFS) | \ 296 0x25 | (INT_TA0_N << CAPTUREMSP432_INT_OFS) | \ 297 (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS)) 304 #define CaptureMSP432_P2_5_TA1 ((PMAP_TA1CCR1A << CAPTUREMSP432_PMAP_OFS) | \ 305 0x25 | (INT_TA1_N << CAPTUREMSP432_INT_OFS) | \ 306 (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS)) 313 #define CaptureMSP432_P2_6_TA0 ((PMAP_TA0CCR1A << CAPTUREMSP432_PMAP_OFS) | \ 314 0x26 | (INT_TA0_N << CAPTUREMSP432_INT_OFS) | \ 315 (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS)) 322 #define CaptureMSP432_P2_6_TA1 ((PMAP_TA1CCR1A << CAPTUREMSP432_PMAP_OFS) | \ 323 0x26 | (INT_TA1_N << CAPTUREMSP432_INT_OFS) | \ 324 (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS)) 331 #define CaptureMSP432_P2_7_TA0 ((PMAP_TA0CCR1A << CAPTUREMSP432_PMAP_OFS) | \ 332 0x27 | (INT_TA0_N << CAPTUREMSP432_INT_OFS) | \ 333 (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS)) 340 #define CaptureMSP432_P2_7_TA1 ((PMAP_TA1CCR1A << CAPTUREMSP432_PMAP_OFS) | \ 341 0x27 | (INT_TA1_N << CAPTUREMSP432_INT_OFS) | \ 342 (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS)) 349 #define CaptureMSP432_P3_0_TA0 ((PMAP_TA0CCR1A << CAPTUREMSP432_PMAP_OFS) | \ 350 0x30 | (INT_TA0_N << CAPTUREMSP432_INT_OFS) | \ 351 (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS)) 358 #define CaptureMSP432_P3_0_TA1 ((PMAP_TA1CCR1A << CAPTUREMSP432_PMAP_OFS) | \ 359 0x30 | (INT_TA1_N << CAPTUREMSP432_INT_OFS) | \ 360 (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS)) 367 #define CaptureMSP432_P3_1_TA0 ((PMAP_TA0CCR1A << CAPTUREMSP432_PMAP_OFS) | \ 368 0x31 | (INT_TA0_N << CAPTUREMSP432_INT_OFS) | \ 369 (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS)) 376 #define CaptureMSP432_P3_1_TA1 ((PMAP_TA1CCR1A << CAPTUREMSP432_PMAP_OFS) | \ 377 0x31 | (INT_TA1_N << CAPTUREMSP432_INT_OFS) | \ 378 (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS)) 385 #define CaptureMSP432_P3_2_TA0 ((PMAP_TA0CCR1A << CAPTUREMSP432_PMAP_OFS) | \ 386 0x32 | (INT_TA0_N << CAPTUREMSP432_INT_OFS) | \ 387 (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS)) 394 #define CaptureMSP432_P3_2_TA1 ((PMAP_TA1CCR1A << CAPTUREMSP432_PMAP_OFS) | \ 395 0x32 | (INT_TA1_N << CAPTUREMSP432_INT_OFS) | \ 396 (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS)) 403 #define CaptureMSP432_P3_3_TA0 ((PMAP_TA0CCR1A << CAPTUREMSP432_PMAP_OFS) | \ 404 0x33 | (INT_TA0_N << CAPTUREMSP432_INT_OFS) | \ 405 (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS)) 412 #define CaptureMSP432_P3_3_TA1 ((PMAP_TA1CCR1A << CAPTUREMSP432_PMAP_OFS) | \ 413 0x33 | (INT_TA1_N << CAPTUREMSP432_INT_OFS) | \ 414 (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS)) 421 #define CaptureMSP432_P3_4_TA0 ((PMAP_TA0CCR1A << CAPTUREMSP432_PMAP_OFS) | \ 422 0x34 | (INT_TA0_N << CAPTUREMSP432_INT_OFS) | \ 423 (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS)) 430 #define CaptureMSP432_P3_4_TA1 ((PMAP_TA1CCR1A << CAPTUREMSP432_PMAP_OFS) | \ 431 0x34 | (INT_TA1_N << CAPTUREMSP432_INT_OFS) | \ 432 (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS)) 439 #define CaptureMSP432_P3_5_TA0 ((PMAP_TA0CCR1A << CAPTUREMSP432_PMAP_OFS) | \ 440 0x35 | (INT_TA0_N << CAPTUREMSP432_INT_OFS) | \ 441 (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS)) 448 #define CaptureMSP432_P3_5_TA1 ((PMAP_TA1CCR1A << CAPTUREMSP432_PMAP_OFS) | \ 449 0x35 | (INT_TA1_N << CAPTUREMSP432_INT_OFS) | \ 450 (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS)) 457 #define CaptureMSP432_P3_6_TA0 ((PMAP_TA0CCR1A << CAPTUREMSP432_PMAP_OFS) | \ 458 0x36 | (INT_TA0_N << CAPTUREMSP432_INT_OFS) | \ 459 (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS)) 466 #define CaptureMSP432_P3_6_TA1 ((PMAP_TA1CCR1A << CAPTUREMSP432_PMAP_OFS) | \ 467 0x36 | (INT_TA1_N << CAPTUREMSP432_INT_OFS) | \ 468 (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS)) 475 #define CaptureMSP432_P3_7_TA0 ((PMAP_TA0CCR1A << CAPTUREMSP432_PMAP_OFS) | \ 476 0x37 | (INT_TA0_N << CAPTUREMSP432_INT_OFS) | \ 477 (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS)) 484 #define CaptureMSP432_P3_7_TA1 ((PMAP_TA1CCR1A << CAPTUREMSP432_PMAP_OFS) | \ 485 0x37 | (INT_TA1_N << CAPTUREMSP432_INT_OFS) | \ 486 (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS)) 493 #define CaptureMSP432_P5_6_TA2 (0x56 | (INT_TA2_N << CAPTUREMSP432_INT_OFS) | \ 494 (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS)) 501 #define CaptureMSP432_P5_7_TA2 (0x57 | (INT_TA2_N << CAPTUREMSP432_INT_OFS) | \ 502 (TIMER_A_CAPTURECOMPARE_REGISTER_2 << CAPTUREMSP432_CCR_OFS)) 509 #define CaptureMSP432_P6_6_TA2 (0x66 | (INT_TA2_N << CAPTUREMSP432_INT_OFS) | \ 510 (TIMER_A_CAPTURECOMPARE_REGISTER_3 << CAPTUREMSP432_CCR_OFS)) 517 #define CaptureMSP432_P6_7_TA2 (0x67 | (INT_TA2_N << CAPTUREMSP432_INT_OFS) | \ 518 (TIMER_A_CAPTURECOMPARE_REGISTER_4 << CAPTUREMSP432_CCR_OFS)) 525 #define CaptureMSP432_P7_0_TA0 ((PMAP_TA0CCR1A << CAPTUREMSP432_PMAP_OFS) | \ 526 0x70 | (INT_TA0_N << CAPTUREMSP432_INT_OFS) | \ 527 (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS)) 534 #define CaptureMSP432_P7_0_TA1 ((PMAP_TA1CCR1A << CAPTUREMSP432_PMAP_OFS) | \ 535 0x70 | (INT_TA1_N << CAPTUREMSP432_INT_OFS) | \ 536 (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS)) 543 #define CaptureMSP432_P7_1_TA0 ((PMAP_TA0CCR1A << CAPTUREMSP432_PMAP_OFS) | \ 544 0x71 | (INT_TA0_N << CAPTUREMSP432_INT_OFS) | \ 545 (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS)) 552 #define CaptureMSP432_P7_1_TA1 ((PMAP_TA1CCR1A << CAPTUREMSP432_PMAP_OFS) | \ 553 0x71 | (INT_TA1_N << CAPTUREMSP432_INT_OFS) | \ 554 (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS)) 561 #define CaptureMSP432_P7_2_TA0 ((PMAP_TA0CCR1A << CAPTUREMSP432_PMAP_OFS) | \ 562 0x72 | (INT_TA0_N << CAPTUREMSP432_INT_OFS) | \ 563 (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS)) 570 #define CaptureMSP432_P7_2_TA1 ((PMAP_TA1CCR1A << CAPTUREMSP432_PMAP_OFS) | \ 571 0x72 | (INT_TA1_N << CAPTUREMSP432_INT_OFS) | \ 572 (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS)) 579 #define CaptureMSP432_P7_3_TA0 ((PMAP_TA0CCR1A << CAPTUREMSP432_PMAP_OFS) | \ 580 0x73 | (INT_TA0_N << CAPTUREMSP432_INT_OFS) | \ 581 (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS)) 588 #define CaptureMSP432_P7_3_TA1 ((PMAP_TA1CCR1A << CAPTUREMSP432_PMAP_OFS) | \ 589 0x73 | (INT_TA1_N << CAPTUREMSP432_INT_OFS) | \ 590 (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS)) 597 #define CaptureMSP432_P7_4_TA0 ((PMAP_TA0CCR1A << CAPTUREMSP432_PMAP_OFS) | \ 598 0x74 | (INT_TA0_N << CAPTUREMSP432_INT_OFS) | \ 599 (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS)) 606 #define CaptureMSP432_P7_4_TA1 ((PMAP_TA1CCR1A << CAPTUREMSP432_PMAP_OFS) | \ 607 0x74 | (INT_TA1_N << CAPTUREMSP432_INT_OFS) | \ 608 (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS)) 615 #define CaptureMSP432_P7_5_TA0 ((PMAP_TA0CCR1A << CAPTUREMSP432_PMAP_OFS) | \ 616 0x75 | (INT_TA0_N << CAPTUREMSP432_INT_OFS) | \ 617 (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS)) 624 #define CaptureMSP432_P7_5_TA1 ((PMAP_TA1CCR1A << CAPTUREMSP432_PMAP_OFS) | \ 625 0x75 | (INT_TA1_N << CAPTUREMSP432_INT_OFS) | \ 626 (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS)) 633 #define CaptureMSP432_P7_6_TA0 ((PMAP_TA0CCR1A << CAPTUREMSP432_PMAP_OFS) | \ 634 0x76 | (INT_TA0_N << CAPTUREMSP432_INT_OFS) | \ 635 (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS)) 642 #define CaptureMSP432_P7_6_TA1 ((PMAP_TA1CCR1A << CAPTUREMSP432_PMAP_OFS) | \ 643 0x76 | (INT_TA1_N << CAPTUREMSP432_INT_OFS) | \ 644 (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS)) 651 #define CaptureMSP432_P7_7_TA0 ((PMAP_TA0CCR1A << CAPTUREMSP432_PMAP_OFS) | \ 652 0x77 | (INT_TA0_N << CAPTUREMSP432_INT_OFS) | \ 653 (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS)) 660 #define CaptureMSP432_P7_7_TA1 ((PMAP_TA1CCR1A << CAPTUREMSP432_PMAP_OFS) | \ 661 0x77 | (INT_TA1_N << CAPTUREMSP432_INT_OFS) | \ 662 (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS)) 669 #define CaptureMSP432_P8_0_TA1 (0x80 | (INT_TA1_0 << CAPTUREMSP432_INT_OFS) | \ 670 (TIMER_A_CAPTURECOMPARE_REGISTER_0 << CAPTUREMSP432_CCR_OFS)) 677 #define CaptureMSP432_P8_1_TA2 (0x81 | (INT_TA2_0 << CAPTUREMSP432_INT_OFS) | \ 678 (TIMER_A_CAPTURECOMPARE_REGISTER_0 << CAPTUREMSP432_CCR_OFS)) 685 #define CaptureMSP432_P8_2_TA3 (0x82 | (INT_TA3_N << CAPTUREMSP432_INT_OFS) | \ 686 (TIMER_A_CAPTURECOMPARE_REGISTER_2 << CAPTUREMSP432_CCR_OFS)) 693 #define CaptureMSP432_P9_2_TA3 (0x92 | (INT_TA3_N << CAPTUREMSP432_INT_OFS) | \ 694 (TIMER_A_CAPTURECOMPARE_REGISTER_3 << CAPTUREMSP432_CCR_OFS)) 701 #define CaptureMSP432_P9_3_TA3 (0x93 | (INT_TA3_N << CAPTUREMSP432_INT_OFS) | \ 702 (TIMER_A_CAPTURECOMPARE_REGISTER_4 << CAPTUREMSP432_CCR_OFS)) 709 #define CaptureMSP432_P10_4_TA3 (0xA4 | (INT_TA3_0 << CAPTUREMSP432_INT_OFS) | \ 710 (TIMER_A_CAPTURECOMPARE_REGISTER_0 << CAPTUREMSP432_CCR_OFS)) 717 #define CaptureMSP432_P10_5_TA3 (0xA5 | (INT_TA3_1 << CAPTUREMSP432_INT_OFS) | \ 718 (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS)) CaptureMSP432 Hardware Attributes.
Definition: CaptureMSP432.h:751
Timer driver interface for MSP432 devices.
const Capture_FxnTable CaptureMSP432_captureFxnTable
enum Capture_PeriodUnits_ Capture_PeriodUnits
Capture period unit enum.
uint32_t clockSource
Definition: CaptureMSP432.h:756
bool isRunning
Definition: CaptureMSP432.h:780
struct CaptureMSP432_Object_ CaptureMSP432_Object
CaptureMSP432 Object.
Capture_CallBackFxn callBack
Definition: CaptureMSP432.h:776
uint32_t ccrRegister
Definition: CaptureMSP432.h:779
CaptureMSP432 Object.
Definition: CaptureMSP432.h:774
uint32_t clockDivider
Definition: CaptureMSP432.h:759
uint32_t capturePort
Definition: CaptureMSP432.h:763
uint32_t timerBaseAddress
Definition: CaptureMSP432.h:753
void(* Capture_CallBackFxn)(Capture_Handle handle, uint32_t interval)
Capture callback function.
Definition: Capture.h:267
The definition of a capture function table that contains the required set of functions to control a s...
Definition: Capture.h:330
uint32_t intPriority
Definition: CaptureMSP432.h:766
struct CaptureMSP432_HWAttrs_ CaptureMSP432_HWAttrs
CaptureMSP432 Hardware Attributes.
Capture_PeriodUnits periodUnits
Definition: CaptureMSP432.h:777
Capture driver interface.
HwiP_Handle hwiHandle
Definition: CaptureMSP432.h:775
uint32_t previousCount
Definition: CaptureMSP432.h:778