52 #ifndef ti_driver_capture_CaptureMSP432__include 53 #define ti_driver_capture_CaptureMSP432__include 60 #include <ti/drivers/dpl/HwiP.h> 68 #define CAPTUREMSP432_INT_OFS 24 69 #define CAPTUREMSP432_CCR_OFS 16 70 #define CAPTUREMSP432_PMAP_OFS 8 74 #define CaptureMSP432_P2_0_TA0 ((PMAP_TA0CCR1A << CAPTUREMSP432_PMAP_OFS) | \ 75 0x20 | (INT_TA0_N << CAPTUREMSP432_INT_OFS) | \ 76 (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS)) 77 #define CaptureMSP432_P2_0_TA1 ((PMAP_TA1CCR1A << CAPTUREMSP432_PMAP_OFS) | \ 78 0x20 | (INT_TA1_N << CAPTUREMSP432_INT_OFS) | \ 79 (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS)) 80 #define CaptureMSP432_P2_1_TA0 ((PMAP_TA0CCR1A << CAPTUREMSP432_PMAP_OFS) | \ 81 0x21 | (INT_TA0_N << CAPTUREMSP432_INT_OFS) | \ 82 (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS)) 83 #define CaptureMSP432_P2_1_TA1 ((PMAP_TA1CCR1A << CAPTUREMSP432_PMAP_OFS) | \ 84 0x21 | (INT_TA2_N << CAPTUREMSP432_INT_OFS) | \ 85 (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS)) 86 #define CaptureMSP432_P2_2_TA0 ((PMAP_TA0CCR1A << CAPTUREMSP432_PMAP_OFS) | \ 87 0x22 | (INT_TA0_N << CAPTUREMSP432_INT_OFS) | \ 88 (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS)) 89 #define CaptureMSP432_P2_2_TA1 ((PMAP_TA1CCR1A << CAPTUREMSP432_PMAP_OFS) | \ 90 0x22 | (INT_TA1_N << CAPTUREMSP432_INT_OFS) | \ 91 (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS)) 92 #define CaptureMSP432_P2_3_TA0 ((PMAP_TA0CCR1A << CAPTUREMSP432_PMAP_OFS) | \ 93 0x23 | (INT_TA0_N << CAPTUREMSP432_INT_OFS) | \ 94 (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS)) 95 #define CaptureMSP432_P2_3_TA1 ((PMAP_TA1CCR1A << CAPTUREMSP432_PMAP_OFS) | \ 96 0x23 | (INT_TA1_N << CAPTUREMSP432_INT_OFS) | \ 97 (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS)) 98 #define CaptureMSP432_P2_4_TA0 ((PMAP_TA0CCR1A << CAPTUREMSP432_PMAP_OFS) | \ 99 0x24 | (INT_TA0_N << CAPTUREMSP432_INT_OFS) | \ 100 (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS)) 101 #define CaptureMSP432_P2_4_TA1 ((PMAP_TA1CCR1A << CAPTUREMSP432_PMAP_OFS) | \ 102 0x24 | (INT_TA1_N << CAPTUREMSP432_INT_OFS) | \ 103 (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS)) 104 #define CaptureMSP432_P2_5_TA0 ((PMAP_TA0CCR1A << CAPTUREMSP432_PMAP_OFS) | \ 105 0x25 | (INT_TA0_N << CAPTUREMSP432_INT_OFS) | \ 106 (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS)) 107 #define CaptureMSP432_P2_5_TA1 ((PMAP_TA1CCR1A << CAPTUREMSP432_PMAP_OFS) | \ 108 0x25 | (INT_TA1_N << CAPTUREMSP432_INT_OFS) | \ 109 (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS)) 110 #define CaptureMSP432_P2_6_TA0 ((PMAP_TA0CCR1A << CAPTUREMSP432_PMAP_OFS) | \ 111 0x26 | (INT_TA0_N << CAPTUREMSP432_INT_OFS) | \ 112 (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS)) 113 #define CaptureMSP432_P2_6_TA1 ((PMAP_TA1CCR1A << CAPTUREMSP432_PMAP_OFS) | \ 114 0x26 | (INT_TA1_N << CAPTUREMSP432_INT_OFS) | \ 115 (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS)) 116 #define CaptureMSP432_P2_7_TA0 ((PMAP_TA0CCR1A << CAPTUREMSP432_PMAP_OFS) | \ 117 0x27 | (INT_TA0_N << CAPTUREMSP432_INT_OFS) | \ 118 (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS)) 119 #define CaptureMSP432_P2_7_TA1 ((PMAP_TA1CCR1A << CAPTUREMSP432_PMAP_OFS) | \ 120 0x27 | (INT_TA1_N << CAPTUREMSP432_INT_OFS) | \ 121 (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS)) 124 #define CaptureMSP432_P3_0_TA0 ((PMAP_TA0CCR1A << CAPTUREMSP432_PMAP_OFS) | \ 125 0x30 | (INT_TA0_N << CAPTUREMSP432_INT_OFS) | \ 126 (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS)) 127 #define CaptureMSP432_P3_0_TA1 ((PMAP_TA1CCR1A << CAPTUREMSP432_PMAP_OFS) | \ 128 0x30 | (INT_TA1_N << CAPTUREMSP432_INT_OFS) | \ 129 (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS)) 130 #define CaptureMSP432_P3_1_TA0 ((PMAP_TA0CCR1A << CAPTUREMSP432_PMAP_OFS) | \ 131 0x31 | (INT_TA0_N << CAPTUREMSP432_INT_OFS) | \ 132 (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS)) 133 #define CaptureMSP432_P3_1_TA1 ((PMAP_TA1CCR1A << CAPTUREMSP432_PMAP_OFS) | \ 134 0x31 | (INT_TA1_N << CAPTUREMSP432_INT_OFS) | \ 135 (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS)) 136 #define CaptureMSP432_P3_2_TA0 ((PMAP_TA0CCR1A << CAPTUREMSP432_PMAP_OFS) | \ 137 0x32 | (INT_TA0_N << CAPTUREMSP432_INT_OFS) | \ 138 (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS)) 139 #define CaptureMSP432_P3_2_TA1 ((PMAP_TA1CCR1A << CAPTUREMSP432_PMAP_OFS) | \ 140 0x32 | (INT_TA1_N << CAPTUREMSP432_INT_OFS) | \ 141 (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS)) 142 #define CaptureMSP432_P3_3_TA0 ((PMAP_TA0CCR1A << CAPTUREMSP432_PMAP_OFS) | \ 143 0x33 | (INT_TA0_N << CAPTUREMSP432_INT_OFS) | \ 144 (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS)) 145 #define CaptureMSP432_P3_3_TA1 ((PMAP_TA1CCR1A << CAPTUREMSP432_PMAP_OFS) | \ 146 0x33 | (INT_TA1_N << CAPTUREMSP432_INT_OFS) | \ 147 (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS)) 148 #define CaptureMSP432_P3_4_TA0 ((PMAP_TA0CCR1A << CAPTUREMSP432_PMAP_OFS) | \ 149 0x34 | (INT_TA0_N << CAPTUREMSP432_INT_OFS) | \ 150 (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS)) 151 #define CaptureMSP432_P3_4_TA1 ((PMAP_TA1CCR1A << CAPTUREMSP432_PMAP_OFS) | \ 152 0x34 | (INT_TA1_N << CAPTUREMSP432_INT_OFS) | \ 153 (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS)) 154 #define CaptureMSP432_P3_5_TA0 ((PMAP_TA0CCR1A << CAPTUREMSP432_PMAP_OFS) | \ 155 0x35 | (INT_TA0_N << CAPTUREMSP432_INT_OFS) | \ 156 (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS)) 157 #define CaptureMSP432_P3_5_TA1 ((PMAP_TA1CCR1A << CAPTUREMSP432_PMAP_OFS) | \ 158 0x35 | (INT_TA1_N << CAPTUREMSP432_INT_OFS) | \ 159 (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS)) 160 #define CaptureMSP432_P3_6_TA0 ((PMAP_TA0CCR1A << CAPTUREMSP432_PMAP_OFS) | \ 161 0x36 | (INT_TA0_N << CAPTUREMSP432_INT_OFS) | \ 162 (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS)) 163 #define CaptureMSP432_P3_6_TA1 ((PMAP_TA1CCR1A << CAPTUREMSP432_PMAP_OFS) | \ 164 0x36 | (INT_TA1_N << CAPTUREMSP432_INT_OFS) | \ 165 (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS)) 166 #define CaptureMSP432_P3_7_TA0 ((PMAP_TA0CCR1A << CAPTUREMSP432_PMAP_OFS) | \ 167 0x37 | (INT_TA0_N << CAPTUREMSP432_INT_OFS) | \ 168 (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS)) 169 #define CaptureMSP432_P3_7_TA1 ((PMAP_TA1CCR1A << CAPTUREMSP432_PMAP_OFS) | \ 170 0x37 | (INT_TA1_N << CAPTUREMSP432_INT_OFS) | \ 171 (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS)) 174 #define CaptureMSP432_P5_6_TA2 (0x56 | (INT_TA2_N << CAPTUREMSP432_INT_OFS) | \ 175 (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS)) 176 #define CaptureMSP432_P5_7_TA2 (0x57 | (INT_TA2_N << CAPTUREMSP432_INT_OFS) | \ 177 (TIMER_A_CAPTURECOMPARE_REGISTER_2 << CAPTUREMSP432_CCR_OFS)) 180 #define CaptureMSP432_P6_6_TA2 (0x66 | (INT_TA2_N << CAPTUREMSP432_INT_OFS) | \ 181 (TIMER_A_CAPTURECOMPARE_REGISTER_3 << CAPTUREMSP432_CCR_OFS)) 182 #define CaptureMSP432_P6_7_TA2 (0x67 | (INT_TA2_N << CAPTUREMSP432_INT_OFS) | \ 183 (TIMER_A_CAPTURECOMPARE_REGISTER_4 << CAPTUREMSP432_CCR_OFS)) 186 #define CaptureMSP432_P7_0_TA0 ((PMAP_TA0CCR1A << CAPTUREMSP432_PMAP_OFS) | \ 187 0x70 | (INT_TA0_N << CAPTUREMSP432_INT_OFS) | \ 188 (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS)) 189 #define CaptureMSP432_P7_0_TA1 ((PMAP_TA1CCR1A << CAPTUREMSP432_PMAP_OFS) | \ 190 0x70 | (INT_TA1_N << CAPTUREMSP432_INT_OFS) | \ 191 (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS)) 192 #define CaptureMSP432_P7_1_TA0 ((PMAP_TA0CCR1A << CAPTUREMSP432_PMAP_OFS) | \ 193 0x71 | (INT_TA0_N << CAPTUREMSP432_INT_OFS) | \ 194 (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS)) 195 #define CaptureMSP432_P7_1_TA1 ((PMAP_TA1CCR1A << CAPTUREMSP432_PMAP_OFS) | \ 196 0x71 | (INT_TA1_N << CAPTUREMSP432_INT_OFS) | \ 197 (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS)) 198 #define CaptureMSP432_P7_2_TA0 ((PMAP_TA0CCR1A << CAPTUREMSP432_PMAP_OFS) | \ 199 0x72 | (INT_TA0_N << CAPTUREMSP432_INT_OFS) | \ 200 (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS)) 201 #define CaptureMSP432_P7_2_TA1 ((PMAP_TA1CCR1A << CAPTUREMSP432_PMAP_OFS) | \ 202 0x72 | (INT_TA1_N << CAPTUREMSP432_INT_OFS) | \ 203 (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS)) 204 #define CaptureMSP432_P7_3_TA0 ((PMAP_TA0CCR1A << CAPTUREMSP432_PMAP_OFS) | \ 205 0x73 | (INT_TA0_N << CAPTUREMSP432_INT_OFS) | \ 206 (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS)) 207 #define CaptureMSP432_P7_3_TA1 ((PMAP_TA1CCR1A << CAPTUREMSP432_PMAP_OFS) | \ 208 0x73 | (INT_TA1_N << CAPTUREMSP432_INT_OFS) | \ 209 (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS)) 210 #define CaptureMSP432_P7_4_TA0 ((PMAP_TA0CCR1A << CAPTUREMSP432_PMAP_OFS) | \ 211 0x74 | (INT_TA0_N << CAPTUREMSP432_INT_OFS) | \ 212 (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS)) 213 #define CaptureMSP432_P7_4_TA1 ((PMAP_TA1CCR1A << CAPTUREMSP432_PMAP_OFS) | \ 214 0x74 | (INT_TA1_N << CAPTUREMSP432_INT_OFS) | \ 215 (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS)) 216 #define CaptureMSP432_P7_5_TA0 ((PMAP_TA0CCR1A << CAPTUREMSP432_PMAP_OFS) | \ 217 0x75 | (INT_TA0_N << CAPTUREMSP432_INT_OFS) | \ 218 (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS)) 219 #define CaptureMSP432_P7_5_TA1 ((PMAP_TA1CCR1A << CAPTUREMSP432_PMAP_OFS) | \ 220 0x75 | (INT_TA1_N << CAPTUREMSP432_INT_OFS) | \ 221 (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS)) 222 #define CaptureMSP432_P7_6_TA0 ((PMAP_TA0CCR1A << CAPTUREMSP432_PMAP_OFS) | \ 223 0x76 | (INT_TA0_N << CAPTUREMSP432_INT_OFS) | \ 224 (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS)) 225 #define CaptureMSP432_P7_6_TA1 ((PMAP_TA1CCR1A << CAPTUREMSP432_PMAP_OFS) | \ 226 0x76 | (INT_TA1_N << CAPTUREMSP432_INT_OFS) | \ 227 (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS)) 228 #define CaptureMSP432_P7_7_TA0 ((PMAP_TA0CCR1A << CAPTUREMSP432_PMAP_OFS) | \ 229 0x77 | (INT_TA0_N << CAPTUREMSP432_INT_OFS) | \ 230 (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS)) 231 #define CaptureMSP432_P7_7_TA1 ((PMAP_TA1CCR1A << CAPTUREMSP432_PMAP_OFS) | \ 232 0x77 | (INT_TA1_N << CAPTUREMSP432_INT_OFS) | \ 233 (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS)) 236 #define CaptureMSP432_P8_0_TA1 (0x80 | (INT_TA1_0 << CAPTUREMSP432_INT_OFS) | \ 237 (TIMER_A_CAPTURECOMPARE_REGISTER_0 << CAPTUREMSP432_CCR_OFS)) 238 #define CaptureMSP432_P8_1_TA2 (0x81 | (INT_TA2_0 << CAPTUREMSP432_INT_OFS) | \ 239 (TIMER_A_CAPTURECOMPARE_REGISTER_0 << CAPTUREMSP432_CCR_OFS)) 240 #define CaptureMSP432_P8_2_TA3 (0x82 | (INT_TA3_N << CAPTUREMSP432_INT_OFS) | \ 241 (TIMER_A_CAPTURECOMPARE_REGISTER_2 << CAPTUREMSP432_CCR_OFS)) 244 #define CaptureMSP432_P9_2_TA3 (0x92 | (INT_TA3_N << CAPTUREMSP432_INT_OFS) | \ 245 (TIMER_A_CAPTURECOMPARE_REGISTER_3 << CAPTUREMSP432_CCR_OFS)) 246 #define CaptureMSP432_P9_3_TA3 (0x93 | (INT_TA3_N << CAPTUREMSP432_INT_OFS) | \ 247 (TIMER_A_CAPTURECOMPARE_REGISTER_4 << CAPTUREMSP432_CCR_OFS)) 250 #define CaptureMSP432_P10_4_TA3 (0xA4 | (INT_TA3_0 << CAPTUREMSP432_INT_OFS) | \ 251 (TIMER_A_CAPTURECOMPARE_REGISTER_0 << CAPTUREMSP432_CCR_OFS)) 252 #define CaptureMSP432_P10_5_TA3 (0xA5 | (INT_TA3_1 << CAPTUREMSP432_INT_OFS) | \ 253 (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS)) 305 uint_fast16_t cmd,
void *arg);
void CaptureMSP432_init(Capture_Handle handle)
struct CaptureMSP432_Object CaptureMSP432_Object
CaptureMSP432 Object Driver specific structure that takes care of various driver parameters such as h...
const uint8_t Capture_count
Capture Global configuration.
Definition: Capture.h:361
int32_t CaptureMSP432_start(Capture_Handle handle)
uint32_t captureCount
Definition: CaptureMSP432.h:297
Capture Parameters.
Definition: Capture.h:276
Timer driver interface for MSP432 devices.
struct CaptureMSP432_HWAttrs CaptureMSP432_HWAttrs
CaptureMSP432 Hardware Attributes.
Capture_CallBackFxn callBack
Definition: CaptureMSP432.h:295
uint32_t timerBaseAddress
Definition: CaptureMSP432.h:277
Capture_FxnTable CaptureMSP432_captureFxnTable
CaptureMSP432_Object captureMSP432Objects[]
uint32_t capturePort
Definition: CaptureMSP432.h:280
uint32_t ccrRegister
Definition: CaptureMSP432.h:298
void CaptureMSP432_stop(Capture_Handle handle)
HwiP_Params hwiParams
Definition: CaptureMSP432.h:293
void CaptureMSP432_close(Capture_Handle handle)
uint32_t clockDivider
Definition: CaptureMSP432.h:279
int_fast16_t CaptureMSP432_control(Capture_Handle handle, uint_fast16_t cmd, void *arg)
TimerMSP432 Object Driver specific structure that takes care of various driver parameters such as har...
Definition: TimerMSP432.h:105
uint32_t intPriority
Definition: CaptureMSP432.h:281
void(* Capture_CallBackFxn)(Capture_Handle handle, uint32_t interval)
Capture callback function.
Definition: Capture.h:267
The definition of a capture function table that contains the required set of functions to control a s...
Definition: Capture.h:330
Capture_Config * config
Definition: CaptureMSP432.h:292
CaptureMSP432 Object Driver specific structure that takes care of various driver parameters such as h...
Definition: CaptureMSP432.h:290
Capture_Period_Unit periodUnits
Definition: CaptureMSP432.h:296
HwiP_Handle hwiHandle
Definition: CaptureMSP432.h:294
uint32_t clockSource
Definition: CaptureMSP432.h:278
CaptureMSP432 Hardware Attributes.
Definition: CaptureMSP432.h:275
bool isRunning
Definition: CaptureMSP432.h:300
Capture driver interface.
Capture_Handle CaptureMSP432_open(Capture_Handle handle, Capture_Params *params)
#define Capture_Period_Unit
Definition: Capture.h:495
uint32_t intNum
Definition: CaptureMSP432.h:299
TimerMSP432_Object timerMSP432Objects[]