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CC27xxDriverLibrary
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Go to the source code of this file.
| #define EVTSVT_O_DESC 0x00000000U |
| #define EVTSVT_O_DESCEX 0x00000004U |
| #define EVTSVT_O_DTB 0x00000064U |
| #define EVTSVT_O_NMI 0x00000400U |
| #define EVTSVT_O_CPUIRQ0SEL 0x00000404U |
| #define EVTSVT_O_CPUIRQ1SEL 0x00000408U |
| #define EVTSVT_O_CPUIRQ2SEL 0x0000040CU |
| #define EVTSVT_O_CPUIRQ3SEL 0x00000410U |
| #define EVTSVT_O_CPUIRQ4SEL 0x00000414U |
| #define EVTSVT_O_CPUIRQ5SEL 0x00000418U |
| #define EVTSVT_O_CPUIRQ6SEL 0x0000041CU |
| #define EVTSVT_O_CPUIRQ7SEL 0x00000420U |
| #define EVTSVT_O_CPUIRQ8SEL 0x00000424U |
| #define EVTSVT_O_CPUIRQ9SEL 0x00000428U |
| #define EVTSVT_O_CPUIRQ10SEL 0x0000042CU |
| #define EVTSVT_O_CPUIRQ11SEL 0x00000430U |
| #define EVTSVT_O_CPUIRQ12SEL 0x00000434U |
| #define EVTSVT_O_CPUIRQ13SEL 0x00000438U |
| #define EVTSVT_O_CPUIRQ14SEL 0x0000043CU |
| #define EVTSVT_O_CPUIRQ15SEL 0x00000440U |
| #define EVTSVT_O_CPUIRQ16SEL 0x00000444U |
| #define EVTSVT_O_CPUIRQ17SEL 0x00000448U |
| #define EVTSVT_O_CPUIRQ18SEL 0x0000044CU |
| #define EVTSVT_O_CPUIRQ19SEL 0x00000450U |
| #define EVTSVT_O_CPUIRQ20SEL 0x00000454U |
| #define EVTSVT_O_CPUIRQ21SEL 0x00000458U |
| #define EVTSVT_O_CPUIRQ22SEL 0x0000045CU |
| #define EVTSVT_O_CPUIRQ23SEL 0x00000460U |
| #define EVTSVT_O_CPUIRQ24SEL 0x00000464U |
| #define EVTSVT_O_CPUIRQ25SEL 0x00000468U |
| #define EVTSVT_O_CPUIRQ26SEL 0x0000046CU |
| #define EVTSVT_O_CPUIRQ27SEL 0x00000470U |
| #define EVTSVT_O_CPUIRQ28SEL 0x00000474U |
| #define EVTSVT_O_CPUIRQ29SEL 0x00000478U |
| #define EVTSVT_O_CPUIRQ30SEL 0x0000047CU |
| #define EVTSVT_O_CPUIRQ31SEL 0x00000480U |
| #define EVTSVT_O_CPUIRQ32SEL 0x00000484U |
| #define EVTSVT_O_SYSTIMC0SEL 0x00000488U |
| #define EVTSVT_O_SYSTIMC1SEL 0x0000048CU |
| #define EVTSVT_O_SYSTIMC2SEL 0x00000490U |
| #define EVTSVT_O_SYSTIMC3SEL 0x00000494U |
| #define EVTSVT_O_SYSTIMC4SEL 0x00000498U |
| #define EVTSVT_O_SYSTIMC5SEL 0x0000049CU |
| #define EVTSVT_O_ADCTRGSEL 0x000004A0U |
| #define EVTSVT_O_LGPTSYNCSEL 0x000004A4U |
| #define EVTSVT_O_LGPT0IN0SEL 0x000004A8U |
| #define EVTSVT_O_LGPT0IN1SEL 0x000004ACU |
| #define EVTSVT_O_LGPT0IN2SEL 0x000004B0U |
| #define EVTSVT_O_LGPT0TENSEL 0x000004B4U |
| #define EVTSVT_O_LGPT1IN0SEL 0x000004B8U |
| #define EVTSVT_O_LGPT1IN1SEL 0x000004BCU |
| #define EVTSVT_O_LGPT1IN2SEL 0x000004C0U |
| #define EVTSVT_O_LGPT1TENSEL 0x000004C4U |
| #define EVTSVT_O_LGPT2IN0SEL 0x000004C8U |
| #define EVTSVT_O_LGPT2IN1SEL 0x000004CCU |
| #define EVTSVT_O_LGPT2IN2SEL 0x000004D0U |
| #define EVTSVT_O_LGPT2TENSEL 0x000004D4U |
| #define EVTSVT_O_LGPT3IN0SEL 0x000004D8U |
| #define EVTSVT_O_LGPT3IN1SEL 0x000004DCU |
| #define EVTSVT_O_LGPT3IN2SEL 0x000004E0U |
| #define EVTSVT_O_LGPT3TENSEL 0x000004E4U |
| #define EVTSVT_O_LRFDIN0SEL 0x000004E8U |
| #define EVTSVT_O_LRFDIN1SEL 0x000004ECU |
| #define EVTSVT_O_LRFDIN2SEL 0x000004F0U |
| #define EVTSVT_O_I2SSTMPSEL 0x000004F4U |
| #define EVTSVT_O_DMACH0SEL 0x00000C00U |
| #define EVTSVT_O_DMACH1SEL 0x00000C04U |
| #define EVTSVT_O_DMACH2SEL 0x00000C08U |
| #define EVTSVT_O_DMACH3SEL 0x00000C0CU |
| #define EVTSVT_O_DMACH4SEL 0x00000C10U |
| #define EVTSVT_O_DMACH5SEL 0x00000C14U |
| #define EVTSVT_O_DMACH6SEL 0x00000C18U |
| #define EVTSVT_O_DMACH7SEL 0x00000C1CU |
| #define EVTSVT_O_DMACH10SEL 0x00000C20U |
| #define EVTSVT_O_DMACH11SEL 0x00000C24U |
| #define EVTSVT_O_DMACH8SEL 0x00000C28U |
| #define EVTSVT_O_DMACH9SEL 0x00000C2CU |
| #define EVTSVT_DESC_MODID_W 16U |
| #define EVTSVT_DESC_MODID_M 0xFFFF0000U |
| #define EVTSVT_DESC_MODID_S 16U |
| #define EVTSVT_DESC_STDIPOFF_W 4U |
| #define EVTSVT_DESC_STDIPOFF_M 0x0000F000U |
| #define EVTSVT_DESC_STDIPOFF_S 12U |
| #define EVTSVT_DESC_INSTIDX_W 4U |
| #define EVTSVT_DESC_INSTIDX_M 0x00000F00U |
| #define EVTSVT_DESC_INSTIDX_S 8U |
| #define EVTSVT_DESC_MAJREV_W 4U |
| #define EVTSVT_DESC_MAJREV_M 0x000000F0U |
| #define EVTSVT_DESC_MAJREV_S 4U |
| #define EVTSVT_DESC_MINREV_W 4U |
| #define EVTSVT_DESC_MINREV_M 0x0000000FU |
| #define EVTSVT_DESC_MINREV_S 0U |
| #define EVTSVT_DESCEX_IDMA_W 10U |
| #define EVTSVT_DESCEX_IDMA_M 0xFFC00000U |
| #define EVTSVT_DESCEX_IDMA_S 22U |
| #define EVTSVT_DESCEX_NDMA_W 5U |
| #define EVTSVT_DESCEX_NDMA_M 0x003E0000U |
| #define EVTSVT_DESCEX_NDMA_S 17U |
| #define EVTSVT_DESCEX_PD 0x00010000U |
| #define EVTSVT_DESCEX_PD_M 0x00010000U |
| #define EVTSVT_DESCEX_PD_S 16U |
| #define EVTSVT_DESCEX_NSUB_W 8U |
| #define EVTSVT_DESCEX_NSUB_M 0x0000FF00U |
| #define EVTSVT_DESCEX_NSUB_S 8U |
| #define EVTSVT_DESCEX_NPUB_W 8U |
| #define EVTSVT_DESCEX_NPUB_M 0x000000FFU |
| #define EVTSVT_DESCEX_NPUB_S 0U |
| #define EVTSVT_DTB_SEL_W 2U |
| #define EVTSVT_DTB_SEL_M 0x00000003U |
| #define EVTSVT_DTB_SEL_S 0U |
| #define EVTSVT_DTB_SEL_DIS 0x00000000U |
| #define EVTSVT_NMI_SRAM_EVT_SET 0x00010000U |
| #define EVTSVT_NMI_SRAM_EVT_SET_M 0x00010000U |
| #define EVTSVT_NMI_SRAM_EVT_SET_S 16U |
| #define EVTSVT_NMI_SRAM_EVT_STA 0x00000001U |
| #define EVTSVT_NMI_SRAM_EVT_STA_M 0x00000001U |
| #define EVTSVT_NMI_SRAM_EVT_STA_S 0U |
| #define EVTSVT_CPUIRQ0SEL_PUBID_W 7U |
| #define EVTSVT_CPUIRQ0SEL_PUBID_M 0x0000007FU |
| #define EVTSVT_CPUIRQ0SEL_PUBID_S 0U |
| #define EVTSVT_CPUIRQ0SEL_PUBID_SYSTIM5 0x0000004CU |
| #define EVTSVT_CPUIRQ0SEL_PUBID_GPIO_EVT1 0x0000004BU |
| #define EVTSVT_CPUIRQ0SEL_PUBID_VCE_IRQ 0x00000046U |
| #define EVTSVT_CPUIRQ0SEL_PUBID_SPI1_COMB 0x00000045U |
| #define EVTSVT_CPUIRQ0SEL_PUBID_CAN_EVT 0x00000044U |
| #define EVTSVT_CPUIRQ0SEL_PUBID_CAN_IRQ 0x00000043U |
| #define EVTSVT_CPUIRQ0SEL_PUBID_I2S_IRQ 0x00000042U |
| #define EVTSVT_CPUIRQ0SEL_PUBID_LGPT3_ADC 0x00000041U |
| #define EVTSVT_CPUIRQ0SEL_PUBID_LGPT3_DMA 0x00000040U |
| #define EVTSVT_CPUIRQ0SEL_PUBID_LGPT3_COMB 0x0000003FU |
| #define EVTSVT_CPUIRQ0SEL_PUBID_LGPT3C2 0x0000003EU |
| #define EVTSVT_CPUIRQ0SEL_PUBID_LGPT3C1 0x0000003DU |
| #define EVTSVT_CPUIRQ0SEL_PUBID_LGPT3C0 0x0000003CU |
| #define EVTSVT_CPUIRQ0SEL_PUBID_LGPT2_ADC 0x0000003BU |
| #define EVTSVT_CPUIRQ0SEL_PUBID_LGPT2_DMA 0x0000003AU |
| #define EVTSVT_CPUIRQ0SEL_PUBID_LGPT2_COMB 0x00000039U |
| #define EVTSVT_CPUIRQ0SEL_PUBID_LGPT2C2 0x00000038U |
| #define EVTSVT_CPUIRQ0SEL_PUBID_LGPT2C1 0x00000037U |
| #define EVTSVT_CPUIRQ0SEL_PUBID_LGPT2C0 0x00000036U |
| #define EVTSVT_CPUIRQ0SEL_PUBID_UART1_COMB 0x00000035U |
| #define EVTSVT_CPUIRQ0SEL_PUBID_LRFD_EVT2 0x00000034U |
| #define EVTSVT_CPUIRQ0SEL_PUBID_LRFD_EVT1 0x00000033U |
| #define EVTSVT_CPUIRQ0SEL_PUBID_LRFD_EVT0 0x00000032U |
| #define EVTSVT_CPUIRQ0SEL_PUBID_LGPT1_ADC 0x00000031U |
| #define EVTSVT_CPUIRQ0SEL_PUBID_LGPT1_DMA 0x00000030U |
| #define EVTSVT_CPUIRQ0SEL_PUBID_LGPT1C2 0x0000002FU |
| #define EVTSVT_CPUIRQ0SEL_PUBID_LGPT1C1 0x0000002EU |
| #define EVTSVT_CPUIRQ0SEL_PUBID_LGPT1C0 0x0000002DU |
| #define EVTSVT_CPUIRQ0SEL_PUBID_LGPT0_ADC 0x0000002CU |
| #define EVTSVT_CPUIRQ0SEL_PUBID_LGPT0_DMA 0x0000002BU |
| #define EVTSVT_CPUIRQ0SEL_PUBID_LGPT0C2 0x0000002AU |
| #define EVTSVT_CPUIRQ0SEL_PUBID_LGPT0C1 0x00000029U |
| #define EVTSVT_CPUIRQ0SEL_PUBID_LGPT0C0 0x00000028U |
| #define EVTSVT_CPUIRQ0SEL_PUBID_SYSTIM4 0x00000027U |
| #define EVTSVT_CPUIRQ0SEL_PUBID_SYSTIM3 0x00000026U |
| #define EVTSVT_CPUIRQ0SEL_PUBID_SYSTIM2 0x00000025U |
| #define EVTSVT_CPUIRQ0SEL_PUBID_SYSTIM1 0x00000024U |
| #define EVTSVT_CPUIRQ0SEL_PUBID_SYSTIM0 0x00000023U |
| #define EVTSVT_CPUIRQ0SEL_PUBID_SYSTIM_LT 0x00000022U |
| #define EVTSVT_CPUIRQ0SEL_PUBID_SYSTIM_HB 0x00000021U |
| #define EVTSVT_CPUIRQ0SEL_PUBID_I2C0_IRQ 0x00000020U |
| #define EVTSVT_CPUIRQ0SEL_PUBID_UART0_COMB 0x0000001FU |
| #define EVTSVT_CPUIRQ0SEL_PUBID_AES_COMB 0x0000001EU |
| #define EVTSVT_CPUIRQ0SEL_PUBID_DMA_ERR 0x0000001DU |
| #define EVTSVT_CPUIRQ0SEL_PUBID_DMA_DONE_COMB 0x0000001CU |
| #define EVTSVT_CPUIRQ0SEL_PUBID_LGPT1_COMB 0x0000001BU |
| #define EVTSVT_CPUIRQ0SEL_PUBID_LGPT0_COMB 0x0000001AU |
| #define EVTSVT_CPUIRQ0SEL_PUBID_ADC_EVT 0x00000019U |
| #define EVTSVT_CPUIRQ0SEL_PUBID_ADC_COMB 0x00000018U |
| #define EVTSVT_CPUIRQ0SEL_PUBID_SPI0_COMB 0x00000017U |
| #define EVTSVT_CPUIRQ0SEL_PUBID_LRFD_IRQ2 0x00000016U |
| #define EVTSVT_CPUIRQ0SEL_PUBID_LRFD_IRQ1 0x00000015U |
| #define EVTSVT_CPUIRQ0SEL_PUBID_LRFD_IRQ0 0x00000014U |
| #define EVTSVT_CPUIRQ0SEL_PUBID_FLASH_IRQ 0x00000013U |
| #define EVTSVT_CPUIRQ0SEL_PUBID_GPIO_EVT 0x00000012U |
| #define EVTSVT_CPUIRQ0SEL_PUBID_GPIO_COMB 0x00000011U |
| #define EVTSVT_CPUIRQ0SEL_PUBID_SYSTIM_COMB 0x00000010U |
| #define EVTSVT_CPUIRQ0SEL_PUBID_AON_IOC_COMB 0x00000007U |
| #define EVTSVT_CPUIRQ0SEL_PUBID_AON_LPMCMP_IRQ 0x00000006U |
| #define EVTSVT_CPUIRQ0SEL_PUBID_AON_DBG_COMB 0x00000005U |
| #define EVTSVT_CPUIRQ0SEL_PUBID_AON_RTC_COMB 0x00000004U |
| #define EVTSVT_CPUIRQ0SEL_PUBID_AON_CKM_COMB 0x00000003U |
| #define EVTSVT_CPUIRQ0SEL_PUBID_AON_PMU_COMB 0x00000002U |
| #define EVTSVT_CPUIRQ0SEL_PUBID_NONE 0x00000000U |
| #define EVTSVT_CPUIRQ1SEL_PUBID_W 7U |
| #define EVTSVT_CPUIRQ1SEL_PUBID_M 0x0000007FU |
| #define EVTSVT_CPUIRQ1SEL_PUBID_S 0U |
| #define EVTSVT_CPUIRQ1SEL_PUBID_SYSTIM5 0x0000004CU |
| #define EVTSVT_CPUIRQ1SEL_PUBID_GPIO_EVT1 0x0000004BU |
| #define EVTSVT_CPUIRQ1SEL_PUBID_VCE_IRQ 0x00000046U |
| #define EVTSVT_CPUIRQ1SEL_PUBID_SPI1_COMB 0x00000045U |
| #define EVTSVT_CPUIRQ1SEL_PUBID_CAN_EVT 0x00000044U |
| #define EVTSVT_CPUIRQ1SEL_PUBID_CAN_IRQ 0x00000043U |
| #define EVTSVT_CPUIRQ1SEL_PUBID_I2S_IRQ 0x00000042U |
| #define EVTSVT_CPUIRQ1SEL_PUBID_LGPT3_ADC 0x00000041U |
| #define EVTSVT_CPUIRQ1SEL_PUBID_LGPT3_DMA 0x00000040U |
| #define EVTSVT_CPUIRQ1SEL_PUBID_LGPT3_COMB 0x0000003FU |
| #define EVTSVT_CPUIRQ1SEL_PUBID_LGPT3C2 0x0000003EU |
| #define EVTSVT_CPUIRQ1SEL_PUBID_LGPT3C1 0x0000003DU |
| #define EVTSVT_CPUIRQ1SEL_PUBID_LGPT3C0 0x0000003CU |
| #define EVTSVT_CPUIRQ1SEL_PUBID_LGPT2_ADC 0x0000003BU |
| #define EVTSVT_CPUIRQ1SEL_PUBID_LGPT2_DMA 0x0000003AU |
| #define EVTSVT_CPUIRQ1SEL_PUBID_LGPT2_COMB 0x00000039U |
| #define EVTSVT_CPUIRQ1SEL_PUBID_LGPT2C2 0x00000038U |
| #define EVTSVT_CPUIRQ1SEL_PUBID_LGPT2C1 0x00000037U |
| #define EVTSVT_CPUIRQ1SEL_PUBID_LGPT2C0 0x00000036U |
| #define EVTSVT_CPUIRQ1SEL_PUBID_UART1_COMB 0x00000035U |
| #define EVTSVT_CPUIRQ1SEL_PUBID_LRFD_EVT2 0x00000034U |
| #define EVTSVT_CPUIRQ1SEL_PUBID_LRFD_EVT1 0x00000033U |
| #define EVTSVT_CPUIRQ1SEL_PUBID_LRFD_EVT0 0x00000032U |
| #define EVTSVT_CPUIRQ1SEL_PUBID_LGPT1_ADC 0x00000031U |
| #define EVTSVT_CPUIRQ1SEL_PUBID_LGPT1_DMA 0x00000030U |
| #define EVTSVT_CPUIRQ1SEL_PUBID_LGPT1C2 0x0000002FU |
| #define EVTSVT_CPUIRQ1SEL_PUBID_LGPT1C1 0x0000002EU |
| #define EVTSVT_CPUIRQ1SEL_PUBID_LGPT1C0 0x0000002DU |
| #define EVTSVT_CPUIRQ1SEL_PUBID_LGPT0_ADC 0x0000002CU |
| #define EVTSVT_CPUIRQ1SEL_PUBID_LGPT0_DMA 0x0000002BU |
| #define EVTSVT_CPUIRQ1SEL_PUBID_LGPT0C2 0x0000002AU |
| #define EVTSVT_CPUIRQ1SEL_PUBID_LGPT0C1 0x00000029U |
| #define EVTSVT_CPUIRQ1SEL_PUBID_LGPT0C0 0x00000028U |
| #define EVTSVT_CPUIRQ1SEL_PUBID_SYSTIM4 0x00000027U |
| #define EVTSVT_CPUIRQ1SEL_PUBID_SYSTIM3 0x00000026U |
| #define EVTSVT_CPUIRQ1SEL_PUBID_SYSTIM2 0x00000025U |
| #define EVTSVT_CPUIRQ1SEL_PUBID_SYSTIM1 0x00000024U |
| #define EVTSVT_CPUIRQ1SEL_PUBID_SYSTIM0 0x00000023U |
| #define EVTSVT_CPUIRQ1SEL_PUBID_SYSTIM_LT 0x00000022U |
| #define EVTSVT_CPUIRQ1SEL_PUBID_SYSTIM_HB 0x00000021U |
| #define EVTSVT_CPUIRQ1SEL_PUBID_I2C0_IRQ 0x00000020U |
| #define EVTSVT_CPUIRQ1SEL_PUBID_UART0_COMB 0x0000001FU |
| #define EVTSVT_CPUIRQ1SEL_PUBID_AES_COMB 0x0000001EU |
| #define EVTSVT_CPUIRQ1SEL_PUBID_DMA_ERR 0x0000001DU |
| #define EVTSVT_CPUIRQ1SEL_PUBID_DMA_DONE_COMB 0x0000001CU |
| #define EVTSVT_CPUIRQ1SEL_PUBID_LGPT1_COMB 0x0000001BU |
| #define EVTSVT_CPUIRQ1SEL_PUBID_LGPT0_COMB 0x0000001AU |
| #define EVTSVT_CPUIRQ1SEL_PUBID_ADC_EVT 0x00000019U |
| #define EVTSVT_CPUIRQ1SEL_PUBID_ADC_COMB 0x00000018U |
| #define EVTSVT_CPUIRQ1SEL_PUBID_SPI0_COMB 0x00000017U |
| #define EVTSVT_CPUIRQ1SEL_PUBID_LRFD_IRQ2 0x00000016U |
| #define EVTSVT_CPUIRQ1SEL_PUBID_LRFD_IRQ1 0x00000015U |
| #define EVTSVT_CPUIRQ1SEL_PUBID_LRFD_IRQ0 0x00000014U |
| #define EVTSVT_CPUIRQ1SEL_PUBID_FLASH_IRQ 0x00000013U |
| #define EVTSVT_CPUIRQ1SEL_PUBID_GPIO_EVT 0x00000012U |
| #define EVTSVT_CPUIRQ1SEL_PUBID_GPIO_COMB 0x00000011U |
| #define EVTSVT_CPUIRQ1SEL_PUBID_SYSTIM_COMB 0x00000010U |
| #define EVTSVT_CPUIRQ1SEL_PUBID_AON_IOC_COMB 0x00000007U |
| #define EVTSVT_CPUIRQ1SEL_PUBID_AON_LPMCMP_IRQ 0x00000006U |
| #define EVTSVT_CPUIRQ1SEL_PUBID_AON_DBG_COMB 0x00000005U |
| #define EVTSVT_CPUIRQ1SEL_PUBID_AON_RTC_COMB 0x00000004U |
| #define EVTSVT_CPUIRQ1SEL_PUBID_AON_CKM_COMB 0x00000003U |
| #define EVTSVT_CPUIRQ1SEL_PUBID_AON_PMU_COMB 0x00000002U |
| #define EVTSVT_CPUIRQ1SEL_PUBID_NONE 0x00000000U |
| #define EVTSVT_CPUIRQ2SEL_PUBID_W 7U |
| #define EVTSVT_CPUIRQ2SEL_PUBID_M 0x0000007FU |
| #define EVTSVT_CPUIRQ2SEL_PUBID_S 0U |
| #define EVTSVT_CPUIRQ2SEL_PUBID_SYSTIM5 0x0000004CU |
| #define EVTSVT_CPUIRQ2SEL_PUBID_GPIO_EVT1 0x0000004BU |
| #define EVTSVT_CPUIRQ2SEL_PUBID_VCE_IRQ 0x00000046U |
| #define EVTSVT_CPUIRQ2SEL_PUBID_SPI1_COMB 0x00000045U |
| #define EVTSVT_CPUIRQ2SEL_PUBID_CAN_EVT 0x00000044U |
| #define EVTSVT_CPUIRQ2SEL_PUBID_CAN_IRQ 0x00000043U |
| #define EVTSVT_CPUIRQ2SEL_PUBID_I2S_IRQ 0x00000042U |
| #define EVTSVT_CPUIRQ2SEL_PUBID_LGPT3_ADC 0x00000041U |
| #define EVTSVT_CPUIRQ2SEL_PUBID_LGPT3_DMA 0x00000040U |
| #define EVTSVT_CPUIRQ2SEL_PUBID_LGPT3_COMB 0x0000003FU |
| #define EVTSVT_CPUIRQ2SEL_PUBID_LGPT3C2 0x0000003EU |
| #define EVTSVT_CPUIRQ2SEL_PUBID_LGPT3C1 0x0000003DU |
| #define EVTSVT_CPUIRQ2SEL_PUBID_LGPT3C0 0x0000003CU |
| #define EVTSVT_CPUIRQ2SEL_PUBID_LGPT2_ADC 0x0000003BU |
| #define EVTSVT_CPUIRQ2SEL_PUBID_LGPT2_DMA 0x0000003AU |
| #define EVTSVT_CPUIRQ2SEL_PUBID_LGPT2_COMB 0x00000039U |
| #define EVTSVT_CPUIRQ2SEL_PUBID_LGPT2C2 0x00000038U |
| #define EVTSVT_CPUIRQ2SEL_PUBID_LGPT2C1 0x00000037U |
| #define EVTSVT_CPUIRQ2SEL_PUBID_LGPT2C0 0x00000036U |
| #define EVTSVT_CPUIRQ2SEL_PUBID_UART1_COMB 0x00000035U |
| #define EVTSVT_CPUIRQ2SEL_PUBID_LRFD_EVT2 0x00000034U |
| #define EVTSVT_CPUIRQ2SEL_PUBID_LRFD_EVT1 0x00000033U |
| #define EVTSVT_CPUIRQ2SEL_PUBID_LRFD_EVT0 0x00000032U |
| #define EVTSVT_CPUIRQ2SEL_PUBID_LGPT1_ADC 0x00000031U |
| #define EVTSVT_CPUIRQ2SEL_PUBID_LGPT1_DMA 0x00000030U |
| #define EVTSVT_CPUIRQ2SEL_PUBID_LGPT1C2 0x0000002FU |
| #define EVTSVT_CPUIRQ2SEL_PUBID_LGPT1C1 0x0000002EU |
| #define EVTSVT_CPUIRQ2SEL_PUBID_LGPT1C0 0x0000002DU |
| #define EVTSVT_CPUIRQ2SEL_PUBID_LGPT0_ADC 0x0000002CU |
| #define EVTSVT_CPUIRQ2SEL_PUBID_LGPT0_DMA 0x0000002BU |
| #define EVTSVT_CPUIRQ2SEL_PUBID_LGPT0C2 0x0000002AU |
| #define EVTSVT_CPUIRQ2SEL_PUBID_LGPT0C1 0x00000029U |
| #define EVTSVT_CPUIRQ2SEL_PUBID_LGPT0C0 0x00000028U |
| #define EVTSVT_CPUIRQ2SEL_PUBID_SYSTIM4 0x00000027U |
| #define EVTSVT_CPUIRQ2SEL_PUBID_SYSTIM3 0x00000026U |
| #define EVTSVT_CPUIRQ2SEL_PUBID_SYSTIM2 0x00000025U |
| #define EVTSVT_CPUIRQ2SEL_PUBID_SYSTIM1 0x00000024U |
| #define EVTSVT_CPUIRQ2SEL_PUBID_SYSTIM0 0x00000023U |
| #define EVTSVT_CPUIRQ2SEL_PUBID_SYSTIM_LT 0x00000022U |
| #define EVTSVT_CPUIRQ2SEL_PUBID_SYSTIM_HB 0x00000021U |
| #define EVTSVT_CPUIRQ2SEL_PUBID_I2C0_IRQ 0x00000020U |
| #define EVTSVT_CPUIRQ2SEL_PUBID_UART0_COMB 0x0000001FU |
| #define EVTSVT_CPUIRQ2SEL_PUBID_AES_COMB 0x0000001EU |
| #define EVTSVT_CPUIRQ2SEL_PUBID_DMA_ERR 0x0000001DU |
| #define EVTSVT_CPUIRQ2SEL_PUBID_DMA_DONE_COMB 0x0000001CU |
| #define EVTSVT_CPUIRQ2SEL_PUBID_LGPT1_COMB 0x0000001BU |
| #define EVTSVT_CPUIRQ2SEL_PUBID_LGPT0_COMB 0x0000001AU |
| #define EVTSVT_CPUIRQ2SEL_PUBID_ADC_EVT 0x00000019U |
| #define EVTSVT_CPUIRQ2SEL_PUBID_ADC_COMB 0x00000018U |
| #define EVTSVT_CPUIRQ2SEL_PUBID_SPI0_COMB 0x00000017U |
| #define EVTSVT_CPUIRQ2SEL_PUBID_LRFD_IRQ2 0x00000016U |
| #define EVTSVT_CPUIRQ2SEL_PUBID_LRFD_IRQ1 0x00000015U |
| #define EVTSVT_CPUIRQ2SEL_PUBID_LRFD_IRQ0 0x00000014U |
| #define EVTSVT_CPUIRQ2SEL_PUBID_FLASH_IRQ 0x00000013U |
| #define EVTSVT_CPUIRQ2SEL_PUBID_GPIO_EVT 0x00000012U |
| #define EVTSVT_CPUIRQ2SEL_PUBID_GPIO_COMB 0x00000011U |
| #define EVTSVT_CPUIRQ2SEL_PUBID_SYSTIM_COMB 0x00000010U |
| #define EVTSVT_CPUIRQ2SEL_PUBID_AON_IOC_COMB 0x00000007U |
| #define EVTSVT_CPUIRQ2SEL_PUBID_AON_LPMCMP_IRQ 0x00000006U |
| #define EVTSVT_CPUIRQ2SEL_PUBID_AON_DBG_COMB 0x00000005U |
| #define EVTSVT_CPUIRQ2SEL_PUBID_AON_RTC_COMB 0x00000004U |
| #define EVTSVT_CPUIRQ2SEL_PUBID_AON_CKM_COMB 0x00000003U |
| #define EVTSVT_CPUIRQ2SEL_PUBID_AON_PMU_COMB 0x00000002U |
| #define EVTSVT_CPUIRQ2SEL_PUBID_NONE 0x00000000U |
| #define EVTSVT_CPUIRQ3SEL_PUBID_W 7U |
| #define EVTSVT_CPUIRQ3SEL_PUBID_M 0x0000007FU |
| #define EVTSVT_CPUIRQ3SEL_PUBID_S 0U |
| #define EVTSVT_CPUIRQ3SEL_PUBID_SYSTIM5 0x0000004CU |
| #define EVTSVT_CPUIRQ3SEL_PUBID_GPIO_EVT1 0x0000004BU |
| #define EVTSVT_CPUIRQ3SEL_PUBID_VCE_IRQ 0x00000046U |
| #define EVTSVT_CPUIRQ3SEL_PUBID_SPI1_COMB 0x00000045U |
| #define EVTSVT_CPUIRQ3SEL_PUBID_CAN_EVT 0x00000044U |
| #define EVTSVT_CPUIRQ3SEL_PUBID_CAN_IRQ 0x00000043U |
| #define EVTSVT_CPUIRQ3SEL_PUBID_I2S_IRQ 0x00000042U |
| #define EVTSVT_CPUIRQ3SEL_PUBID_LGPT3_ADC 0x00000041U |
| #define EVTSVT_CPUIRQ3SEL_PUBID_LGPT3_DMA 0x00000040U |
| #define EVTSVT_CPUIRQ3SEL_PUBID_LGPT3_COMB 0x0000003FU |
| #define EVTSVT_CPUIRQ3SEL_PUBID_LGPT3C2 0x0000003EU |
| #define EVTSVT_CPUIRQ3SEL_PUBID_LGPT3C1 0x0000003DU |
| #define EVTSVT_CPUIRQ3SEL_PUBID_LGPT3C0 0x0000003CU |
| #define EVTSVT_CPUIRQ3SEL_PUBID_LGPT2_ADC 0x0000003BU |
| #define EVTSVT_CPUIRQ3SEL_PUBID_LGPT2_DMA 0x0000003AU |
| #define EVTSVT_CPUIRQ3SEL_PUBID_LGPT2_COMB 0x00000039U |
| #define EVTSVT_CPUIRQ3SEL_PUBID_LGPT2C2 0x00000038U |
| #define EVTSVT_CPUIRQ3SEL_PUBID_LGPT2C1 0x00000037U |
| #define EVTSVT_CPUIRQ3SEL_PUBID_LGPT2C0 0x00000036U |
| #define EVTSVT_CPUIRQ3SEL_PUBID_UART1_COMB 0x00000035U |
| #define EVTSVT_CPUIRQ3SEL_PUBID_LRFD_EVT2 0x00000034U |
| #define EVTSVT_CPUIRQ3SEL_PUBID_LRFD_EVT1 0x00000033U |
| #define EVTSVT_CPUIRQ3SEL_PUBID_LRFD_EVT0 0x00000032U |
| #define EVTSVT_CPUIRQ3SEL_PUBID_LGPT1_ADC 0x00000031U |
| #define EVTSVT_CPUIRQ3SEL_PUBID_LGPT1_DMA 0x00000030U |
| #define EVTSVT_CPUIRQ3SEL_PUBID_LGPT1C2 0x0000002FU |
| #define EVTSVT_CPUIRQ3SEL_PUBID_LGPT1C1 0x0000002EU |
| #define EVTSVT_CPUIRQ3SEL_PUBID_LGPT1C0 0x0000002DU |
| #define EVTSVT_CPUIRQ3SEL_PUBID_LGPT0_ADC 0x0000002CU |
| #define EVTSVT_CPUIRQ3SEL_PUBID_LGPT0_DMA 0x0000002BU |
| #define EVTSVT_CPUIRQ3SEL_PUBID_LGPT0C2 0x0000002AU |
| #define EVTSVT_CPUIRQ3SEL_PUBID_LGPT0C1 0x00000029U |
| #define EVTSVT_CPUIRQ3SEL_PUBID_LGPT0C0 0x00000028U |
| #define EVTSVT_CPUIRQ3SEL_PUBID_SYSTIM4 0x00000027U |
| #define EVTSVT_CPUIRQ3SEL_PUBID_SYSTIM3 0x00000026U |
| #define EVTSVT_CPUIRQ3SEL_PUBID_SYSTIM2 0x00000025U |
| #define EVTSVT_CPUIRQ3SEL_PUBID_SYSTIM1 0x00000024U |
| #define EVTSVT_CPUIRQ3SEL_PUBID_SYSTIM0 0x00000023U |
| #define EVTSVT_CPUIRQ3SEL_PUBID_SYSTIM_LT 0x00000022U |
| #define EVTSVT_CPUIRQ3SEL_PUBID_SYSTIM_HB 0x00000021U |
| #define EVTSVT_CPUIRQ3SEL_PUBID_I2C0_IRQ 0x00000020U |
| #define EVTSVT_CPUIRQ3SEL_PUBID_UART0_COMB 0x0000001FU |
| #define EVTSVT_CPUIRQ3SEL_PUBID_AES_COMB 0x0000001EU |
| #define EVTSVT_CPUIRQ3SEL_PUBID_DMA_ERR 0x0000001DU |
| #define EVTSVT_CPUIRQ3SEL_PUBID_DMA_DONE_COMB 0x0000001CU |
| #define EVTSVT_CPUIRQ3SEL_PUBID_LGPT1_COMB 0x0000001BU |
| #define EVTSVT_CPUIRQ3SEL_PUBID_LGPT0_COMB 0x0000001AU |
| #define EVTSVT_CPUIRQ3SEL_PUBID_ADC_EVT 0x00000019U |
| #define EVTSVT_CPUIRQ3SEL_PUBID_ADC_COMB 0x00000018U |
| #define EVTSVT_CPUIRQ3SEL_PUBID_SPI0_COMB 0x00000017U |
| #define EVTSVT_CPUIRQ3SEL_PUBID_LRFD_IRQ2 0x00000016U |
| #define EVTSVT_CPUIRQ3SEL_PUBID_LRFD_IRQ1 0x00000015U |
| #define EVTSVT_CPUIRQ3SEL_PUBID_LRFD_IRQ0 0x00000014U |
| #define EVTSVT_CPUIRQ3SEL_PUBID_FLASH_IRQ 0x00000013U |
| #define EVTSVT_CPUIRQ3SEL_PUBID_GPIO_EVT 0x00000012U |
| #define EVTSVT_CPUIRQ3SEL_PUBID_GPIO_COMB 0x00000011U |
| #define EVTSVT_CPUIRQ3SEL_PUBID_SYSTIM_COMB 0x00000010U |
| #define EVTSVT_CPUIRQ3SEL_PUBID_AON_IOC_COMB 0x00000007U |
| #define EVTSVT_CPUIRQ3SEL_PUBID_AON_LPMCMP_IRQ 0x00000006U |
| #define EVTSVT_CPUIRQ3SEL_PUBID_AON_DBG_COMB 0x00000005U |
| #define EVTSVT_CPUIRQ3SEL_PUBID_AON_RTC_COMB 0x00000004U |
| #define EVTSVT_CPUIRQ3SEL_PUBID_AON_CKM_COMB 0x00000003U |
| #define EVTSVT_CPUIRQ3SEL_PUBID_AON_PMU_COMB 0x00000002U |
| #define EVTSVT_CPUIRQ3SEL_PUBID_NONE 0x00000000U |
| #define EVTSVT_CPUIRQ4SEL_PUBID_W 7U |
| #define EVTSVT_CPUIRQ4SEL_PUBID_M 0x0000007FU |
| #define EVTSVT_CPUIRQ4SEL_PUBID_S 0U |
| #define EVTSVT_CPUIRQ4SEL_PUBID_SYSTIM5 0x0000004CU |
| #define EVTSVT_CPUIRQ4SEL_PUBID_GPIO_EVT1 0x0000004BU |
| #define EVTSVT_CPUIRQ4SEL_PUBID_VCE_IRQ 0x00000046U |
| #define EVTSVT_CPUIRQ4SEL_PUBID_SPI1_COMB 0x00000045U |
| #define EVTSVT_CPUIRQ4SEL_PUBID_CAN_EVT 0x00000044U |
| #define EVTSVT_CPUIRQ4SEL_PUBID_CAN_IRQ 0x00000043U |
| #define EVTSVT_CPUIRQ4SEL_PUBID_I2S_IRQ 0x00000042U |
| #define EVTSVT_CPUIRQ4SEL_PUBID_LGPT3_ADC 0x00000041U |
| #define EVTSVT_CPUIRQ4SEL_PUBID_LGPT3_DMA 0x00000040U |
| #define EVTSVT_CPUIRQ4SEL_PUBID_LGPT3_COMB 0x0000003FU |
| #define EVTSVT_CPUIRQ4SEL_PUBID_LGPT3C2 0x0000003EU |
| #define EVTSVT_CPUIRQ4SEL_PUBID_LGPT3C1 0x0000003DU |
| #define EVTSVT_CPUIRQ4SEL_PUBID_LGPT3C0 0x0000003CU |
| #define EVTSVT_CPUIRQ4SEL_PUBID_LGPT2_ADC 0x0000003BU |
| #define EVTSVT_CPUIRQ4SEL_PUBID_LGPT2_DMA 0x0000003AU |
| #define EVTSVT_CPUIRQ4SEL_PUBID_LGPT2_COMB 0x00000039U |
| #define EVTSVT_CPUIRQ4SEL_PUBID_LGPT2C2 0x00000038U |
| #define EVTSVT_CPUIRQ4SEL_PUBID_LGPT2C1 0x00000037U |
| #define EVTSVT_CPUIRQ4SEL_PUBID_LGPT2C0 0x00000036U |
| #define EVTSVT_CPUIRQ4SEL_PUBID_UART1_COMB 0x00000035U |
| #define EVTSVT_CPUIRQ4SEL_PUBID_LRFD_EVT2 0x00000034U |
| #define EVTSVT_CPUIRQ4SEL_PUBID_LRFD_EVT1 0x00000033U |
| #define EVTSVT_CPUIRQ4SEL_PUBID_LRFD_EVT0 0x00000032U |
| #define EVTSVT_CPUIRQ4SEL_PUBID_LGPT1_ADC 0x00000031U |
| #define EVTSVT_CPUIRQ4SEL_PUBID_LGPT1_DMA 0x00000030U |
| #define EVTSVT_CPUIRQ4SEL_PUBID_LGPT1C2 0x0000002FU |
| #define EVTSVT_CPUIRQ4SEL_PUBID_LGPT1C1 0x0000002EU |
| #define EVTSVT_CPUIRQ4SEL_PUBID_LGPT1C0 0x0000002DU |
| #define EVTSVT_CPUIRQ4SEL_PUBID_LGPT0_ADC 0x0000002CU |
| #define EVTSVT_CPUIRQ4SEL_PUBID_LGPT0_DMA 0x0000002BU |
| #define EVTSVT_CPUIRQ4SEL_PUBID_LGPT0C2 0x0000002AU |
| #define EVTSVT_CPUIRQ4SEL_PUBID_LGPT0C1 0x00000029U |
| #define EVTSVT_CPUIRQ4SEL_PUBID_LGPT0C0 0x00000028U |
| #define EVTSVT_CPUIRQ4SEL_PUBID_SYSTIM4 0x00000027U |
| #define EVTSVT_CPUIRQ4SEL_PUBID_SYSTIM3 0x00000026U |
| #define EVTSVT_CPUIRQ4SEL_PUBID_SYSTIM2 0x00000025U |
| #define EVTSVT_CPUIRQ4SEL_PUBID_SYSTIM1 0x00000024U |
| #define EVTSVT_CPUIRQ4SEL_PUBID_SYSTIM0 0x00000023U |
| #define EVTSVT_CPUIRQ4SEL_PUBID_SYSTIM_LT 0x00000022U |
| #define EVTSVT_CPUIRQ4SEL_PUBID_SYSTIM_HB 0x00000021U |
| #define EVTSVT_CPUIRQ4SEL_PUBID_I2C0_IRQ 0x00000020U |
| #define EVTSVT_CPUIRQ4SEL_PUBID_UART0_COMB 0x0000001FU |
| #define EVTSVT_CPUIRQ4SEL_PUBID_AES_COMB 0x0000001EU |
| #define EVTSVT_CPUIRQ4SEL_PUBID_DMA_ERR 0x0000001DU |
| #define EVTSVT_CPUIRQ4SEL_PUBID_DMA_DONE_COMB 0x0000001CU |
| #define EVTSVT_CPUIRQ4SEL_PUBID_LGPT1_COMB 0x0000001BU |
| #define EVTSVT_CPUIRQ4SEL_PUBID_LGPT0_COMB 0x0000001AU |
| #define EVTSVT_CPUIRQ4SEL_PUBID_ADC_EVT 0x00000019U |
| #define EVTSVT_CPUIRQ4SEL_PUBID_ADC_COMB 0x00000018U |
| #define EVTSVT_CPUIRQ4SEL_PUBID_SPI0_COMB 0x00000017U |
| #define EVTSVT_CPUIRQ4SEL_PUBID_LRFD_IRQ2 0x00000016U |
| #define EVTSVT_CPUIRQ4SEL_PUBID_LRFD_IRQ1 0x00000015U |
| #define EVTSVT_CPUIRQ4SEL_PUBID_LRFD_IRQ0 0x00000014U |
| #define EVTSVT_CPUIRQ4SEL_PUBID_FLASH_IRQ 0x00000013U |
| #define EVTSVT_CPUIRQ4SEL_PUBID_GPIO_EVT 0x00000012U |
| #define EVTSVT_CPUIRQ4SEL_PUBID_GPIO_COMB 0x00000011U |
| #define EVTSVT_CPUIRQ4SEL_PUBID_SYSTIM_COMB 0x00000010U |
| #define EVTSVT_CPUIRQ4SEL_PUBID_AON_IOC_COMB 0x00000007U |
| #define EVTSVT_CPUIRQ4SEL_PUBID_AON_LPMCMP_IRQ 0x00000006U |
| #define EVTSVT_CPUIRQ4SEL_PUBID_AON_DBG_COMB 0x00000005U |
| #define EVTSVT_CPUIRQ4SEL_PUBID_AON_RTC_COMB 0x00000004U |
| #define EVTSVT_CPUIRQ4SEL_PUBID_AON_CKM_COMB 0x00000003U |
| #define EVTSVT_CPUIRQ4SEL_PUBID_AON_PMU_COMB 0x00000002U |
| #define EVTSVT_CPUIRQ4SEL_PUBID_NONE 0x00000000U |
| #define EVTSVT_CPUIRQ5SEL_PUBID_W 7U |
| #define EVTSVT_CPUIRQ5SEL_PUBID_M 0x0000007FU |
| #define EVTSVT_CPUIRQ5SEL_PUBID_S 0U |
| #define EVTSVT_CPUIRQ5SEL_PUBID_GPIO_COMB 0x00000011U |
| #define EVTSVT_CPUIRQ6SEL_PUBID_W 7U |
| #define EVTSVT_CPUIRQ6SEL_PUBID_M 0x0000007FU |
| #define EVTSVT_CPUIRQ6SEL_PUBID_S 0U |
| #define EVTSVT_CPUIRQ6SEL_PUBID_LRFD_IRQ0 0x00000014U |
| #define EVTSVT_CPUIRQ7SEL_PUBID_W 7U |
| #define EVTSVT_CPUIRQ7SEL_PUBID_M 0x0000007FU |
| #define EVTSVT_CPUIRQ7SEL_PUBID_S 0U |
| #define EVTSVT_CPUIRQ7SEL_PUBID_LRFD_IRQ1 0x00000015U |
| #define EVTSVT_CPUIRQ8SEL_PUBID_W 7U |
| #define EVTSVT_CPUIRQ8SEL_PUBID_M 0x0000007FU |
| #define EVTSVT_CPUIRQ8SEL_PUBID_S 0U |
| #define EVTSVT_CPUIRQ8SEL_PUBID_DMA_DONE_COMB 0x0000001CU |
| #define EVTSVT_CPUIRQ9SEL_PUBID_W 7U |
| #define EVTSVT_CPUIRQ9SEL_PUBID_M 0x0000007FU |
| #define EVTSVT_CPUIRQ9SEL_PUBID_S 0U |
| #define EVTSVT_CPUIRQ9SEL_PUBID_AES_COMB 0x0000001EU |
| #define EVTSVT_CPUIRQ10SEL_PUBID_W 7U |
| #define EVTSVT_CPUIRQ10SEL_PUBID_M 0x0000007FU |
| #define EVTSVT_CPUIRQ10SEL_PUBID_S 0U |
| #define EVTSVT_CPUIRQ10SEL_PUBID_SPI0_COMB 0x00000017U |
| #define EVTSVT_CPUIRQ11SEL_PUBID_W 7U |
| #define EVTSVT_CPUIRQ11SEL_PUBID_M 0x0000007FU |
| #define EVTSVT_CPUIRQ11SEL_PUBID_S 0U |
| #define EVTSVT_CPUIRQ11SEL_PUBID_UART0_COMB 0x0000001FU |
| #define EVTSVT_CPUIRQ12SEL_PUBID_W 7U |
| #define EVTSVT_CPUIRQ12SEL_PUBID_M 0x0000007FU |
| #define EVTSVT_CPUIRQ12SEL_PUBID_S 0U |
| #define EVTSVT_CPUIRQ12SEL_PUBID_I2C0_IRQ 0x00000020U |
| #define EVTSVT_CPUIRQ13SEL_PUBID_W 7U |
| #define EVTSVT_CPUIRQ13SEL_PUBID_M 0x0000007FU |
| #define EVTSVT_CPUIRQ13SEL_PUBID_S 0U |
| #define EVTSVT_CPUIRQ13SEL_PUBID_LGPT0_COMB 0x0000001AU |
| #define EVTSVT_CPUIRQ14SEL_PUBID_W 7U |
| #define EVTSVT_CPUIRQ14SEL_PUBID_M 0x0000007FU |
| #define EVTSVT_CPUIRQ14SEL_PUBID_S 0U |
| #define EVTSVT_CPUIRQ14SEL_PUBID_LGPT1_COMB 0x0000001BU |
| #define EVTSVT_CPUIRQ15SEL_PUBID_W 7U |
| #define EVTSVT_CPUIRQ15SEL_PUBID_M 0x0000007FU |
| #define EVTSVT_CPUIRQ15SEL_PUBID_S 0U |
| #define EVTSVT_CPUIRQ15SEL_PUBID_ADC_COMB 0x00000018U |
| #define EVTSVT_CPUIRQ16SEL_PUBID_W 7U |
| #define EVTSVT_CPUIRQ16SEL_PUBID_M 0x0000007FU |
| #define EVTSVT_CPUIRQ16SEL_PUBID_S 0U |
| #define EVTSVT_CPUIRQ16SEL_PUBID_SYSTIM5 0x0000004CU |
| #define EVTSVT_CPUIRQ16SEL_PUBID_GPIO_EVT1 0x0000004BU |
| #define EVTSVT_CPUIRQ16SEL_PUBID_VCE_IRQ 0x00000046U |
| #define EVTSVT_CPUIRQ16SEL_PUBID_SPI1_COMB 0x00000045U |
| #define EVTSVT_CPUIRQ16SEL_PUBID_CAN_EVT 0x00000044U |
| #define EVTSVT_CPUIRQ16SEL_PUBID_CAN_IRQ 0x00000043U |
| #define EVTSVT_CPUIRQ16SEL_PUBID_I2S_IRQ 0x00000042U |
| #define EVTSVT_CPUIRQ16SEL_PUBID_LGPT3_ADC 0x00000041U |
| #define EVTSVT_CPUIRQ16SEL_PUBID_LGPT3_DMA 0x00000040U |
| #define EVTSVT_CPUIRQ16SEL_PUBID_LGPT3_COMB 0x0000003FU |
| #define EVTSVT_CPUIRQ16SEL_PUBID_LGPT3C2 0x0000003EU |
| #define EVTSVT_CPUIRQ16SEL_PUBID_LGPT3C1 0x0000003DU |
| #define EVTSVT_CPUIRQ16SEL_PUBID_LGPT3C0 0x0000003CU |
| #define EVTSVT_CPUIRQ16SEL_PUBID_LGPT2_ADC 0x0000003BU |
| #define EVTSVT_CPUIRQ16SEL_PUBID_LGPT2_DMA 0x0000003AU |
| #define EVTSVT_CPUIRQ16SEL_PUBID_LGPT2_COMB 0x00000039U |
| #define EVTSVT_CPUIRQ16SEL_PUBID_LGPT2C2 0x00000038U |
| #define EVTSVT_CPUIRQ16SEL_PUBID_LGPT2C1 0x00000037U |
| #define EVTSVT_CPUIRQ16SEL_PUBID_LGPT2C0 0x00000036U |
| #define EVTSVT_CPUIRQ16SEL_PUBID_UART1_COMB 0x00000035U |
| #define EVTSVT_CPUIRQ16SEL_PUBID_LRFD_EVT2 0x00000034U |
| #define EVTSVT_CPUIRQ16SEL_PUBID_LRFD_EVT1 0x00000033U |
| #define EVTSVT_CPUIRQ16SEL_PUBID_LRFD_EVT0 0x00000032U |
| #define EVTSVT_CPUIRQ16SEL_PUBID_LGPT1_ADC 0x00000031U |
| #define EVTSVT_CPUIRQ16SEL_PUBID_LGPT1_DMA 0x00000030U |
| #define EVTSVT_CPUIRQ16SEL_PUBID_LGPT1C2 0x0000002FU |
| #define EVTSVT_CPUIRQ16SEL_PUBID_LGPT1C1 0x0000002EU |
| #define EVTSVT_CPUIRQ16SEL_PUBID_LGPT1C0 0x0000002DU |
| #define EVTSVT_CPUIRQ16SEL_PUBID_LGPT0_ADC 0x0000002CU |
| #define EVTSVT_CPUIRQ16SEL_PUBID_LGPT0_DMA 0x0000002BU |
| #define EVTSVT_CPUIRQ16SEL_PUBID_LGPT0C2 0x0000002AU |
| #define EVTSVT_CPUIRQ16SEL_PUBID_LGPT0C1 0x00000029U |
| #define EVTSVT_CPUIRQ16SEL_PUBID_LGPT0C0 0x00000028U |
| #define EVTSVT_CPUIRQ16SEL_PUBID_SYSTIM4 0x00000027U |
| #define EVTSVT_CPUIRQ16SEL_PUBID_SYSTIM3 0x00000026U |
| #define EVTSVT_CPUIRQ16SEL_PUBID_SYSTIM2 0x00000025U |
| #define EVTSVT_CPUIRQ16SEL_PUBID_SYSTIM1 0x00000024U |
| #define EVTSVT_CPUIRQ16SEL_PUBID_SYSTIM0 0x00000023U |
| #define EVTSVT_CPUIRQ16SEL_PUBID_SYSTIM_LT 0x00000022U |
| #define EVTSVT_CPUIRQ16SEL_PUBID_SYSTIM_HB 0x00000021U |
| #define EVTSVT_CPUIRQ16SEL_PUBID_I2C0_IRQ 0x00000020U |
| #define EVTSVT_CPUIRQ16SEL_PUBID_UART0_COMB 0x0000001FU |
| #define EVTSVT_CPUIRQ16SEL_PUBID_AES_COMB 0x0000001EU |
| #define EVTSVT_CPUIRQ16SEL_PUBID_DMA_ERR 0x0000001DU |
| #define EVTSVT_CPUIRQ16SEL_PUBID_DMA_DONE_COMB 0x0000001CU |
| #define EVTSVT_CPUIRQ16SEL_PUBID_LGPT1_COMB 0x0000001BU |
| #define EVTSVT_CPUIRQ16SEL_PUBID_LGPT0_COMB 0x0000001AU |
| #define EVTSVT_CPUIRQ16SEL_PUBID_ADC_EVT 0x00000019U |
| #define EVTSVT_CPUIRQ16SEL_PUBID_ADC_COMB 0x00000018U |
| #define EVTSVT_CPUIRQ16SEL_PUBID_SPI0_COMB 0x00000017U |
| #define EVTSVT_CPUIRQ16SEL_PUBID_LRFD_IRQ2 0x00000016U |
| #define EVTSVT_CPUIRQ16SEL_PUBID_LRFD_IRQ1 0x00000015U |
| #define EVTSVT_CPUIRQ16SEL_PUBID_LRFD_IRQ0 0x00000014U |
| #define EVTSVT_CPUIRQ16SEL_PUBID_FLASH_IRQ 0x00000013U |
| #define EVTSVT_CPUIRQ16SEL_PUBID_GPIO_EVT 0x00000012U |
| #define EVTSVT_CPUIRQ16SEL_PUBID_GPIO_COMB 0x00000011U |
| #define EVTSVT_CPUIRQ16SEL_PUBID_SYSTIM_COMB 0x00000010U |
| #define EVTSVT_CPUIRQ16SEL_PUBID_AON_IOC_COMB 0x00000007U |
| #define EVTSVT_CPUIRQ16SEL_PUBID_AON_LPMCMP_IRQ 0x00000006U |
| #define EVTSVT_CPUIRQ16SEL_PUBID_AON_DBG_COMB 0x00000005U |
| #define EVTSVT_CPUIRQ16SEL_PUBID_AON_RTC_COMB 0x00000004U |
| #define EVTSVT_CPUIRQ16SEL_PUBID_AON_CKM_COMB 0x00000003U |
| #define EVTSVT_CPUIRQ16SEL_PUBID_AON_PMU_COMB 0x00000002U |
| #define EVTSVT_CPUIRQ16SEL_PUBID_NONE 0x00000000U |
| #define EVTSVT_CPUIRQ17SEL_PUBID_W 7U |
| #define EVTSVT_CPUIRQ17SEL_PUBID_M 0x0000007FU |
| #define EVTSVT_CPUIRQ17SEL_PUBID_S 0U |
| #define EVTSVT_CPUIRQ17SEL_PUBID_SYSTIM5 0x0000004CU |
| #define EVTSVT_CPUIRQ17SEL_PUBID_GPIO_EVT1 0x0000004BU |
| #define EVTSVT_CPUIRQ17SEL_PUBID_VCE_IRQ 0x00000046U |
| #define EVTSVT_CPUIRQ17SEL_PUBID_SPI1_COMB 0x00000045U |
| #define EVTSVT_CPUIRQ17SEL_PUBID_CAN_EVT 0x00000044U |
| #define EVTSVT_CPUIRQ17SEL_PUBID_CAN_IRQ 0x00000043U |
| #define EVTSVT_CPUIRQ17SEL_PUBID_I2S_IRQ 0x00000042U |
| #define EVTSVT_CPUIRQ17SEL_PUBID_LGPT3_ADC 0x00000041U |
| #define EVTSVT_CPUIRQ17SEL_PUBID_LGPT3_DMA 0x00000040U |
| #define EVTSVT_CPUIRQ17SEL_PUBID_LGPT3_COMB 0x0000003FU |
| #define EVTSVT_CPUIRQ17SEL_PUBID_LGPT3C2 0x0000003EU |
| #define EVTSVT_CPUIRQ17SEL_PUBID_LGPT3C1 0x0000003DU |
| #define EVTSVT_CPUIRQ17SEL_PUBID_LGPT3C0 0x0000003CU |
| #define EVTSVT_CPUIRQ17SEL_PUBID_LGPT2_ADC 0x0000003BU |
| #define EVTSVT_CPUIRQ17SEL_PUBID_LGPT2_DMA 0x0000003AU |
| #define EVTSVT_CPUIRQ17SEL_PUBID_LGPT2_COMB 0x00000039U |
| #define EVTSVT_CPUIRQ17SEL_PUBID_LGPT2C2 0x00000038U |
| #define EVTSVT_CPUIRQ17SEL_PUBID_LGPT2C1 0x00000037U |
| #define EVTSVT_CPUIRQ17SEL_PUBID_LGPT2C0 0x00000036U |
| #define EVTSVT_CPUIRQ17SEL_PUBID_UART1_COMB 0x00000035U |
| #define EVTSVT_CPUIRQ17SEL_PUBID_LRFD_EVT2 0x00000034U |
| #define EVTSVT_CPUIRQ17SEL_PUBID_LRFD_EVT1 0x00000033U |
| #define EVTSVT_CPUIRQ17SEL_PUBID_LRFD_EVT0 0x00000032U |
| #define EVTSVT_CPUIRQ17SEL_PUBID_LGPT1_ADC 0x00000031U |
| #define EVTSVT_CPUIRQ17SEL_PUBID_LGPT1_DMA 0x00000030U |
| #define EVTSVT_CPUIRQ17SEL_PUBID_LGPT1C2 0x0000002FU |
| #define EVTSVT_CPUIRQ17SEL_PUBID_LGPT1C1 0x0000002EU |
| #define EVTSVT_CPUIRQ17SEL_PUBID_LGPT1C0 0x0000002DU |
| #define EVTSVT_CPUIRQ17SEL_PUBID_LGPT0_ADC 0x0000002CU |
| #define EVTSVT_CPUIRQ17SEL_PUBID_LGPT0_DMA 0x0000002BU |
| #define EVTSVT_CPUIRQ17SEL_PUBID_LGPT0C2 0x0000002AU |
| #define EVTSVT_CPUIRQ17SEL_PUBID_LGPT0C1 0x00000029U |
| #define EVTSVT_CPUIRQ17SEL_PUBID_LGPT0C0 0x00000028U |
| #define EVTSVT_CPUIRQ17SEL_PUBID_SYSTIM4 0x00000027U |
| #define EVTSVT_CPUIRQ17SEL_PUBID_SYSTIM3 0x00000026U |
| #define EVTSVT_CPUIRQ17SEL_PUBID_SYSTIM2 0x00000025U |
| #define EVTSVT_CPUIRQ17SEL_PUBID_SYSTIM1 0x00000024U |
| #define EVTSVT_CPUIRQ17SEL_PUBID_SYSTIM0 0x00000023U |
| #define EVTSVT_CPUIRQ17SEL_PUBID_SYSTIM_LT 0x00000022U |
| #define EVTSVT_CPUIRQ17SEL_PUBID_SYSTIM_HB 0x00000021U |
| #define EVTSVT_CPUIRQ17SEL_PUBID_I2C0_IRQ 0x00000020U |
| #define EVTSVT_CPUIRQ17SEL_PUBID_UART0_COMB 0x0000001FU |
| #define EVTSVT_CPUIRQ17SEL_PUBID_AES_COMB 0x0000001EU |
| #define EVTSVT_CPUIRQ17SEL_PUBID_DMA_ERR 0x0000001DU |
| #define EVTSVT_CPUIRQ17SEL_PUBID_DMA_DONE_COMB 0x0000001CU |
| #define EVTSVT_CPUIRQ17SEL_PUBID_LGPT1_COMB 0x0000001BU |
| #define EVTSVT_CPUIRQ17SEL_PUBID_LGPT0_COMB 0x0000001AU |
| #define EVTSVT_CPUIRQ17SEL_PUBID_ADC_EVT 0x00000019U |
| #define EVTSVT_CPUIRQ17SEL_PUBID_ADC_COMB 0x00000018U |
| #define EVTSVT_CPUIRQ17SEL_PUBID_SPI0_COMB 0x00000017U |
| #define EVTSVT_CPUIRQ17SEL_PUBID_LRFD_IRQ2 0x00000016U |
| #define EVTSVT_CPUIRQ17SEL_PUBID_LRFD_IRQ1 0x00000015U |
| #define EVTSVT_CPUIRQ17SEL_PUBID_LRFD_IRQ0 0x00000014U |
| #define EVTSVT_CPUIRQ17SEL_PUBID_FLASH_IRQ 0x00000013U |
| #define EVTSVT_CPUIRQ17SEL_PUBID_GPIO_EVT 0x00000012U |
| #define EVTSVT_CPUIRQ17SEL_PUBID_GPIO_COMB 0x00000011U |
| #define EVTSVT_CPUIRQ17SEL_PUBID_SYSTIM_COMB 0x00000010U |
| #define EVTSVT_CPUIRQ17SEL_PUBID_AON_IOC_COMB 0x00000007U |
| #define EVTSVT_CPUIRQ17SEL_PUBID_AON_LPMCMP_IRQ 0x00000006U |
| #define EVTSVT_CPUIRQ17SEL_PUBID_AON_DBG_COMB 0x00000005U |
| #define EVTSVT_CPUIRQ17SEL_PUBID_AON_RTC_COMB 0x00000004U |
| #define EVTSVT_CPUIRQ17SEL_PUBID_AON_CKM_COMB 0x00000003U |
| #define EVTSVT_CPUIRQ17SEL_PUBID_AON_PMU_COMB 0x00000002U |
| #define EVTSVT_CPUIRQ17SEL_PUBID_NONE 0x00000000U |
| #define EVTSVT_CPUIRQ18SEL_PUBID_W 7U |
| #define EVTSVT_CPUIRQ18SEL_PUBID_M 0x0000007FU |
| #define EVTSVT_CPUIRQ18SEL_PUBID_S 0U |
| #define EVTSVT_CPUIRQ18SEL_PUBID_LGPT2_COMB 0x00000039U |
| #define EVTSVT_CPUIRQ19SEL_PUBID_W 7U |
| #define EVTSVT_CPUIRQ19SEL_PUBID_M 0x0000007FU |
| #define EVTSVT_CPUIRQ19SEL_PUBID_S 0U |
| #define EVTSVT_CPUIRQ19SEL_PUBID_LGPT3_COMB 0x0000003FU |
| #define EVTSVT_CPUIRQ20SEL_PUBID_W 7U |
| #define EVTSVT_CPUIRQ20SEL_PUBID_M 0x0000007FU |
| #define EVTSVT_CPUIRQ20SEL_PUBID_S 0U |
| #define EVTSVT_CPUIRQ20SEL_PUBID_I2S_IRQ 0x00000042U |
| #define EVTSVT_CPUIRQ21SEL_PUBID_W 7U |
| #define EVTSVT_CPUIRQ21SEL_PUBID_M 0x0000007FU |
| #define EVTSVT_CPUIRQ21SEL_PUBID_S 0U |
| #define EVTSVT_CPUIRQ21SEL_PUBID_CAN_IRQ 0x00000043U |
| #define EVTSVT_CPUIRQ22SEL_PUBID_W 7U |
| #define EVTSVT_CPUIRQ22SEL_PUBID_M 0x0000007FU |
| #define EVTSVT_CPUIRQ22SEL_PUBID_S 0U |
| #define EVTSVT_CPUIRQ22SEL_PUBID_UART1_COMB 0x00000035U |
| #define EVTSVT_CPUIRQ23SEL_PUBID_W 7U |
| #define EVTSVT_CPUIRQ23SEL_PUBID_M 0x0000007FU |
| #define EVTSVT_CPUIRQ23SEL_PUBID_S 0U |
| #define EVTSVT_CPUIRQ23SEL_PUBID_SPI1_COMB 0x00000045U |
| #define EVTSVT_CPUIRQ24SEL_PUBID_W 7U |
| #define EVTSVT_CPUIRQ24SEL_PUBID_M 0x0000007FU |
| #define EVTSVT_CPUIRQ24SEL_PUBID_S 0U |
| #define EVTSVT_CPUIRQ24SEL_PUBID_VCE_IRQ 0x00000046U |
| #define EVTSVT_CPUIRQ25SEL_PUBID_W 7U |
| #define EVTSVT_CPUIRQ25SEL_PUBID_M 0x0000007FU |
| #define EVTSVT_CPUIRQ25SEL_PUBID_S 0U |
| #define EVTSVT_CPUIRQ25SEL_PUBID_HSM_SEC_IRQ 0x00000047U |
| #define EVTSVT_CPUIRQ26SEL_PUBID_W 7U |
| #define EVTSVT_CPUIRQ26SEL_PUBID_M 0x0000007FU |
| #define EVTSVT_CPUIRQ26SEL_PUBID_S 0U |
| #define EVTSVT_CPUIRQ26SEL_PUBID_HSM_NONSEC_IRQ 0x00000048U |
| #define EVTSVT_CPUIRQ27SEL_PUBID_W 7U |
| #define EVTSVT_CPUIRQ27SEL_PUBID_M 0x0000007FU |
| #define EVTSVT_CPUIRQ27SEL_PUBID_S 0U |
| #define EVTSVT_CPUIRQ27SEL_PUBID_HSM_OTP_IRQ 0x00000049U |
| #define EVTSVT_CPUIRQ28SEL_PUBID_W 7U |
| #define EVTSVT_CPUIRQ28SEL_PUBID_M 0x0000007FU |
| #define EVTSVT_CPUIRQ28SEL_PUBID_S 0U |
| #define EVTSVT_CPUIRQ28SEL_PUBID_AON_PMU_COMB 0x00000002U |
| #define EVTSVT_CPUIRQ29SEL_PUBID_W 7U |
| #define EVTSVT_CPUIRQ29SEL_PUBID_M 0x0000007FU |
| #define EVTSVT_CPUIRQ29SEL_PUBID_S 0U |
| #define EVTSVT_CPUIRQ29SEL_PUBID_AON_CKM_COMB 0x00000003U |
| #define EVTSVT_CPUIRQ30SEL_PUBID_W 7U |
| #define EVTSVT_CPUIRQ30SEL_PUBID_M 0x0000007FU |
| #define EVTSVT_CPUIRQ30SEL_PUBID_S 0U |
| #define EVTSVT_CPUIRQ30SEL_PUBID_AON_RTC_COMB 0x00000004U |
| #define EVTSVT_CPUIRQ31SEL_PUBID_W 7U |
| #define EVTSVT_CPUIRQ31SEL_PUBID_M 0x0000007FU |
| #define EVTSVT_CPUIRQ31SEL_PUBID_S 0U |
| #define EVTSVT_CPUIRQ31SEL_PUBID_AON_LPMCMP_IRQ 0x00000006U |
| #define EVTSVT_CPUIRQ32SEL_PUBID_W 7U |
| #define EVTSVT_CPUIRQ32SEL_PUBID_M 0x0000007FU |
| #define EVTSVT_CPUIRQ32SEL_PUBID_S 0U |
| #define EVTSVT_CPUIRQ32SEL_PUBID_AON_IOC_COMB 0x00000007U |
| #define EVTSVT_SYSTIMC0SEL_PUBID_W 7U |
| #define EVTSVT_SYSTIMC0SEL_PUBID_M 0x0000007FU |
| #define EVTSVT_SYSTIMC0SEL_PUBID_S 0U |
| #define EVTSVT_SYSTIMC0SEL_PUBID_AON_RTC_COMB 0x00000004U |
| #define EVTSVT_SYSTIMC1SEL_PUBID_W 7U |
| #define EVTSVT_SYSTIMC1SEL_PUBID_M 0x0000007FU |
| #define EVTSVT_SYSTIMC1SEL_PUBID_S 0U |
| #define EVTSVT_SYSTIMC1SEL_PUBID_SYSTIM5 0x0000004CU |
| #define EVTSVT_SYSTIMC1SEL_PUBID_GPIO_EVT1 0x0000004BU |
| #define EVTSVT_SYSTIMC1SEL_PUBID_VCE_IRQ 0x00000046U |
| #define EVTSVT_SYSTIMC1SEL_PUBID_SPI1_COMB 0x00000045U |
| #define EVTSVT_SYSTIMC1SEL_PUBID_CAN_EVT 0x00000044U |
| #define EVTSVT_SYSTIMC1SEL_PUBID_CAN_IRQ 0x00000043U |
| #define EVTSVT_SYSTIMC1SEL_PUBID_I2S_IRQ 0x00000042U |
| #define EVTSVT_SYSTIMC1SEL_PUBID_LGPT3_ADC 0x00000041U |
| #define EVTSVT_SYSTIMC1SEL_PUBID_LGPT3_DMA 0x00000040U |
| #define EVTSVT_SYSTIMC1SEL_PUBID_LGPT3_COMB 0x0000003FU |
| #define EVTSVT_SYSTIMC1SEL_PUBID_LGPT3C2 0x0000003EU |
| #define EVTSVT_SYSTIMC1SEL_PUBID_LGPT3C1 0x0000003DU |
| #define EVTSVT_SYSTIMC1SEL_PUBID_LGPT3C0 0x0000003CU |
| #define EVTSVT_SYSTIMC1SEL_PUBID_LGPT2_ADC 0x0000003BU |
| #define EVTSVT_SYSTIMC1SEL_PUBID_LGPT2_DMA 0x0000003AU |
| #define EVTSVT_SYSTIMC1SEL_PUBID_LGPT2_COMB 0x00000039U |
| #define EVTSVT_SYSTIMC1SEL_PUBID_LGPT2C2 0x00000038U |
| #define EVTSVT_SYSTIMC1SEL_PUBID_LGPT2C1 0x00000037U |
| #define EVTSVT_SYSTIMC1SEL_PUBID_LGPT2C0 0x00000036U |
| #define EVTSVT_SYSTIMC1SEL_PUBID_UART1_COMB 0x00000035U |
| #define EVTSVT_SYSTIMC1SEL_PUBID_LRFD_EVT2 0x00000034U |
| #define EVTSVT_SYSTIMC1SEL_PUBID_LRFD_EVT1 0x00000033U |
| #define EVTSVT_SYSTIMC1SEL_PUBID_LRFD_EVT0 0x00000032U |
| #define EVTSVT_SYSTIMC1SEL_PUBID_LGPT1_ADC 0x00000031U |
| #define EVTSVT_SYSTIMC1SEL_PUBID_LGPT1_DMA 0x00000030U |
| #define EVTSVT_SYSTIMC1SEL_PUBID_LGPT1C2 0x0000002FU |
| #define EVTSVT_SYSTIMC1SEL_PUBID_LGPT1C1 0x0000002EU |
| #define EVTSVT_SYSTIMC1SEL_PUBID_LGPT1C0 0x0000002DU |
| #define EVTSVT_SYSTIMC1SEL_PUBID_LGPT0_ADC 0x0000002CU |
| #define EVTSVT_SYSTIMC1SEL_PUBID_LGPT0_DMA 0x0000002BU |
| #define EVTSVT_SYSTIMC1SEL_PUBID_LGPT0C2 0x0000002AU |
| #define EVTSVT_SYSTIMC1SEL_PUBID_LGPT0C1 0x00000029U |
| #define EVTSVT_SYSTIMC1SEL_PUBID_LGPT0C0 0x00000028U |
| #define EVTSVT_SYSTIMC1SEL_PUBID_SYSTIM4 0x00000027U |
| #define EVTSVT_SYSTIMC1SEL_PUBID_SYSTIM3 0x00000026U |
| #define EVTSVT_SYSTIMC1SEL_PUBID_SYSTIM2 0x00000025U |
| #define EVTSVT_SYSTIMC1SEL_PUBID_SYSTIM1 0x00000024U |
| #define EVTSVT_SYSTIMC1SEL_PUBID_SYSTIM0 0x00000023U |
| #define EVTSVT_SYSTIMC1SEL_PUBID_SYSTIM_LT 0x00000022U |
| #define EVTSVT_SYSTIMC1SEL_PUBID_SYSTIM_HB 0x00000021U |
| #define EVTSVT_SYSTIMC1SEL_PUBID_I2C0_IRQ 0x00000020U |
| #define EVTSVT_SYSTIMC1SEL_PUBID_UART0_COMB 0x0000001FU |
| #define EVTSVT_SYSTIMC1SEL_PUBID_AES_COMB 0x0000001EU |
| #define EVTSVT_SYSTIMC1SEL_PUBID_DMA_ERR 0x0000001DU |
| #define EVTSVT_SYSTIMC1SEL_PUBID_DMA_DONE_COMB 0x0000001CU |
| #define EVTSVT_SYSTIMC1SEL_PUBID_LGPT1_COMB 0x0000001BU |
| #define EVTSVT_SYSTIMC1SEL_PUBID_LGPT0_COMB 0x0000001AU |
| #define EVTSVT_SYSTIMC1SEL_PUBID_ADC_EVT 0x00000019U |
| #define EVTSVT_SYSTIMC1SEL_PUBID_ADC_COMB 0x00000018U |
| #define EVTSVT_SYSTIMC1SEL_PUBID_SPI0_COMB 0x00000017U |
| #define EVTSVT_SYSTIMC1SEL_PUBID_LRFD_IRQ2 0x00000016U |
| #define EVTSVT_SYSTIMC1SEL_PUBID_LRFD_IRQ1 0x00000015U |
| #define EVTSVT_SYSTIMC1SEL_PUBID_LRFD_IRQ0 0x00000014U |
| #define EVTSVT_SYSTIMC1SEL_PUBID_FLASH_IRQ 0x00000013U |
| #define EVTSVT_SYSTIMC1SEL_PUBID_GPIO_EVT 0x00000012U |
| #define EVTSVT_SYSTIMC1SEL_PUBID_GPIO_COMB 0x00000011U |
| #define EVTSVT_SYSTIMC1SEL_PUBID_SYSTIM_COMB 0x00000010U |
| #define EVTSVT_SYSTIMC1SEL_PUBID_AON_IOC_COMB 0x00000007U |
| #define EVTSVT_SYSTIMC1SEL_PUBID_AON_LPMCMP_IRQ 0x00000006U |
| #define EVTSVT_SYSTIMC1SEL_PUBID_AON_DBG_COMB 0x00000005U |
| #define EVTSVT_SYSTIMC1SEL_PUBID_AON_RTC_COMB 0x00000004U |
| #define EVTSVT_SYSTIMC1SEL_PUBID_AON_CKM_COMB 0x00000003U |
| #define EVTSVT_SYSTIMC1SEL_PUBID_AON_PMU_COMB 0x00000002U |
| #define EVTSVT_SYSTIMC1SEL_PUBID_NONE 0x00000000U |
| #define EVTSVT_SYSTIMC2SEL_PUBID_W 7U |
| #define EVTSVT_SYSTIMC2SEL_PUBID_M 0x0000007FU |
| #define EVTSVT_SYSTIMC2SEL_PUBID_S 0U |
| #define EVTSVT_SYSTIMC2SEL_PUBID_LRFD_EVT0 0x00000032U |
| #define EVTSVT_SYSTIMC3SEL_PUBID_W 7U |
| #define EVTSVT_SYSTIMC3SEL_PUBID_M 0x0000007FU |
| #define EVTSVT_SYSTIMC3SEL_PUBID_S 0U |
| #define EVTSVT_SYSTIMC3SEL_PUBID_LRFD_EVT1 0x00000033U |
| #define EVTSVT_SYSTIMC4SEL_PUBID_W 7U |
| #define EVTSVT_SYSTIMC4SEL_PUBID_M 0x0000007FU |
| #define EVTSVT_SYSTIMC4SEL_PUBID_S 0U |
| #define EVTSVT_SYSTIMC4SEL_PUBID_LRFD_EVT2 0x00000034U |
| #define EVTSVT_SYSTIMC5SEL_PUBID_W 7U |
| #define EVTSVT_SYSTIMC5SEL_PUBID_M 0x0000007FU |
| #define EVTSVT_SYSTIMC5SEL_PUBID_S 0U |
| #define EVTSVT_SYSTIMC5SEL_PUBID_SYSTIM5 0x0000004CU |
| #define EVTSVT_SYSTIMC5SEL_PUBID_GPIO_EVT1 0x0000004BU |
| #define EVTSVT_SYSTIMC5SEL_PUBID_VCE_IRQ 0x00000046U |
| #define EVTSVT_SYSTIMC5SEL_PUBID_SPI1_COMB 0x00000045U |
| #define EVTSVT_SYSTIMC5SEL_PUBID_CAN_EVT 0x00000044U |
| #define EVTSVT_SYSTIMC5SEL_PUBID_CAN_IRQ 0x00000043U |
| #define EVTSVT_SYSTIMC5SEL_PUBID_I2S_IRQ 0x00000042U |
| #define EVTSVT_SYSTIMC5SEL_PUBID_LGPT3_ADC 0x00000041U |
| #define EVTSVT_SYSTIMC5SEL_PUBID_LGPT3_DMA 0x00000040U |
| #define EVTSVT_SYSTIMC5SEL_PUBID_LGPT3_COMB 0x0000003FU |
| #define EVTSVT_SYSTIMC5SEL_PUBID_LGPT3C2 0x0000003EU |
| #define EVTSVT_SYSTIMC5SEL_PUBID_LGPT3C1 0x0000003DU |
| #define EVTSVT_SYSTIMC5SEL_PUBID_LGPT3C0 0x0000003CU |
| #define EVTSVT_SYSTIMC5SEL_PUBID_LGPT2_ADC 0x0000003BU |
| #define EVTSVT_SYSTIMC5SEL_PUBID_LGPT2_DMA 0x0000003AU |
| #define EVTSVT_SYSTIMC5SEL_PUBID_LGPT2_COMB 0x00000039U |
| #define EVTSVT_SYSTIMC5SEL_PUBID_LGPT2C2 0x00000038U |
| #define EVTSVT_SYSTIMC5SEL_PUBID_LGPT2C1 0x00000037U |
| #define EVTSVT_SYSTIMC5SEL_PUBID_LGPT2C0 0x00000036U |
| #define EVTSVT_SYSTIMC5SEL_PUBID_UART1_COMB 0x00000035U |
| #define EVTSVT_SYSTIMC5SEL_PUBID_LRFD_EVT2 0x00000034U |
| #define EVTSVT_SYSTIMC5SEL_PUBID_LRFD_EVT1 0x00000033U |
| #define EVTSVT_SYSTIMC5SEL_PUBID_LRFD_EVT0 0x00000032U |
| #define EVTSVT_SYSTIMC5SEL_PUBID_LGPT1_ADC 0x00000031U |
| #define EVTSVT_SYSTIMC5SEL_PUBID_LGPT1_DMA 0x00000030U |
| #define EVTSVT_SYSTIMC5SEL_PUBID_LGPT1C2 0x0000002FU |
| #define EVTSVT_SYSTIMC5SEL_PUBID_LGPT1C1 0x0000002EU |
| #define EVTSVT_SYSTIMC5SEL_PUBID_LGPT1C0 0x0000002DU |
| #define EVTSVT_SYSTIMC5SEL_PUBID_LGPT0_ADC 0x0000002CU |
| #define EVTSVT_SYSTIMC5SEL_PUBID_LGPT0_DMA 0x0000002BU |
| #define EVTSVT_SYSTIMC5SEL_PUBID_LGPT0C2 0x0000002AU |
| #define EVTSVT_SYSTIMC5SEL_PUBID_LGPT0C1 0x00000029U |
| #define EVTSVT_SYSTIMC5SEL_PUBID_LGPT0C0 0x00000028U |
| #define EVTSVT_SYSTIMC5SEL_PUBID_SYSTIM4 0x00000027U |
| #define EVTSVT_SYSTIMC5SEL_PUBID_SYSTIM3 0x00000026U |
| #define EVTSVT_SYSTIMC5SEL_PUBID_SYSTIM2 0x00000025U |
| #define EVTSVT_SYSTIMC5SEL_PUBID_SYSTIM1 0x00000024U |
| #define EVTSVT_SYSTIMC5SEL_PUBID_SYSTIM0 0x00000023U |
| #define EVTSVT_SYSTIMC5SEL_PUBID_SYSTIM_LT 0x00000022U |
| #define EVTSVT_SYSTIMC5SEL_PUBID_SYSTIM_HB 0x00000021U |
| #define EVTSVT_SYSTIMC5SEL_PUBID_I2C0_IRQ 0x00000020U |
| #define EVTSVT_SYSTIMC5SEL_PUBID_UART0_COMB 0x0000001FU |
| #define EVTSVT_SYSTIMC5SEL_PUBID_AES_COMB 0x0000001EU |
| #define EVTSVT_SYSTIMC5SEL_PUBID_DMA_ERR 0x0000001DU |
| #define EVTSVT_SYSTIMC5SEL_PUBID_DMA_DONE_COMB 0x0000001CU |
| #define EVTSVT_SYSTIMC5SEL_PUBID_LGPT1_COMB 0x0000001BU |
| #define EVTSVT_SYSTIMC5SEL_PUBID_LGPT0_COMB 0x0000001AU |
| #define EVTSVT_SYSTIMC5SEL_PUBID_ADC_EVT 0x00000019U |
| #define EVTSVT_SYSTIMC5SEL_PUBID_ADC_COMB 0x00000018U |
| #define EVTSVT_SYSTIMC5SEL_PUBID_SPI0_COMB 0x00000017U |
| #define EVTSVT_SYSTIMC5SEL_PUBID_LRFD_IRQ2 0x00000016U |
| #define EVTSVT_SYSTIMC5SEL_PUBID_LRFD_IRQ1 0x00000015U |
| #define EVTSVT_SYSTIMC5SEL_PUBID_LRFD_IRQ0 0x00000014U |
| #define EVTSVT_SYSTIMC5SEL_PUBID_FLASH_IRQ 0x00000013U |
| #define EVTSVT_SYSTIMC5SEL_PUBID_GPIO_EVT 0x00000012U |
| #define EVTSVT_SYSTIMC5SEL_PUBID_GPIO_COMB 0x00000011U |
| #define EVTSVT_SYSTIMC5SEL_PUBID_SYSTIM_COMB 0x00000010U |
| #define EVTSVT_SYSTIMC5SEL_PUBID_AON_IOC_COMB 0x00000007U |
| #define EVTSVT_SYSTIMC5SEL_PUBID_AON_LPMCMP_IRQ 0x00000006U |
| #define EVTSVT_SYSTIMC5SEL_PUBID_AON_DBG_COMB 0x00000005U |
| #define EVTSVT_SYSTIMC5SEL_PUBID_AON_RTC_COMB 0x00000004U |
| #define EVTSVT_SYSTIMC5SEL_PUBID_AON_CKM_COMB 0x00000003U |
| #define EVTSVT_SYSTIMC5SEL_PUBID_AON_PMU_COMB 0x00000002U |
| #define EVTSVT_SYSTIMC5SEL_PUBID_NONE 0x00000000U |
| #define EVTSVT_ADCTRGSEL_PUBID_W 7U |
| #define EVTSVT_ADCTRGSEL_PUBID_M 0x0000007FU |
| #define EVTSVT_ADCTRGSEL_PUBID_S 0U |
| #define EVTSVT_ADCTRGSEL_PUBID_SYSTIM5 0x0000004CU |
| #define EVTSVT_ADCTRGSEL_PUBID_GPIO_EVT1 0x0000004BU |
| #define EVTSVT_ADCTRGSEL_PUBID_VCE_IRQ 0x00000046U |
| #define EVTSVT_ADCTRGSEL_PUBID_SPI1_COMB 0x00000045U |
| #define EVTSVT_ADCTRGSEL_PUBID_CAN_EVT 0x00000044U |
| #define EVTSVT_ADCTRGSEL_PUBID_CAN_IRQ 0x00000043U |
| #define EVTSVT_ADCTRGSEL_PUBID_I2S_IRQ 0x00000042U |
| #define EVTSVT_ADCTRGSEL_PUBID_LGPT3_ADC 0x00000041U |
| #define EVTSVT_ADCTRGSEL_PUBID_LGPT3_DMA 0x00000040U |
| #define EVTSVT_ADCTRGSEL_PUBID_LGPT3_COMB 0x0000003FU |
| #define EVTSVT_ADCTRGSEL_PUBID_LGPT3C2 0x0000003EU |
| #define EVTSVT_ADCTRGSEL_PUBID_LGPT3C1 0x0000003DU |
| #define EVTSVT_ADCTRGSEL_PUBID_LGPT3C0 0x0000003CU |
| #define EVTSVT_ADCTRGSEL_PUBID_LGPT2_ADC 0x0000003BU |
| #define EVTSVT_ADCTRGSEL_PUBID_LGPT2_DMA 0x0000003AU |
| #define EVTSVT_ADCTRGSEL_PUBID_LGPT2_COMB 0x00000039U |
| #define EVTSVT_ADCTRGSEL_PUBID_LGPT2C2 0x00000038U |
| #define EVTSVT_ADCTRGSEL_PUBID_LGPT2C1 0x00000037U |
| #define EVTSVT_ADCTRGSEL_PUBID_LGPT2C0 0x00000036U |
| #define EVTSVT_ADCTRGSEL_PUBID_UART1_COMB 0x00000035U |
| #define EVTSVT_ADCTRGSEL_PUBID_LRFD_EVT2 0x00000034U |
| #define EVTSVT_ADCTRGSEL_PUBID_LRFD_EVT1 0x00000033U |
| #define EVTSVT_ADCTRGSEL_PUBID_LRFD_EVT0 0x00000032U |
| #define EVTSVT_ADCTRGSEL_PUBID_LGPT1_ADC 0x00000031U |
| #define EVTSVT_ADCTRGSEL_PUBID_LGPT1_DMA 0x00000030U |
| #define EVTSVT_ADCTRGSEL_PUBID_LGPT1C2 0x0000002FU |
| #define EVTSVT_ADCTRGSEL_PUBID_LGPT1C1 0x0000002EU |
| #define EVTSVT_ADCTRGSEL_PUBID_LGPT1C0 0x0000002DU |
| #define EVTSVT_ADCTRGSEL_PUBID_LGPT0_ADC 0x0000002CU |
| #define EVTSVT_ADCTRGSEL_PUBID_LGPT0_DMA 0x0000002BU |
| #define EVTSVT_ADCTRGSEL_PUBID_LGPT0C2 0x0000002AU |
| #define EVTSVT_ADCTRGSEL_PUBID_LGPT0C1 0x00000029U |
| #define EVTSVT_ADCTRGSEL_PUBID_LGPT0C0 0x00000028U |
| #define EVTSVT_ADCTRGSEL_PUBID_SYSTIM4 0x00000027U |
| #define EVTSVT_ADCTRGSEL_PUBID_SYSTIM3 0x00000026U |
| #define EVTSVT_ADCTRGSEL_PUBID_SYSTIM2 0x00000025U |
| #define EVTSVT_ADCTRGSEL_PUBID_SYSTIM1 0x00000024U |
| #define EVTSVT_ADCTRGSEL_PUBID_SYSTIM0 0x00000023U |
| #define EVTSVT_ADCTRGSEL_PUBID_SYSTIM_LT 0x00000022U |
| #define EVTSVT_ADCTRGSEL_PUBID_SYSTIM_HB 0x00000021U |
| #define EVTSVT_ADCTRGSEL_PUBID_I2C0_IRQ 0x00000020U |
| #define EVTSVT_ADCTRGSEL_PUBID_UART0_COMB 0x0000001FU |
| #define EVTSVT_ADCTRGSEL_PUBID_AES_COMB 0x0000001EU |
| #define EVTSVT_ADCTRGSEL_PUBID_DMA_ERR 0x0000001DU |
| #define EVTSVT_ADCTRGSEL_PUBID_DMA_DONE_COMB 0x0000001CU |
| #define EVTSVT_ADCTRGSEL_PUBID_LGPT1_COMB 0x0000001BU |
| #define EVTSVT_ADCTRGSEL_PUBID_LGPT0_COMB 0x0000001AU |
| #define EVTSVT_ADCTRGSEL_PUBID_ADC_EVT 0x00000019U |
| #define EVTSVT_ADCTRGSEL_PUBID_ADC_COMB 0x00000018U |
| #define EVTSVT_ADCTRGSEL_PUBID_SPI0_COMB 0x00000017U |
| #define EVTSVT_ADCTRGSEL_PUBID_LRFD_IRQ2 0x00000016U |
| #define EVTSVT_ADCTRGSEL_PUBID_LRFD_IRQ1 0x00000015U |
| #define EVTSVT_ADCTRGSEL_PUBID_LRFD_IRQ0 0x00000014U |
| #define EVTSVT_ADCTRGSEL_PUBID_FLASH_IRQ 0x00000013U |
| #define EVTSVT_ADCTRGSEL_PUBID_GPIO_EVT 0x00000012U |
| #define EVTSVT_ADCTRGSEL_PUBID_GPIO_COMB 0x00000011U |
| #define EVTSVT_ADCTRGSEL_PUBID_SYSTIM_COMB 0x00000010U |
| #define EVTSVT_ADCTRGSEL_PUBID_AON_IOC_COMB 0x00000007U |
| #define EVTSVT_ADCTRGSEL_PUBID_AON_LPMCMP_IRQ 0x00000006U |
| #define EVTSVT_ADCTRGSEL_PUBID_AON_DBG_COMB 0x00000005U |
| #define EVTSVT_ADCTRGSEL_PUBID_AON_RTC_COMB 0x00000004U |
| #define EVTSVT_ADCTRGSEL_PUBID_AON_CKM_COMB 0x00000003U |
| #define EVTSVT_ADCTRGSEL_PUBID_AON_PMU_COMB 0x00000002U |
| #define EVTSVT_ADCTRGSEL_PUBID_NONE 0x00000000U |
| #define EVTSVT_LGPTSYNCSEL_PUBID_W 7U |
| #define EVTSVT_LGPTSYNCSEL_PUBID_M 0x0000007FU |
| #define EVTSVT_LGPTSYNCSEL_PUBID_S 0U |
| #define EVTSVT_LGPTSYNCSEL_PUBID_SYSTIM5 0x0000004CU |
| #define EVTSVT_LGPTSYNCSEL_PUBID_GPIO_EVT1 0x0000004BU |
| #define EVTSVT_LGPTSYNCSEL_PUBID_VCE_IRQ 0x00000046U |
| #define EVTSVT_LGPTSYNCSEL_PUBID_SPI1_COMB 0x00000045U |
| #define EVTSVT_LGPTSYNCSEL_PUBID_CAN_EVT 0x00000044U |
| #define EVTSVT_LGPTSYNCSEL_PUBID_CAN_IRQ 0x00000043U |
| #define EVTSVT_LGPTSYNCSEL_PUBID_I2S_IRQ 0x00000042U |
| #define EVTSVT_LGPTSYNCSEL_PUBID_LGPT3_ADC 0x00000041U |
| #define EVTSVT_LGPTSYNCSEL_PUBID_LGPT3_DMA 0x00000040U |
| #define EVTSVT_LGPTSYNCSEL_PUBID_LGPT3_COMB 0x0000003FU |
| #define EVTSVT_LGPTSYNCSEL_PUBID_LGPT3C2 0x0000003EU |
| #define EVTSVT_LGPTSYNCSEL_PUBID_LGPT3C1 0x0000003DU |
| #define EVTSVT_LGPTSYNCSEL_PUBID_LGPT3C0 0x0000003CU |
| #define EVTSVT_LGPTSYNCSEL_PUBID_LGPT2_ADC 0x0000003BU |
| #define EVTSVT_LGPTSYNCSEL_PUBID_LGPT2_DMA 0x0000003AU |
| #define EVTSVT_LGPTSYNCSEL_PUBID_LGPT2_COMB 0x00000039U |
| #define EVTSVT_LGPTSYNCSEL_PUBID_LGPT2C2 0x00000038U |
| #define EVTSVT_LGPTSYNCSEL_PUBID_LGPT2C1 0x00000037U |
| #define EVTSVT_LGPTSYNCSEL_PUBID_LGPT2C0 0x00000036U |
| #define EVTSVT_LGPTSYNCSEL_PUBID_UART1_COMB 0x00000035U |
| #define EVTSVT_LGPTSYNCSEL_PUBID_LRFD_EVT2 0x00000034U |
| #define EVTSVT_LGPTSYNCSEL_PUBID_LRFD_EVT1 0x00000033U |
| #define EVTSVT_LGPTSYNCSEL_PUBID_LRFD_EVT0 0x00000032U |
| #define EVTSVT_LGPTSYNCSEL_PUBID_LGPT1_ADC 0x00000031U |
| #define EVTSVT_LGPTSYNCSEL_PUBID_LGPT1_DMA 0x00000030U |
| #define EVTSVT_LGPTSYNCSEL_PUBID_LGPT1C2 0x0000002FU |
| #define EVTSVT_LGPTSYNCSEL_PUBID_LGPT1C1 0x0000002EU |
| #define EVTSVT_LGPTSYNCSEL_PUBID_LGPT1C0 0x0000002DU |
| #define EVTSVT_LGPTSYNCSEL_PUBID_LGPT0_ADC 0x0000002CU |
| #define EVTSVT_LGPTSYNCSEL_PUBID_LGPT0_DMA 0x0000002BU |
| #define EVTSVT_LGPTSYNCSEL_PUBID_LGPT0C2 0x0000002AU |
| #define EVTSVT_LGPTSYNCSEL_PUBID_LGPT0C1 0x00000029U |
| #define EVTSVT_LGPTSYNCSEL_PUBID_LGPT0C0 0x00000028U |
| #define EVTSVT_LGPTSYNCSEL_PUBID_SYSTIM4 0x00000027U |
| #define EVTSVT_LGPTSYNCSEL_PUBID_SYSTIM3 0x00000026U |
| #define EVTSVT_LGPTSYNCSEL_PUBID_SYSTIM2 0x00000025U |
| #define EVTSVT_LGPTSYNCSEL_PUBID_SYSTIM1 0x00000024U |
| #define EVTSVT_LGPTSYNCSEL_PUBID_SYSTIM0 0x00000023U |
| #define EVTSVT_LGPTSYNCSEL_PUBID_SYSTIM_LT 0x00000022U |
| #define EVTSVT_LGPTSYNCSEL_PUBID_SYSTIM_HB 0x00000021U |
| #define EVTSVT_LGPTSYNCSEL_PUBID_I2C0_IRQ 0x00000020U |
| #define EVTSVT_LGPTSYNCSEL_PUBID_UART0_COMB 0x0000001FU |
| #define EVTSVT_LGPTSYNCSEL_PUBID_AES_COMB 0x0000001EU |
| #define EVTSVT_LGPTSYNCSEL_PUBID_DMA_ERR 0x0000001DU |
| #define EVTSVT_LGPTSYNCSEL_PUBID_DMA_DONE_COMB 0x0000001CU |
| #define EVTSVT_LGPTSYNCSEL_PUBID_LGPT1_COMB 0x0000001BU |
| #define EVTSVT_LGPTSYNCSEL_PUBID_LGPT0_COMB 0x0000001AU |
| #define EVTSVT_LGPTSYNCSEL_PUBID_ADC_EVT 0x00000019U |
| #define EVTSVT_LGPTSYNCSEL_PUBID_ADC_COMB 0x00000018U |
| #define EVTSVT_LGPTSYNCSEL_PUBID_SPI0_COMB 0x00000017U |
| #define EVTSVT_LGPTSYNCSEL_PUBID_LRFD_IRQ2 0x00000016U |
| #define EVTSVT_LGPTSYNCSEL_PUBID_LRFD_IRQ1 0x00000015U |
| #define EVTSVT_LGPTSYNCSEL_PUBID_LRFD_IRQ0 0x00000014U |
| #define EVTSVT_LGPTSYNCSEL_PUBID_FLASH_IRQ 0x00000013U |
| #define EVTSVT_LGPTSYNCSEL_PUBID_GPIO_EVT 0x00000012U |
| #define EVTSVT_LGPTSYNCSEL_PUBID_GPIO_COMB 0x00000011U |
| #define EVTSVT_LGPTSYNCSEL_PUBID_SYSTIM_COMB 0x00000010U |
| #define EVTSVT_LGPTSYNCSEL_PUBID_AON_IOC_COMB 0x00000007U |
| #define EVTSVT_LGPTSYNCSEL_PUBID_AON_LPMCMP_IRQ 0x00000006U |
| #define EVTSVT_LGPTSYNCSEL_PUBID_AON_DBG_COMB 0x00000005U |
| #define EVTSVT_LGPTSYNCSEL_PUBID_AON_RTC_COMB 0x00000004U |
| #define EVTSVT_LGPTSYNCSEL_PUBID_AON_CKM_COMB 0x00000003U |
| #define EVTSVT_LGPTSYNCSEL_PUBID_AON_PMU_COMB 0x00000002U |
| #define EVTSVT_LGPTSYNCSEL_PUBID_NONE 0x00000000U |
| #define EVTSVT_LGPT0IN0SEL_PUBID_W 7U |
| #define EVTSVT_LGPT0IN0SEL_PUBID_M 0x0000007FU |
| #define EVTSVT_LGPT0IN0SEL_PUBID_S 0U |
| #define EVTSVT_LGPT0IN0SEL_PUBID_SYSTIM5 0x0000004CU |
| #define EVTSVT_LGPT0IN0SEL_PUBID_GPIO_EVT1 0x0000004BU |
| #define EVTSVT_LGPT0IN0SEL_PUBID_VCE_IRQ 0x00000046U |
| #define EVTSVT_LGPT0IN0SEL_PUBID_SPI1_COMB 0x00000045U |
| #define EVTSVT_LGPT0IN0SEL_PUBID_CAN_EVT 0x00000044U |
| #define EVTSVT_LGPT0IN0SEL_PUBID_CAN_IRQ 0x00000043U |
| #define EVTSVT_LGPT0IN0SEL_PUBID_I2S_IRQ 0x00000042U |
| #define EVTSVT_LGPT0IN0SEL_PUBID_LGPT3_ADC 0x00000041U |
| #define EVTSVT_LGPT0IN0SEL_PUBID_LGPT3_DMA 0x00000040U |
| #define EVTSVT_LGPT0IN0SEL_PUBID_LGPT3_COMB 0x0000003FU |
| #define EVTSVT_LGPT0IN0SEL_PUBID_LGPT3C2 0x0000003EU |
| #define EVTSVT_LGPT0IN0SEL_PUBID_LGPT3C1 0x0000003DU |
| #define EVTSVT_LGPT0IN0SEL_PUBID_LGPT3C0 0x0000003CU |
| #define EVTSVT_LGPT0IN0SEL_PUBID_LGPT2_ADC 0x0000003BU |
| #define EVTSVT_LGPT0IN0SEL_PUBID_LGPT2_DMA 0x0000003AU |
| #define EVTSVT_LGPT0IN0SEL_PUBID_LGPT2_COMB 0x00000039U |
| #define EVTSVT_LGPT0IN0SEL_PUBID_LGPT2C2 0x00000038U |
| #define EVTSVT_LGPT0IN0SEL_PUBID_LGPT2C1 0x00000037U |
| #define EVTSVT_LGPT0IN0SEL_PUBID_LGPT2C0 0x00000036U |
| #define EVTSVT_LGPT0IN0SEL_PUBID_UART1_COMB 0x00000035U |
| #define EVTSVT_LGPT0IN0SEL_PUBID_LRFD_EVT2 0x00000034U |
| #define EVTSVT_LGPT0IN0SEL_PUBID_LRFD_EVT1 0x00000033U |
| #define EVTSVT_LGPT0IN0SEL_PUBID_LRFD_EVT0 0x00000032U |
| #define EVTSVT_LGPT0IN0SEL_PUBID_LGPT1_ADC 0x00000031U |
| #define EVTSVT_LGPT0IN0SEL_PUBID_LGPT1_DMA 0x00000030U |
| #define EVTSVT_LGPT0IN0SEL_PUBID_LGPT1C2 0x0000002FU |
| #define EVTSVT_LGPT0IN0SEL_PUBID_LGPT1C1 0x0000002EU |
| #define EVTSVT_LGPT0IN0SEL_PUBID_LGPT1C0 0x0000002DU |
| #define EVTSVT_LGPT0IN0SEL_PUBID_LGPT0_ADC 0x0000002CU |
| #define EVTSVT_LGPT0IN0SEL_PUBID_LGPT0_DMA 0x0000002BU |
| #define EVTSVT_LGPT0IN0SEL_PUBID_LGPT0C2 0x0000002AU |
| #define EVTSVT_LGPT0IN0SEL_PUBID_LGPT0C1 0x00000029U |
| #define EVTSVT_LGPT0IN0SEL_PUBID_LGPT0C0 0x00000028U |
| #define EVTSVT_LGPT0IN0SEL_PUBID_SYSTIM4 0x00000027U |
| #define EVTSVT_LGPT0IN0SEL_PUBID_SYSTIM3 0x00000026U |
| #define EVTSVT_LGPT0IN0SEL_PUBID_SYSTIM2 0x00000025U |
| #define EVTSVT_LGPT0IN0SEL_PUBID_SYSTIM1 0x00000024U |
| #define EVTSVT_LGPT0IN0SEL_PUBID_SYSTIM0 0x00000023U |
| #define EVTSVT_LGPT0IN0SEL_PUBID_SYSTIM_LT 0x00000022U |
| #define EVTSVT_LGPT0IN0SEL_PUBID_SYSTIM_HB 0x00000021U |
| #define EVTSVT_LGPT0IN0SEL_PUBID_I2C0_IRQ 0x00000020U |
| #define EVTSVT_LGPT0IN0SEL_PUBID_UART0_COMB 0x0000001FU |
| #define EVTSVT_LGPT0IN0SEL_PUBID_AES_COMB 0x0000001EU |
| #define EVTSVT_LGPT0IN0SEL_PUBID_DMA_ERR 0x0000001DU |
| #define EVTSVT_LGPT0IN0SEL_PUBID_DMA_DONE_COMB 0x0000001CU |
| #define EVTSVT_LGPT0IN0SEL_PUBID_LGPT1_COMB 0x0000001BU |
| #define EVTSVT_LGPT0IN0SEL_PUBID_LGPT0_COMB 0x0000001AU |
| #define EVTSVT_LGPT0IN0SEL_PUBID_ADC_EVT 0x00000019U |
| #define EVTSVT_LGPT0IN0SEL_PUBID_ADC_COMB 0x00000018U |
| #define EVTSVT_LGPT0IN0SEL_PUBID_SPI0_COMB 0x00000017U |
| #define EVTSVT_LGPT0IN0SEL_PUBID_LRFD_IRQ2 0x00000016U |
| #define EVTSVT_LGPT0IN0SEL_PUBID_LRFD_IRQ1 0x00000015U |
| #define EVTSVT_LGPT0IN0SEL_PUBID_LRFD_IRQ0 0x00000014U |
| #define EVTSVT_LGPT0IN0SEL_PUBID_FLASH_IRQ 0x00000013U |
| #define EVTSVT_LGPT0IN0SEL_PUBID_GPIO_EVT 0x00000012U |
| #define EVTSVT_LGPT0IN0SEL_PUBID_GPIO_COMB 0x00000011U |
| #define EVTSVT_LGPT0IN0SEL_PUBID_SYSTIM_COMB 0x00000010U |
| #define EVTSVT_LGPT0IN0SEL_PUBID_AON_IOC_COMB 0x00000007U |
| #define EVTSVT_LGPT0IN0SEL_PUBID_AON_LPMCMP_IRQ 0x00000006U |
| #define EVTSVT_LGPT0IN0SEL_PUBID_AON_DBG_COMB 0x00000005U |
| #define EVTSVT_LGPT0IN0SEL_PUBID_AON_RTC_COMB 0x00000004U |
| #define EVTSVT_LGPT0IN0SEL_PUBID_AON_CKM_COMB 0x00000003U |
| #define EVTSVT_LGPT0IN0SEL_PUBID_AON_PMU_COMB 0x00000002U |
| #define EVTSVT_LGPT0IN0SEL_PUBID_NONE 0x00000000U |
| #define EVTSVT_LGPT0IN1SEL_PUBID_W 7U |
| #define EVTSVT_LGPT0IN1SEL_PUBID_M 0x0000007FU |
| #define EVTSVT_LGPT0IN1SEL_PUBID_S 0U |
| #define EVTSVT_LGPT0IN1SEL_PUBID_SYSTIM5 0x0000004CU |
| #define EVTSVT_LGPT0IN1SEL_PUBID_GPIO_EVT1 0x0000004BU |
| #define EVTSVT_LGPT0IN1SEL_PUBID_CAN_EVT 0x00000044U |
| #define EVTSVT_LGPT0IN1SEL_PUBID_LGPT3_ADC 0x00000041U |
| #define EVTSVT_LGPT0IN1SEL_PUBID_LGPT3_DMA 0x00000040U |
| #define EVTSVT_LGPT0IN1SEL_PUBID_LGPT3C2 0x0000003EU |
| #define EVTSVT_LGPT0IN1SEL_PUBID_LGPT3C1 0x0000003DU |
| #define EVTSVT_LGPT0IN1SEL_PUBID_LGPT3C0 0x0000003CU |
| #define EVTSVT_LGPT0IN1SEL_PUBID_LGPT2_ADC 0x0000003BU |
| #define EVTSVT_LGPT0IN1SEL_PUBID_LGPT2_DMA 0x0000003AU |
| #define EVTSVT_LGPT0IN1SEL_PUBID_LGPT2C2 0x00000038U |
| #define EVTSVT_LGPT0IN1SEL_PUBID_LGPT2C1 0x00000037U |
| #define EVTSVT_LGPT0IN1SEL_PUBID_LGPT2C0 0x00000036U |
| #define EVTSVT_LGPT0IN1SEL_PUBID_LRFD_EVT2 0x00000034U |
| #define EVTSVT_LGPT0IN1SEL_PUBID_LRFD_EVT1 0x00000033U |
| #define EVTSVT_LGPT0IN1SEL_PUBID_LRFD_EVT0 0x00000032U |
| #define EVTSVT_LGPT0IN1SEL_PUBID_LGPT1_ADC 0x00000031U |
| #define EVTSVT_LGPT0IN1SEL_PUBID_LGPT1_DMA 0x00000030U |
| #define EVTSVT_LGPT0IN1SEL_PUBID_LGPT1C2 0x0000002FU |
| #define EVTSVT_LGPT0IN1SEL_PUBID_LGPT1C1 0x0000002EU |
| #define EVTSVT_LGPT0IN1SEL_PUBID_LGPT1C0 0x0000002DU |
| #define EVTSVT_LGPT0IN1SEL_PUBID_LGPT0_ADC 0x0000002CU |
| #define EVTSVT_LGPT0IN1SEL_PUBID_LGPT0_DMA 0x0000002BU |
| #define EVTSVT_LGPT0IN1SEL_PUBID_LGPT0C2 0x0000002AU |
| #define EVTSVT_LGPT0IN1SEL_PUBID_LGPT0C1 0x00000029U |
| #define EVTSVT_LGPT0IN1SEL_PUBID_LGPT0C0 0x00000028U |
| #define EVTSVT_LGPT0IN1SEL_PUBID_SYSTIM4 0x00000027U |
| #define EVTSVT_LGPT0IN1SEL_PUBID_SYSTIM3 0x00000026U |
| #define EVTSVT_LGPT0IN1SEL_PUBID_SYSTIM2 0x00000025U |
| #define EVTSVT_LGPT0IN1SEL_PUBID_SYSTIM1 0x00000024U |
| #define EVTSVT_LGPT0IN1SEL_PUBID_SYSTIM0 0x00000023U |
| #define EVTSVT_LGPT0IN1SEL_PUBID_SYSTIM_LT 0x00000022U |
| #define EVTSVT_LGPT0IN1SEL_PUBID_SYSTIM_HB 0x00000021U |
| #define EVTSVT_LGPT0IN1SEL_PUBID_ADC_EVT 0x00000019U |
| #define EVTSVT_LGPT0IN1SEL_PUBID_GPIO_EVT 0x00000012U |
| #define EVTSVT_LGPT0IN1SEL_PUBID_NONE 0x00000000U |
| #define EVTSVT_LGPT0IN2SEL_PUBID_W 7U |
| #define EVTSVT_LGPT0IN2SEL_PUBID_M 0x0000007FU |
| #define EVTSVT_LGPT0IN2SEL_PUBID_S 0U |
| #define EVTSVT_LGPT0IN2SEL_PUBID_SYSTIM5 0x0000004CU |
| #define EVTSVT_LGPT0IN2SEL_PUBID_GPIO_EVT1 0x0000004BU |
| #define EVTSVT_LGPT0IN2SEL_PUBID_CAN_EVT 0x00000044U |
| #define EVTSVT_LGPT0IN2SEL_PUBID_LGPT3_ADC 0x00000041U |
| #define EVTSVT_LGPT0IN2SEL_PUBID_LGPT3_DMA 0x00000040U |
| #define EVTSVT_LGPT0IN2SEL_PUBID_LGPT3C2 0x0000003EU |
| #define EVTSVT_LGPT0IN2SEL_PUBID_LGPT3C1 0x0000003DU |
| #define EVTSVT_LGPT0IN2SEL_PUBID_LGPT3C0 0x0000003CU |
| #define EVTSVT_LGPT0IN2SEL_PUBID_LGPT2_ADC 0x0000003BU |
| #define EVTSVT_LGPT0IN2SEL_PUBID_LGPT2_DMA 0x0000003AU |
| #define EVTSVT_LGPT0IN2SEL_PUBID_LGPT2C2 0x00000038U |
| #define EVTSVT_LGPT0IN2SEL_PUBID_LGPT2C1 0x00000037U |
| #define EVTSVT_LGPT0IN2SEL_PUBID_LGPT2C0 0x00000036U |
| #define EVTSVT_LGPT0IN2SEL_PUBID_LRFD_EVT2 0x00000034U |
| #define EVTSVT_LGPT0IN2SEL_PUBID_LRFD_EVT1 0x00000033U |
| #define EVTSVT_LGPT0IN2SEL_PUBID_LRFD_EVT0 0x00000032U |
| #define EVTSVT_LGPT0IN2SEL_PUBID_LGPT1_ADC 0x00000031U |
| #define EVTSVT_LGPT0IN2SEL_PUBID_LGPT1_DMA 0x00000030U |
| #define EVTSVT_LGPT0IN2SEL_PUBID_LGPT1C2 0x0000002FU |
| #define EVTSVT_LGPT0IN2SEL_PUBID_LGPT1C1 0x0000002EU |
| #define EVTSVT_LGPT0IN2SEL_PUBID_LGPT1C0 0x0000002DU |
| #define EVTSVT_LGPT0IN2SEL_PUBID_LGPT0_ADC 0x0000002CU |
| #define EVTSVT_LGPT0IN2SEL_PUBID_LGPT0_DMA 0x0000002BU |
| #define EVTSVT_LGPT0IN2SEL_PUBID_LGPT0C2 0x0000002AU |
| #define EVTSVT_LGPT0IN2SEL_PUBID_LGPT0C1 0x00000029U |
| #define EVTSVT_LGPT0IN2SEL_PUBID_LGPT0C0 0x00000028U |
| #define EVTSVT_LGPT0IN2SEL_PUBID_SYSTIM4 0x00000027U |
| #define EVTSVT_LGPT0IN2SEL_PUBID_SYSTIM3 0x00000026U |
| #define EVTSVT_LGPT0IN2SEL_PUBID_SYSTIM2 0x00000025U |
| #define EVTSVT_LGPT0IN2SEL_PUBID_SYSTIM1 0x00000024U |
| #define EVTSVT_LGPT0IN2SEL_PUBID_SYSTIM0 0x00000023U |
| #define EVTSVT_LGPT0IN2SEL_PUBID_SYSTIM_LT 0x00000022U |
| #define EVTSVT_LGPT0IN2SEL_PUBID_SYSTIM_HB 0x00000021U |
| #define EVTSVT_LGPT0IN2SEL_PUBID_ADC_EVT 0x00000019U |
| #define EVTSVT_LGPT0IN2SEL_PUBID_GPIO_EVT 0x00000012U |
| #define EVTSVT_LGPT0IN2SEL_PUBID_NONE 0x00000000U |
| #define EVTSVT_LGPT0TENSEL_PUBID_W 7U |
| #define EVTSVT_LGPT0TENSEL_PUBID_M 0x0000007FU |
| #define EVTSVT_LGPT0TENSEL_PUBID_S 0U |
| #define EVTSVT_LGPT0TENSEL_PUBID_SYSTIM5 0x0000004CU |
| #define EVTSVT_LGPT0TENSEL_PUBID_GPIO_EVT1 0x0000004BU |
| #define EVTSVT_LGPT0TENSEL_PUBID_CAN_EVT 0x00000044U |
| #define EVTSVT_LGPT0TENSEL_PUBID_LGPT3_ADC 0x00000041U |
| #define EVTSVT_LGPT0TENSEL_PUBID_LGPT3_DMA 0x00000040U |
| #define EVTSVT_LGPT0TENSEL_PUBID_LGPT3C2 0x0000003EU |
| #define EVTSVT_LGPT0TENSEL_PUBID_LGPT3C1 0x0000003DU |
| #define EVTSVT_LGPT0TENSEL_PUBID_LGPT3C0 0x0000003CU |
| #define EVTSVT_LGPT0TENSEL_PUBID_LGPT2_ADC 0x0000003BU |
| #define EVTSVT_LGPT0TENSEL_PUBID_LGPT2_DMA 0x0000003AU |
| #define EVTSVT_LGPT0TENSEL_PUBID_LGPT2C2 0x00000038U |
| #define EVTSVT_LGPT0TENSEL_PUBID_LGPT2C1 0x00000037U |
| #define EVTSVT_LGPT0TENSEL_PUBID_LGPT2C0 0x00000036U |
| #define EVTSVT_LGPT0TENSEL_PUBID_LRFD_EVT2 0x00000034U |
| #define EVTSVT_LGPT0TENSEL_PUBID_LRFD_EVT1 0x00000033U |
| #define EVTSVT_LGPT0TENSEL_PUBID_LRFD_EVT0 0x00000032U |
| #define EVTSVT_LGPT0TENSEL_PUBID_LGPT1_ADC 0x00000031U |
| #define EVTSVT_LGPT0TENSEL_PUBID_LGPT1_DMA 0x00000030U |
| #define EVTSVT_LGPT0TENSEL_PUBID_LGPT1C2 0x0000002FU |
| #define EVTSVT_LGPT0TENSEL_PUBID_LGPT1C1 0x0000002EU |
| #define EVTSVT_LGPT0TENSEL_PUBID_LGPT1C0 0x0000002DU |
| #define EVTSVT_LGPT0TENSEL_PUBID_LGPT0_ADC 0x0000002CU |
| #define EVTSVT_LGPT0TENSEL_PUBID_LGPT0_DMA 0x0000002BU |
| #define EVTSVT_LGPT0TENSEL_PUBID_LGPT0C2 0x0000002AU |
| #define EVTSVT_LGPT0TENSEL_PUBID_LGPT0C1 0x00000029U |
| #define EVTSVT_LGPT0TENSEL_PUBID_LGPT0C0 0x00000028U |
| #define EVTSVT_LGPT0TENSEL_PUBID_SYSTIM4 0x00000027U |
| #define EVTSVT_LGPT0TENSEL_PUBID_SYSTIM3 0x00000026U |
| #define EVTSVT_LGPT0TENSEL_PUBID_SYSTIM2 0x00000025U |
| #define EVTSVT_LGPT0TENSEL_PUBID_SYSTIM1 0x00000024U |
| #define EVTSVT_LGPT0TENSEL_PUBID_SYSTIM0 0x00000023U |
| #define EVTSVT_LGPT0TENSEL_PUBID_SYSTIM_LT 0x00000022U |
| #define EVTSVT_LGPT0TENSEL_PUBID_SYSTIM_HB 0x00000021U |
| #define EVTSVT_LGPT0TENSEL_PUBID_ADC_EVT 0x00000019U |
| #define EVTSVT_LGPT0TENSEL_PUBID_GPIO_EVT 0x00000012U |
| #define EVTSVT_LGPT0TENSEL_PUBID_NONE 0x00000000U |
| #define EVTSVT_LGPT1IN0SEL_PUBID_W 7U |
| #define EVTSVT_LGPT1IN0SEL_PUBID_M 0x0000007FU |
| #define EVTSVT_LGPT1IN0SEL_PUBID_S 0U |
| #define EVTSVT_LGPT1IN0SEL_PUBID_SYSTIM5 0x0000004CU |
| #define EVTSVT_LGPT1IN0SEL_PUBID_GPIO_EVT1 0x0000004BU |
| #define EVTSVT_LGPT1IN0SEL_PUBID_VCE_IRQ 0x00000046U |
| #define EVTSVT_LGPT1IN0SEL_PUBID_SPI1_COMB 0x00000045U |
| #define EVTSVT_LGPT1IN0SEL_PUBID_CAN_EVT 0x00000044U |
| #define EVTSVT_LGPT1IN0SEL_PUBID_CAN_IRQ 0x00000043U |
| #define EVTSVT_LGPT1IN0SEL_PUBID_I2S_IRQ 0x00000042U |
| #define EVTSVT_LGPT1IN0SEL_PUBID_LGPT3_ADC 0x00000041U |
| #define EVTSVT_LGPT1IN0SEL_PUBID_LGPT3_DMA 0x00000040U |
| #define EVTSVT_LGPT1IN0SEL_PUBID_LGPT3_COMB 0x0000003FU |
| #define EVTSVT_LGPT1IN0SEL_PUBID_LGPT3C2 0x0000003EU |
| #define EVTSVT_LGPT1IN0SEL_PUBID_LGPT3C1 0x0000003DU |
| #define EVTSVT_LGPT1IN0SEL_PUBID_LGPT3C0 0x0000003CU |
| #define EVTSVT_LGPT1IN0SEL_PUBID_LGPT2_ADC 0x0000003BU |
| #define EVTSVT_LGPT1IN0SEL_PUBID_LGPT2_DMA 0x0000003AU |
| #define EVTSVT_LGPT1IN0SEL_PUBID_LGPT2_COMB 0x00000039U |
| #define EVTSVT_LGPT1IN0SEL_PUBID_LGPT2C2 0x00000038U |
| #define EVTSVT_LGPT1IN0SEL_PUBID_LGPT2C1 0x00000037U |
| #define EVTSVT_LGPT1IN0SEL_PUBID_LGPT2C0 0x00000036U |
| #define EVTSVT_LGPT1IN0SEL_PUBID_UART1_COMB 0x00000035U |
| #define EVTSVT_LGPT1IN0SEL_PUBID_LRFD_EVT2 0x00000034U |
| #define EVTSVT_LGPT1IN0SEL_PUBID_LRFD_EVT1 0x00000033U |
| #define EVTSVT_LGPT1IN0SEL_PUBID_LRFD_EVT0 0x00000032U |
| #define EVTSVT_LGPT1IN0SEL_PUBID_LGPT1_ADC 0x00000031U |
| #define EVTSVT_LGPT1IN0SEL_PUBID_LGPT1_DMA 0x00000030U |
| #define EVTSVT_LGPT1IN0SEL_PUBID_LGPT1C2 0x0000002FU |
| #define EVTSVT_LGPT1IN0SEL_PUBID_LGPT1C1 0x0000002EU |
| #define EVTSVT_LGPT1IN0SEL_PUBID_LGPT1C0 0x0000002DU |
| #define EVTSVT_LGPT1IN0SEL_PUBID_LGPT0_ADC 0x0000002CU |
| #define EVTSVT_LGPT1IN0SEL_PUBID_LGPT0_DMA 0x0000002BU |
| #define EVTSVT_LGPT1IN0SEL_PUBID_LGPT0C2 0x0000002AU |
| #define EVTSVT_LGPT1IN0SEL_PUBID_LGPT0C1 0x00000029U |
| #define EVTSVT_LGPT1IN0SEL_PUBID_LGPT0C0 0x00000028U |
| #define EVTSVT_LGPT1IN0SEL_PUBID_SYSTIM4 0x00000027U |
| #define EVTSVT_LGPT1IN0SEL_PUBID_SYSTIM3 0x00000026U |
| #define EVTSVT_LGPT1IN0SEL_PUBID_SYSTIM2 0x00000025U |
| #define EVTSVT_LGPT1IN0SEL_PUBID_SYSTIM1 0x00000024U |
| #define EVTSVT_LGPT1IN0SEL_PUBID_SYSTIM0 0x00000023U |
| #define EVTSVT_LGPT1IN0SEL_PUBID_SYSTIM_LT 0x00000022U |
| #define EVTSVT_LGPT1IN0SEL_PUBID_SYSTIM_HB 0x00000021U |
| #define EVTSVT_LGPT1IN0SEL_PUBID_I2C0_IRQ 0x00000020U |
| #define EVTSVT_LGPT1IN0SEL_PUBID_UART0_COMB 0x0000001FU |
| #define EVTSVT_LGPT1IN0SEL_PUBID_AES_COMB 0x0000001EU |
| #define EVTSVT_LGPT1IN0SEL_PUBID_DMA_ERR 0x0000001DU |
| #define EVTSVT_LGPT1IN0SEL_PUBID_DMA_DONE_COMB 0x0000001CU |
| #define EVTSVT_LGPT1IN0SEL_PUBID_LGPT1_COMB 0x0000001BU |
| #define EVTSVT_LGPT1IN0SEL_PUBID_LGPT0_COMB 0x0000001AU |
| #define EVTSVT_LGPT1IN0SEL_PUBID_ADC_EVT 0x00000019U |
| #define EVTSVT_LGPT1IN0SEL_PUBID_ADC_COMB 0x00000018U |
| #define EVTSVT_LGPT1IN0SEL_PUBID_SPI0_COMB 0x00000017U |
| #define EVTSVT_LGPT1IN0SEL_PUBID_LRFD_IRQ2 0x00000016U |
| #define EVTSVT_LGPT1IN0SEL_PUBID_LRFD_IRQ1 0x00000015U |
| #define EVTSVT_LGPT1IN0SEL_PUBID_LRFD_IRQ0 0x00000014U |
| #define EVTSVT_LGPT1IN0SEL_PUBID_FLASH_IRQ 0x00000013U |
| #define EVTSVT_LGPT1IN0SEL_PUBID_GPIO_EVT 0x00000012U |
| #define EVTSVT_LGPT1IN0SEL_PUBID_GPIO_COMB 0x00000011U |
| #define EVTSVT_LGPT1IN0SEL_PUBID_SYSTIM_COMB 0x00000010U |
| #define EVTSVT_LGPT1IN0SEL_PUBID_AON_IOC_COMB 0x00000007U |
| #define EVTSVT_LGPT1IN0SEL_PUBID_AON_LPMCMP_IRQ 0x00000006U |
| #define EVTSVT_LGPT1IN0SEL_PUBID_AON_DBG_COMB 0x00000005U |
| #define EVTSVT_LGPT1IN0SEL_PUBID_AON_RTC_COMB 0x00000004U |
| #define EVTSVT_LGPT1IN0SEL_PUBID_AON_CKM_COMB 0x00000003U |
| #define EVTSVT_LGPT1IN0SEL_PUBID_AON_PMU_COMB 0x00000002U |
| #define EVTSVT_LGPT1IN0SEL_PUBID_NONE 0x00000000U |
| #define EVTSVT_LGPT1IN1SEL_PUBID_W 7U |
| #define EVTSVT_LGPT1IN1SEL_PUBID_M 0x0000007FU |
| #define EVTSVT_LGPT1IN1SEL_PUBID_S 0U |
| #define EVTSVT_LGPT1IN1SEL_PUBID_SYSTIM5 0x0000004CU |
| #define EVTSVT_LGPT1IN1SEL_PUBID_GPIO_EVT1 0x0000004BU |
| #define EVTSVT_LGPT1IN1SEL_PUBID_CAN_EVT 0x00000044U |
| #define EVTSVT_LGPT1IN1SEL_PUBID_LGPT3_ADC 0x00000041U |
| #define EVTSVT_LGPT1IN1SEL_PUBID_LGPT3_DMA 0x00000040U |
| #define EVTSVT_LGPT1IN1SEL_PUBID_LGPT3C2 0x0000003EU |
| #define EVTSVT_LGPT1IN1SEL_PUBID_LGPT3C1 0x0000003DU |
| #define EVTSVT_LGPT1IN1SEL_PUBID_LGPT3C0 0x0000003CU |
| #define EVTSVT_LGPT1IN1SEL_PUBID_LGPT2_ADC 0x0000003BU |
| #define EVTSVT_LGPT1IN1SEL_PUBID_LGPT2_DMA 0x0000003AU |
| #define EVTSVT_LGPT1IN1SEL_PUBID_LGPT2C2 0x00000038U |
| #define EVTSVT_LGPT1IN1SEL_PUBID_LGPT2C1 0x00000037U |
| #define EVTSVT_LGPT1IN1SEL_PUBID_LGPT2C0 0x00000036U |
| #define EVTSVT_LGPT1IN1SEL_PUBID_LRFD_EVT2 0x00000034U |
| #define EVTSVT_LGPT1IN1SEL_PUBID_LRFD_EVT1 0x00000033U |
| #define EVTSVT_LGPT1IN1SEL_PUBID_LRFD_EVT0 0x00000032U |
| #define EVTSVT_LGPT1IN1SEL_PUBID_LGPT1_ADC 0x00000031U |
| #define EVTSVT_LGPT1IN1SEL_PUBID_LGPT1_DMA 0x00000030U |
| #define EVTSVT_LGPT1IN1SEL_PUBID_LGPT1C2 0x0000002FU |
| #define EVTSVT_LGPT1IN1SEL_PUBID_LGPT1C1 0x0000002EU |
| #define EVTSVT_LGPT1IN1SEL_PUBID_LGPT1C0 0x0000002DU |
| #define EVTSVT_LGPT1IN1SEL_PUBID_LGPT0_ADC 0x0000002CU |
| #define EVTSVT_LGPT1IN1SEL_PUBID_LGPT0_DMA 0x0000002BU |
| #define EVTSVT_LGPT1IN1SEL_PUBID_LGPT0C2 0x0000002AU |
| #define EVTSVT_LGPT1IN1SEL_PUBID_LGPT0C1 0x00000029U |
| #define EVTSVT_LGPT1IN1SEL_PUBID_LGPT0C0 0x00000028U |
| #define EVTSVT_LGPT1IN1SEL_PUBID_SYSTIM4 0x00000027U |
| #define EVTSVT_LGPT1IN1SEL_PUBID_SYSTIM3 0x00000026U |
| #define EVTSVT_LGPT1IN1SEL_PUBID_SYSTIM2 0x00000025U |
| #define EVTSVT_LGPT1IN1SEL_PUBID_SYSTIM1 0x00000024U |
| #define EVTSVT_LGPT1IN1SEL_PUBID_SYSTIM0 0x00000023U |
| #define EVTSVT_LGPT1IN1SEL_PUBID_SYSTIM_LT 0x00000022U |
| #define EVTSVT_LGPT1IN1SEL_PUBID_SYSTIM_HB 0x00000021U |
| #define EVTSVT_LGPT1IN1SEL_PUBID_ADC_EVT 0x00000019U |
| #define EVTSVT_LGPT1IN1SEL_PUBID_GPIO_EVT 0x00000012U |
| #define EVTSVT_LGPT1IN1SEL_PUBID_NONE 0x00000000U |
| #define EVTSVT_LGPT1IN2SEL_PUBID_W 7U |
| #define EVTSVT_LGPT1IN2SEL_PUBID_M 0x0000007FU |
| #define EVTSVT_LGPT1IN2SEL_PUBID_S 0U |
| #define EVTSVT_LGPT1IN2SEL_PUBID_SYSTIM5 0x0000004CU |
| #define EVTSVT_LGPT1IN2SEL_PUBID_GPIO_EVT1 0x0000004BU |
| #define EVTSVT_LGPT1IN2SEL_PUBID_CAN_EVT 0x00000044U |
| #define EVTSVT_LGPT1IN2SEL_PUBID_LGPT3_ADC 0x00000041U |
| #define EVTSVT_LGPT1IN2SEL_PUBID_LGPT3_DMA 0x00000040U |
| #define EVTSVT_LGPT1IN2SEL_PUBID_LGPT3C2 0x0000003EU |
| #define EVTSVT_LGPT1IN2SEL_PUBID_LGPT3C1 0x0000003DU |
| #define EVTSVT_LGPT1IN2SEL_PUBID_LGPT3C0 0x0000003CU |
| #define EVTSVT_LGPT1IN2SEL_PUBID_LGPT2_ADC 0x0000003BU |
| #define EVTSVT_LGPT1IN2SEL_PUBID_LGPT2_DMA 0x0000003AU |
| #define EVTSVT_LGPT1IN2SEL_PUBID_LGPT2C2 0x00000038U |
| #define EVTSVT_LGPT1IN2SEL_PUBID_LGPT2C1 0x00000037U |
| #define EVTSVT_LGPT1IN2SEL_PUBID_LGPT2C0 0x00000036U |
| #define EVTSVT_LGPT1IN2SEL_PUBID_LRFD_EVT2 0x00000034U |
| #define EVTSVT_LGPT1IN2SEL_PUBID_LRFD_EVT1 0x00000033U |
| #define EVTSVT_LGPT1IN2SEL_PUBID_LRFD_EVT0 0x00000032U |
| #define EVTSVT_LGPT1IN2SEL_PUBID_LGPT1_ADC 0x00000031U |
| #define EVTSVT_LGPT1IN2SEL_PUBID_LGPT1_DMA 0x00000030U |
| #define EVTSVT_LGPT1IN2SEL_PUBID_LGPT1C2 0x0000002FU |
| #define EVTSVT_LGPT1IN2SEL_PUBID_LGPT1C1 0x0000002EU |
| #define EVTSVT_LGPT1IN2SEL_PUBID_LGPT1C0 0x0000002DU |
| #define EVTSVT_LGPT1IN2SEL_PUBID_LGPT0_ADC 0x0000002CU |
| #define EVTSVT_LGPT1IN2SEL_PUBID_LGPT0_DMA 0x0000002BU |
| #define EVTSVT_LGPT1IN2SEL_PUBID_LGPT0C2 0x0000002AU |
| #define EVTSVT_LGPT1IN2SEL_PUBID_LGPT0C1 0x00000029U |
| #define EVTSVT_LGPT1IN2SEL_PUBID_LGPT0C0 0x00000028U |
| #define EVTSVT_LGPT1IN2SEL_PUBID_SYSTIM4 0x00000027U |
| #define EVTSVT_LGPT1IN2SEL_PUBID_SYSTIM3 0x00000026U |
| #define EVTSVT_LGPT1IN2SEL_PUBID_SYSTIM2 0x00000025U |
| #define EVTSVT_LGPT1IN2SEL_PUBID_SYSTIM1 0x00000024U |
| #define EVTSVT_LGPT1IN2SEL_PUBID_SYSTIM0 0x00000023U |
| #define EVTSVT_LGPT1IN2SEL_PUBID_SYSTIM_LT 0x00000022U |
| #define EVTSVT_LGPT1IN2SEL_PUBID_SYSTIM_HB 0x00000021U |
| #define EVTSVT_LGPT1IN2SEL_PUBID_ADC_EVT 0x00000019U |
| #define EVTSVT_LGPT1IN2SEL_PUBID_GPIO_EVT 0x00000012U |
| #define EVTSVT_LGPT1IN2SEL_PUBID_NONE 0x00000000U |
| #define EVTSVT_LGPT1TENSEL_PUBID_W 7U |
| #define EVTSVT_LGPT1TENSEL_PUBID_M 0x0000007FU |
| #define EVTSVT_LGPT1TENSEL_PUBID_S 0U |
| #define EVTSVT_LGPT1TENSEL_PUBID_SYSTIM5 0x0000004CU |
| #define EVTSVT_LGPT1TENSEL_PUBID_GPIO_EVT1 0x0000004BU |
| #define EVTSVT_LGPT1TENSEL_PUBID_CAN_EVT 0x00000044U |
| #define EVTSVT_LGPT1TENSEL_PUBID_LGPT3_ADC 0x00000041U |
| #define EVTSVT_LGPT1TENSEL_PUBID_LGPT3_DMA 0x00000040U |
| #define EVTSVT_LGPT1TENSEL_PUBID_LGPT3C2 0x0000003EU |
| #define EVTSVT_LGPT1TENSEL_PUBID_LGPT3C1 0x0000003DU |
| #define EVTSVT_LGPT1TENSEL_PUBID_LGPT3C0 0x0000003CU |
| #define EVTSVT_LGPT1TENSEL_PUBID_LGPT2_ADC 0x0000003BU |
| #define EVTSVT_LGPT1TENSEL_PUBID_LGPT2_DMA 0x0000003AU |
| #define EVTSVT_LGPT1TENSEL_PUBID_LGPT2C2 0x00000038U |
| #define EVTSVT_LGPT1TENSEL_PUBID_LGPT2C1 0x00000037U |
| #define EVTSVT_LGPT1TENSEL_PUBID_LGPT2C0 0x00000036U |
| #define EVTSVT_LGPT1TENSEL_PUBID_LRFD_EVT2 0x00000034U |
| #define EVTSVT_LGPT1TENSEL_PUBID_LRFD_EVT1 0x00000033U |
| #define EVTSVT_LGPT1TENSEL_PUBID_LRFD_EVT0 0x00000032U |
| #define EVTSVT_LGPT1TENSEL_PUBID_LGPT1_ADC 0x00000031U |
| #define EVTSVT_LGPT1TENSEL_PUBID_LGPT1_DMA 0x00000030U |
| #define EVTSVT_LGPT1TENSEL_PUBID_LGPT1C2 0x0000002FU |
| #define EVTSVT_LGPT1TENSEL_PUBID_LGPT1C1 0x0000002EU |
| #define EVTSVT_LGPT1TENSEL_PUBID_LGPT1C0 0x0000002DU |
| #define EVTSVT_LGPT1TENSEL_PUBID_LGPT0_ADC 0x0000002CU |
| #define EVTSVT_LGPT1TENSEL_PUBID_LGPT0_DMA 0x0000002BU |
| #define EVTSVT_LGPT1TENSEL_PUBID_LGPT0C2 0x0000002AU |
| #define EVTSVT_LGPT1TENSEL_PUBID_LGPT0C1 0x00000029U |
| #define EVTSVT_LGPT1TENSEL_PUBID_LGPT0C0 0x00000028U |
| #define EVTSVT_LGPT1TENSEL_PUBID_SYSTIM4 0x00000027U |
| #define EVTSVT_LGPT1TENSEL_PUBID_SYSTIM3 0x00000026U |
| #define EVTSVT_LGPT1TENSEL_PUBID_SYSTIM2 0x00000025U |
| #define EVTSVT_LGPT1TENSEL_PUBID_SYSTIM1 0x00000024U |
| #define EVTSVT_LGPT1TENSEL_PUBID_SYSTIM0 0x00000023U |
| #define EVTSVT_LGPT1TENSEL_PUBID_SYSTIM_LT 0x00000022U |
| #define EVTSVT_LGPT1TENSEL_PUBID_SYSTIM_HB 0x00000021U |
| #define EVTSVT_LGPT1TENSEL_PUBID_ADC_EVT 0x00000019U |
| #define EVTSVT_LGPT1TENSEL_PUBID_GPIO_EVT 0x00000012U |
| #define EVTSVT_LGPT1TENSEL_PUBID_NONE 0x00000000U |
| #define EVTSVT_LGPT2IN0SEL_PUBID_W 7U |
| #define EVTSVT_LGPT2IN0SEL_PUBID_M 0x0000007FU |
| #define EVTSVT_LGPT2IN0SEL_PUBID_S 0U |
| #define EVTSVT_LGPT2IN0SEL_PUBID_SYSTIM5 0x0000004CU |
| #define EVTSVT_LGPT2IN0SEL_PUBID_GPIO_EVT1 0x0000004BU |
| #define EVTSVT_LGPT2IN0SEL_PUBID_VCE_IRQ 0x00000046U |
| #define EVTSVT_LGPT2IN0SEL_PUBID_SPI1_COMB 0x00000045U |
| #define EVTSVT_LGPT2IN0SEL_PUBID_CAN_EVT 0x00000044U |
| #define EVTSVT_LGPT2IN0SEL_PUBID_CAN_IRQ 0x00000043U |
| #define EVTSVT_LGPT2IN0SEL_PUBID_I2S_IRQ 0x00000042U |
| #define EVTSVT_LGPT2IN0SEL_PUBID_LGPT3_ADC 0x00000041U |
| #define EVTSVT_LGPT2IN0SEL_PUBID_LGPT3_DMA 0x00000040U |
| #define EVTSVT_LGPT2IN0SEL_PUBID_LGPT3_COMB 0x0000003FU |
| #define EVTSVT_LGPT2IN0SEL_PUBID_LGPT3C2 0x0000003EU |
| #define EVTSVT_LGPT2IN0SEL_PUBID_LGPT3C1 0x0000003DU |
| #define EVTSVT_LGPT2IN0SEL_PUBID_LGPT3C0 0x0000003CU |
| #define EVTSVT_LGPT2IN0SEL_PUBID_LGPT2_ADC 0x0000003BU |
| #define EVTSVT_LGPT2IN0SEL_PUBID_LGPT2_DMA 0x0000003AU |
| #define EVTSVT_LGPT2IN0SEL_PUBID_LGPT2_COMB 0x00000039U |
| #define EVTSVT_LGPT2IN0SEL_PUBID_LGPT2C2 0x00000038U |
| #define EVTSVT_LGPT2IN0SEL_PUBID_LGPT2C1 0x00000037U |
| #define EVTSVT_LGPT2IN0SEL_PUBID_LGPT2C0 0x00000036U |
| #define EVTSVT_LGPT2IN0SEL_PUBID_UART1_COMB 0x00000035U |
| #define EVTSVT_LGPT2IN0SEL_PUBID_LRFD_EVT2 0x00000034U |
| #define EVTSVT_LGPT2IN0SEL_PUBID_LRFD_EVT1 0x00000033U |
| #define EVTSVT_LGPT2IN0SEL_PUBID_LRFD_EVT0 0x00000032U |
| #define EVTSVT_LGPT2IN0SEL_PUBID_LGPT1_ADC 0x00000031U |
| #define EVTSVT_LGPT2IN0SEL_PUBID_LGPT1_DMA 0x00000030U |
| #define EVTSVT_LGPT2IN0SEL_PUBID_LGPT1C2 0x0000002FU |
| #define EVTSVT_LGPT2IN0SEL_PUBID_LGPT1C1 0x0000002EU |
| #define EVTSVT_LGPT2IN0SEL_PUBID_LGPT1C0 0x0000002DU |
| #define EVTSVT_LGPT2IN0SEL_PUBID_LGPT0_ADC 0x0000002CU |
| #define EVTSVT_LGPT2IN0SEL_PUBID_LGPT0_DMA 0x0000002BU |
| #define EVTSVT_LGPT2IN0SEL_PUBID_LGPT0C2 0x0000002AU |
| #define EVTSVT_LGPT2IN0SEL_PUBID_LGPT0C1 0x00000029U |
| #define EVTSVT_LGPT2IN0SEL_PUBID_LGPT0C0 0x00000028U |
| #define EVTSVT_LGPT2IN0SEL_PUBID_SYSTIM4 0x00000027U |
| #define EVTSVT_LGPT2IN0SEL_PUBID_SYSTIM3 0x00000026U |
| #define EVTSVT_LGPT2IN0SEL_PUBID_SYSTIM2 0x00000025U |
| #define EVTSVT_LGPT2IN0SEL_PUBID_SYSTIM1 0x00000024U |
| #define EVTSVT_LGPT2IN0SEL_PUBID_SYSTIM0 0x00000023U |
| #define EVTSVT_LGPT2IN0SEL_PUBID_SYSTIM_LT 0x00000022U |
| #define EVTSVT_LGPT2IN0SEL_PUBID_SYSTIM_HB 0x00000021U |
| #define EVTSVT_LGPT2IN0SEL_PUBID_I2C0_IRQ 0x00000020U |
| #define EVTSVT_LGPT2IN0SEL_PUBID_UART0_COMB 0x0000001FU |
| #define EVTSVT_LGPT2IN0SEL_PUBID_AES_COMB 0x0000001EU |
| #define EVTSVT_LGPT2IN0SEL_PUBID_DMA_ERR 0x0000001DU |
| #define EVTSVT_LGPT2IN0SEL_PUBID_DMA_DONE_COMB 0x0000001CU |
| #define EVTSVT_LGPT2IN0SEL_PUBID_LGPT1_COMB 0x0000001BU |
| #define EVTSVT_LGPT2IN0SEL_PUBID_LGPT0_COMB 0x0000001AU |
| #define EVTSVT_LGPT2IN0SEL_PUBID_ADC_EVT 0x00000019U |
| #define EVTSVT_LGPT2IN0SEL_PUBID_ADC_COMB 0x00000018U |
| #define EVTSVT_LGPT2IN0SEL_PUBID_SPI0_COMB 0x00000017U |
| #define EVTSVT_LGPT2IN0SEL_PUBID_LRFD_IRQ2 0x00000016U |
| #define EVTSVT_LGPT2IN0SEL_PUBID_LRFD_IRQ1 0x00000015U |
| #define EVTSVT_LGPT2IN0SEL_PUBID_LRFD_IRQ0 0x00000014U |
| #define EVTSVT_LGPT2IN0SEL_PUBID_FLASH_IRQ 0x00000013U |
| #define EVTSVT_LGPT2IN0SEL_PUBID_GPIO_EVT 0x00000012U |
| #define EVTSVT_LGPT2IN0SEL_PUBID_GPIO_COMB 0x00000011U |
| #define EVTSVT_LGPT2IN0SEL_PUBID_SYSTIM_COMB 0x00000010U |
| #define EVTSVT_LGPT2IN0SEL_PUBID_AON_IOC_COMB 0x00000007U |
| #define EVTSVT_LGPT2IN0SEL_PUBID_AON_LPMCMP_IRQ 0x00000006U |
| #define EVTSVT_LGPT2IN0SEL_PUBID_AON_DBG_COMB 0x00000005U |
| #define EVTSVT_LGPT2IN0SEL_PUBID_AON_RTC_COMB 0x00000004U |
| #define EVTSVT_LGPT2IN0SEL_PUBID_AON_CKM_COMB 0x00000003U |
| #define EVTSVT_LGPT2IN0SEL_PUBID_AON_PMU_COMB 0x00000002U |
| #define EVTSVT_LGPT2IN0SEL_PUBID_NONE 0x00000000U |
| #define EVTSVT_LGPT2IN1SEL_PUBID_W 7U |
| #define EVTSVT_LGPT2IN1SEL_PUBID_M 0x0000007FU |
| #define EVTSVT_LGPT2IN1SEL_PUBID_S 0U |
| #define EVTSVT_LGPT2IN1SEL_PUBID_SYSTIM5 0x0000004CU |
| #define EVTSVT_LGPT2IN1SEL_PUBID_GPIO_EVT1 0x0000004BU |
| #define EVTSVT_LGPT2IN1SEL_PUBID_CAN_EVT 0x00000044U |
| #define EVTSVT_LGPT2IN1SEL_PUBID_LGPT3_ADC 0x00000041U |
| #define EVTSVT_LGPT2IN1SEL_PUBID_LGPT3_DMA 0x00000040U |
| #define EVTSVT_LGPT2IN1SEL_PUBID_LGPT3C2 0x0000003EU |
| #define EVTSVT_LGPT2IN1SEL_PUBID_LGPT3C1 0x0000003DU |
| #define EVTSVT_LGPT2IN1SEL_PUBID_LGPT3C0 0x0000003CU |
| #define EVTSVT_LGPT2IN1SEL_PUBID_LGPT2_ADC 0x0000003BU |
| #define EVTSVT_LGPT2IN1SEL_PUBID_LGPT2_DMA 0x0000003AU |
| #define EVTSVT_LGPT2IN1SEL_PUBID_LGPT2C2 0x00000038U |
| #define EVTSVT_LGPT2IN1SEL_PUBID_LGPT2C1 0x00000037U |
| #define EVTSVT_LGPT2IN1SEL_PUBID_LGPT2C0 0x00000036U |
| #define EVTSVT_LGPT2IN1SEL_PUBID_LRFD_EVT2 0x00000034U |
| #define EVTSVT_LGPT2IN1SEL_PUBID_LRFD_EVT1 0x00000033U |
| #define EVTSVT_LGPT2IN1SEL_PUBID_LRFD_EVT0 0x00000032U |
| #define EVTSVT_LGPT2IN1SEL_PUBID_LGPT1_ADC 0x00000031U |
| #define EVTSVT_LGPT2IN1SEL_PUBID_LGPT1_DMA 0x00000030U |
| #define EVTSVT_LGPT2IN1SEL_PUBID_LGPT1C2 0x0000002FU |
| #define EVTSVT_LGPT2IN1SEL_PUBID_LGPT1C1 0x0000002EU |
| #define EVTSVT_LGPT2IN1SEL_PUBID_LGPT1C0 0x0000002DU |
| #define EVTSVT_LGPT2IN1SEL_PUBID_LGPT0_ADC 0x0000002CU |
| #define EVTSVT_LGPT2IN1SEL_PUBID_LGPT0_DMA 0x0000002BU |
| #define EVTSVT_LGPT2IN1SEL_PUBID_LGPT0C2 0x0000002AU |
| #define EVTSVT_LGPT2IN1SEL_PUBID_LGPT0C1 0x00000029U |
| #define EVTSVT_LGPT2IN1SEL_PUBID_LGPT0C0 0x00000028U |
| #define EVTSVT_LGPT2IN1SEL_PUBID_SYSTIM4 0x00000027U |
| #define EVTSVT_LGPT2IN1SEL_PUBID_SYSTIM3 0x00000026U |
| #define EVTSVT_LGPT2IN1SEL_PUBID_SYSTIM2 0x00000025U |
| #define EVTSVT_LGPT2IN1SEL_PUBID_SYSTIM1 0x00000024U |
| #define EVTSVT_LGPT2IN1SEL_PUBID_SYSTIM0 0x00000023U |
| #define EVTSVT_LGPT2IN1SEL_PUBID_SYSTIM_LT 0x00000022U |
| #define EVTSVT_LGPT2IN1SEL_PUBID_SYSTIM_HB 0x00000021U |
| #define EVTSVT_LGPT2IN1SEL_PUBID_ADC_EVT 0x00000019U |
| #define EVTSVT_LGPT2IN1SEL_PUBID_GPIO_EVT 0x00000012U |
| #define EVTSVT_LGPT2IN1SEL_PUBID_NONE 0x00000000U |
| #define EVTSVT_LGPT2IN2SEL_PUBID_W 7U |
| #define EVTSVT_LGPT2IN2SEL_PUBID_M 0x0000007FU |
| #define EVTSVT_LGPT2IN2SEL_PUBID_S 0U |
| #define EVTSVT_LGPT2IN2SEL_PUBID_SYSTIM5 0x0000004CU |
| #define EVTSVT_LGPT2IN2SEL_PUBID_GPIO_EVT1 0x0000004BU |
| #define EVTSVT_LGPT2IN2SEL_PUBID_CAN_EVT 0x00000044U |
| #define EVTSVT_LGPT2IN2SEL_PUBID_LGPT3_ADC 0x00000041U |
| #define EVTSVT_LGPT2IN2SEL_PUBID_LGPT3_DMA 0x00000040U |
| #define EVTSVT_LGPT2IN2SEL_PUBID_LGPT3C2 0x0000003EU |
| #define EVTSVT_LGPT2IN2SEL_PUBID_LGPT3C1 0x0000003DU |
| #define EVTSVT_LGPT2IN2SEL_PUBID_LGPT3C0 0x0000003CU |
| #define EVTSVT_LGPT2IN2SEL_PUBID_LGPT2_ADC 0x0000003BU |
| #define EVTSVT_LGPT2IN2SEL_PUBID_LGPT2_DMA 0x0000003AU |
| #define EVTSVT_LGPT2IN2SEL_PUBID_LGPT2C2 0x00000038U |
| #define EVTSVT_LGPT2IN2SEL_PUBID_LGPT2C1 0x00000037U |
| #define EVTSVT_LGPT2IN2SEL_PUBID_LGPT2C0 0x00000036U |
| #define EVTSVT_LGPT2IN2SEL_PUBID_LRFD_EVT2 0x00000034U |
| #define EVTSVT_LGPT2IN2SEL_PUBID_LRFD_EVT1 0x00000033U |
| #define EVTSVT_LGPT2IN2SEL_PUBID_LRFD_EVT0 0x00000032U |
| #define EVTSVT_LGPT2IN2SEL_PUBID_LGPT1_ADC 0x00000031U |
| #define EVTSVT_LGPT2IN2SEL_PUBID_LGPT1_DMA 0x00000030U |
| #define EVTSVT_LGPT2IN2SEL_PUBID_LGPT1C2 0x0000002FU |
| #define EVTSVT_LGPT2IN2SEL_PUBID_LGPT1C1 0x0000002EU |
| #define EVTSVT_LGPT2IN2SEL_PUBID_LGPT1C0 0x0000002DU |
| #define EVTSVT_LGPT2IN2SEL_PUBID_LGPT0_ADC 0x0000002CU |
| #define EVTSVT_LGPT2IN2SEL_PUBID_LGPT0_DMA 0x0000002BU |
| #define EVTSVT_LGPT2IN2SEL_PUBID_LGPT0C2 0x0000002AU |
| #define EVTSVT_LGPT2IN2SEL_PUBID_LGPT0C1 0x00000029U |
| #define EVTSVT_LGPT2IN2SEL_PUBID_LGPT0C0 0x00000028U |
| #define EVTSVT_LGPT2IN2SEL_PUBID_SYSTIM4 0x00000027U |
| #define EVTSVT_LGPT2IN2SEL_PUBID_SYSTIM3 0x00000026U |
| #define EVTSVT_LGPT2IN2SEL_PUBID_SYSTIM2 0x00000025U |
| #define EVTSVT_LGPT2IN2SEL_PUBID_SYSTIM1 0x00000024U |
| #define EVTSVT_LGPT2IN2SEL_PUBID_SYSTIM0 0x00000023U |
| #define EVTSVT_LGPT2IN2SEL_PUBID_SYSTIM_LT 0x00000022U |
| #define EVTSVT_LGPT2IN2SEL_PUBID_SYSTIM_HB 0x00000021U |
| #define EVTSVT_LGPT2IN2SEL_PUBID_ADC_EVT 0x00000019U |
| #define EVTSVT_LGPT2IN2SEL_PUBID_GPIO_EVT 0x00000012U |
| #define EVTSVT_LGPT2IN2SEL_PUBID_NONE 0x00000000U |
| #define EVTSVT_LGPT2TENSEL_PUBID_W 7U |
| #define EVTSVT_LGPT2TENSEL_PUBID_M 0x0000007FU |
| #define EVTSVT_LGPT2TENSEL_PUBID_S 0U |
| #define EVTSVT_LGPT2TENSEL_PUBID_SYSTIM5 0x0000004CU |
| #define EVTSVT_LGPT2TENSEL_PUBID_GPIO_EVT1 0x0000004BU |
| #define EVTSVT_LGPT2TENSEL_PUBID_CAN_EVT 0x00000044U |
| #define EVTSVT_LGPT2TENSEL_PUBID_LGPT3_ADC 0x00000041U |
| #define EVTSVT_LGPT2TENSEL_PUBID_LGPT3_DMA 0x00000040U |
| #define EVTSVT_LGPT2TENSEL_PUBID_LGPT3C2 0x0000003EU |
| #define EVTSVT_LGPT2TENSEL_PUBID_LGPT3C1 0x0000003DU |
| #define EVTSVT_LGPT2TENSEL_PUBID_LGPT3C0 0x0000003CU |
| #define EVTSVT_LGPT2TENSEL_PUBID_LGPT2_ADC 0x0000003BU |
| #define EVTSVT_LGPT2TENSEL_PUBID_LGPT2_DMA 0x0000003AU |
| #define EVTSVT_LGPT2TENSEL_PUBID_LGPT2C2 0x00000038U |
| #define EVTSVT_LGPT2TENSEL_PUBID_LGPT2C1 0x00000037U |
| #define EVTSVT_LGPT2TENSEL_PUBID_LGPT2C0 0x00000036U |
| #define EVTSVT_LGPT2TENSEL_PUBID_LRFD_EVT2 0x00000034U |
| #define EVTSVT_LGPT2TENSEL_PUBID_LRFD_EVT1 0x00000033U |
| #define EVTSVT_LGPT2TENSEL_PUBID_LRFD_EVT0 0x00000032U |
| #define EVTSVT_LGPT2TENSEL_PUBID_LGPT1_ADC 0x00000031U |
| #define EVTSVT_LGPT2TENSEL_PUBID_LGPT1_DMA 0x00000030U |
| #define EVTSVT_LGPT2TENSEL_PUBID_LGPT1C2 0x0000002FU |
| #define EVTSVT_LGPT2TENSEL_PUBID_LGPT1C1 0x0000002EU |
| #define EVTSVT_LGPT2TENSEL_PUBID_LGPT1C0 0x0000002DU |
| #define EVTSVT_LGPT2TENSEL_PUBID_LGPT0_ADC 0x0000002CU |
| #define EVTSVT_LGPT2TENSEL_PUBID_LGPT0_DMA 0x0000002BU |
| #define EVTSVT_LGPT2TENSEL_PUBID_LGPT0C2 0x0000002AU |
| #define EVTSVT_LGPT2TENSEL_PUBID_LGPT0C1 0x00000029U |
| #define EVTSVT_LGPT2TENSEL_PUBID_LGPT0C0 0x00000028U |
| #define EVTSVT_LGPT2TENSEL_PUBID_SYSTIM4 0x00000027U |
| #define EVTSVT_LGPT2TENSEL_PUBID_SYSTIM3 0x00000026U |
| #define EVTSVT_LGPT2TENSEL_PUBID_SYSTIM2 0x00000025U |
| #define EVTSVT_LGPT2TENSEL_PUBID_SYSTIM1 0x00000024U |
| #define EVTSVT_LGPT2TENSEL_PUBID_SYSTIM0 0x00000023U |
| #define EVTSVT_LGPT2TENSEL_PUBID_SYSTIM_LT 0x00000022U |
| #define EVTSVT_LGPT2TENSEL_PUBID_SYSTIM_HB 0x00000021U |
| #define EVTSVT_LGPT2TENSEL_PUBID_ADC_EVT 0x00000019U |
| #define EVTSVT_LGPT2TENSEL_PUBID_GPIO_EVT 0x00000012U |
| #define EVTSVT_LGPT2TENSEL_PUBID_NONE 0x00000000U |
| #define EVTSVT_LGPT3IN0SEL_PUBID_W 7U |
| #define EVTSVT_LGPT3IN0SEL_PUBID_M 0x0000007FU |
| #define EVTSVT_LGPT3IN0SEL_PUBID_S 0U |
| #define EVTSVT_LGPT3IN0SEL_PUBID_SYSTIM5 0x0000004CU |
| #define EVTSVT_LGPT3IN0SEL_PUBID_GPIO_EVT1 0x0000004BU |
| #define EVTSVT_LGPT3IN0SEL_PUBID_VCE_IRQ 0x00000046U |
| #define EVTSVT_LGPT3IN0SEL_PUBID_SPI1_COMB 0x00000045U |
| #define EVTSVT_LGPT3IN0SEL_PUBID_CAN_EVT 0x00000044U |
| #define EVTSVT_LGPT3IN0SEL_PUBID_CAN_IRQ 0x00000043U |
| #define EVTSVT_LGPT3IN0SEL_PUBID_I2S_IRQ 0x00000042U |
| #define EVTSVT_LGPT3IN0SEL_PUBID_LGPT3_ADC 0x00000041U |
| #define EVTSVT_LGPT3IN0SEL_PUBID_LGPT3_DMA 0x00000040U |
| #define EVTSVT_LGPT3IN0SEL_PUBID_LGPT3_COMB 0x0000003FU |
| #define EVTSVT_LGPT3IN0SEL_PUBID_LGPT3C2 0x0000003EU |
| #define EVTSVT_LGPT3IN0SEL_PUBID_LGPT3C1 0x0000003DU |
| #define EVTSVT_LGPT3IN0SEL_PUBID_LGPT3C0 0x0000003CU |
| #define EVTSVT_LGPT3IN0SEL_PUBID_LGPT2_ADC 0x0000003BU |
| #define EVTSVT_LGPT3IN0SEL_PUBID_LGPT2_DMA 0x0000003AU |
| #define EVTSVT_LGPT3IN0SEL_PUBID_LGPT2_COMB 0x00000039U |
| #define EVTSVT_LGPT3IN0SEL_PUBID_LGPT2C2 0x00000038U |
| #define EVTSVT_LGPT3IN0SEL_PUBID_LGPT2C1 0x00000037U |
| #define EVTSVT_LGPT3IN0SEL_PUBID_LGPT2C0 0x00000036U |
| #define EVTSVT_LGPT3IN0SEL_PUBID_UART1_COMB 0x00000035U |
| #define EVTSVT_LGPT3IN0SEL_PUBID_LRFD_EVT2 0x00000034U |
| #define EVTSVT_LGPT3IN0SEL_PUBID_LRFD_EVT1 0x00000033U |
| #define EVTSVT_LGPT3IN0SEL_PUBID_LRFD_EVT0 0x00000032U |
| #define EVTSVT_LGPT3IN0SEL_PUBID_LGPT1_ADC 0x00000031U |
| #define EVTSVT_LGPT3IN0SEL_PUBID_LGPT1_DMA 0x00000030U |
| #define EVTSVT_LGPT3IN0SEL_PUBID_LGPT1C2 0x0000002FU |
| #define EVTSVT_LGPT3IN0SEL_PUBID_LGPT1C1 0x0000002EU |
| #define EVTSVT_LGPT3IN0SEL_PUBID_LGPT1C0 0x0000002DU |
| #define EVTSVT_LGPT3IN0SEL_PUBID_LGPT0_ADC 0x0000002CU |
| #define EVTSVT_LGPT3IN0SEL_PUBID_LGPT0_DMA 0x0000002BU |
| #define EVTSVT_LGPT3IN0SEL_PUBID_LGPT0C2 0x0000002AU |
| #define EVTSVT_LGPT3IN0SEL_PUBID_LGPT0C1 0x00000029U |
| #define EVTSVT_LGPT3IN0SEL_PUBID_LGPT0C0 0x00000028U |
| #define EVTSVT_LGPT3IN0SEL_PUBID_SYSTIM4 0x00000027U |
| #define EVTSVT_LGPT3IN0SEL_PUBID_SYSTIM3 0x00000026U |
| #define EVTSVT_LGPT3IN0SEL_PUBID_SYSTIM2 0x00000025U |
| #define EVTSVT_LGPT3IN0SEL_PUBID_SYSTIM1 0x00000024U |
| #define EVTSVT_LGPT3IN0SEL_PUBID_SYSTIM0 0x00000023U |
| #define EVTSVT_LGPT3IN0SEL_PUBID_SYSTIM_LT 0x00000022U |
| #define EVTSVT_LGPT3IN0SEL_PUBID_SYSTIM_HB 0x00000021U |
| #define EVTSVT_LGPT3IN0SEL_PUBID_I2C0_IRQ 0x00000020U |
| #define EVTSVT_LGPT3IN0SEL_PUBID_UART0_COMB 0x0000001FU |
| #define EVTSVT_LGPT3IN0SEL_PUBID_AES_COMB 0x0000001EU |
| #define EVTSVT_LGPT3IN0SEL_PUBID_DMA_ERR 0x0000001DU |
| #define EVTSVT_LGPT3IN0SEL_PUBID_DMA_DONE_COMB 0x0000001CU |
| #define EVTSVT_LGPT3IN0SEL_PUBID_LGPT1_COMB 0x0000001BU |
| #define EVTSVT_LGPT3IN0SEL_PUBID_LGPT0_COMB 0x0000001AU |
| #define EVTSVT_LGPT3IN0SEL_PUBID_ADC_EVT 0x00000019U |
| #define EVTSVT_LGPT3IN0SEL_PUBID_ADC_COMB 0x00000018U |
| #define EVTSVT_LGPT3IN0SEL_PUBID_SPI0_COMB 0x00000017U |
| #define EVTSVT_LGPT3IN0SEL_PUBID_LRFD_IRQ2 0x00000016U |
| #define EVTSVT_LGPT3IN0SEL_PUBID_LRFD_IRQ1 0x00000015U |
| #define EVTSVT_LGPT3IN0SEL_PUBID_LRFD_IRQ0 0x00000014U |
| #define EVTSVT_LGPT3IN0SEL_PUBID_FLASH_IRQ 0x00000013U |
| #define EVTSVT_LGPT3IN0SEL_PUBID_GPIO_EVT 0x00000012U |
| #define EVTSVT_LGPT3IN0SEL_PUBID_GPIO_COMB 0x00000011U |
| #define EVTSVT_LGPT3IN0SEL_PUBID_SYSTIM_COMB 0x00000010U |
| #define EVTSVT_LGPT3IN0SEL_PUBID_AON_IOC_COMB 0x00000007U |
| #define EVTSVT_LGPT3IN0SEL_PUBID_AON_LPMCMP_IRQ 0x00000006U |
| #define EVTSVT_LGPT3IN0SEL_PUBID_AON_DBG_COMB 0x00000005U |
| #define EVTSVT_LGPT3IN0SEL_PUBID_AON_RTC_COMB 0x00000004U |
| #define EVTSVT_LGPT3IN0SEL_PUBID_AON_CKM_COMB 0x00000003U |
| #define EVTSVT_LGPT3IN0SEL_PUBID_AON_PMU_COMB 0x00000002U |
| #define EVTSVT_LGPT3IN0SEL_PUBID_NONE 0x00000000U |
| #define EVTSVT_LGPT3IN1SEL_PUBID_W 7U |
| #define EVTSVT_LGPT3IN1SEL_PUBID_M 0x0000007FU |
| #define EVTSVT_LGPT3IN1SEL_PUBID_S 0U |
| #define EVTSVT_LGPT3IN1SEL_PUBID_SYSTIM5 0x0000004CU |
| #define EVTSVT_LGPT3IN1SEL_PUBID_GPIO_EVT1 0x0000004BU |
| #define EVTSVT_LGPT3IN1SEL_PUBID_CAN_EVT 0x00000044U |
| #define EVTSVT_LGPT3IN1SEL_PUBID_LGPT3_ADC 0x00000041U |
| #define EVTSVT_LGPT3IN1SEL_PUBID_LGPT3_DMA 0x00000040U |
| #define EVTSVT_LGPT3IN1SEL_PUBID_LGPT3C2 0x0000003EU |
| #define EVTSVT_LGPT3IN1SEL_PUBID_LGPT3C1 0x0000003DU |
| #define EVTSVT_LGPT3IN1SEL_PUBID_LGPT3C0 0x0000003CU |
| #define EVTSVT_LGPT3IN1SEL_PUBID_LGPT2_ADC 0x0000003BU |
| #define EVTSVT_LGPT3IN1SEL_PUBID_LGPT2_DMA 0x0000003AU |
| #define EVTSVT_LGPT3IN1SEL_PUBID_LGPT2C2 0x00000038U |
| #define EVTSVT_LGPT3IN1SEL_PUBID_LGPT2C1 0x00000037U |
| #define EVTSVT_LGPT3IN1SEL_PUBID_LGPT2C0 0x00000036U |
| #define EVTSVT_LGPT3IN1SEL_PUBID_LRFD_EVT2 0x00000034U |
| #define EVTSVT_LGPT3IN1SEL_PUBID_LRFD_EVT1 0x00000033U |
| #define EVTSVT_LGPT3IN1SEL_PUBID_LRFD_EVT0 0x00000032U |
| #define EVTSVT_LGPT3IN1SEL_PUBID_LGPT1_ADC 0x00000031U |
| #define EVTSVT_LGPT3IN1SEL_PUBID_LGPT1_DMA 0x00000030U |
| #define EVTSVT_LGPT3IN1SEL_PUBID_LGPT1C2 0x0000002FU |
| #define EVTSVT_LGPT3IN1SEL_PUBID_LGPT1C1 0x0000002EU |
| #define EVTSVT_LGPT3IN1SEL_PUBID_LGPT1C0 0x0000002DU |
| #define EVTSVT_LGPT3IN1SEL_PUBID_LGPT0_ADC 0x0000002CU |
| #define EVTSVT_LGPT3IN1SEL_PUBID_LGPT0_DMA 0x0000002BU |
| #define EVTSVT_LGPT3IN1SEL_PUBID_LGPT0C2 0x0000002AU |
| #define EVTSVT_LGPT3IN1SEL_PUBID_LGPT0C1 0x00000029U |
| #define EVTSVT_LGPT3IN1SEL_PUBID_LGPT0C0 0x00000028U |
| #define EVTSVT_LGPT3IN1SEL_PUBID_SYSTIM4 0x00000027U |
| #define EVTSVT_LGPT3IN1SEL_PUBID_SYSTIM3 0x00000026U |
| #define EVTSVT_LGPT3IN1SEL_PUBID_SYSTIM2 0x00000025U |
| #define EVTSVT_LGPT3IN1SEL_PUBID_SYSTIM1 0x00000024U |
| #define EVTSVT_LGPT3IN1SEL_PUBID_SYSTIM0 0x00000023U |
| #define EVTSVT_LGPT3IN1SEL_PUBID_SYSTIM_LT 0x00000022U |
| #define EVTSVT_LGPT3IN1SEL_PUBID_SYSTIM_HB 0x00000021U |
| #define EVTSVT_LGPT3IN1SEL_PUBID_ADC_EVT 0x00000019U |
| #define EVTSVT_LGPT3IN1SEL_PUBID_GPIO_EVT 0x00000012U |
| #define EVTSVT_LGPT3IN1SEL_PUBID_NONE 0x00000000U |
| #define EVTSVT_LGPT3IN2SEL_PUBID_W 7U |
| #define EVTSVT_LGPT3IN2SEL_PUBID_M 0x0000007FU |
| #define EVTSVT_LGPT3IN2SEL_PUBID_S 0U |
| #define EVTSVT_LGPT3IN2SEL_PUBID_SYSTIM5 0x0000004CU |
| #define EVTSVT_LGPT3IN2SEL_PUBID_GPIO_EVT1 0x0000004BU |
| #define EVTSVT_LGPT3IN2SEL_PUBID_CAN_EVT 0x00000044U |
| #define EVTSVT_LGPT3IN2SEL_PUBID_LGPT3_ADC 0x00000041U |
| #define EVTSVT_LGPT3IN2SEL_PUBID_LGPT3_DMA 0x00000040U |
| #define EVTSVT_LGPT3IN2SEL_PUBID_LGPT3C2 0x0000003EU |
| #define EVTSVT_LGPT3IN2SEL_PUBID_LGPT3C1 0x0000003DU |
| #define EVTSVT_LGPT3IN2SEL_PUBID_LGPT3C0 0x0000003CU |
| #define EVTSVT_LGPT3IN2SEL_PUBID_LGPT2_ADC 0x0000003BU |
| #define EVTSVT_LGPT3IN2SEL_PUBID_LGPT2_DMA 0x0000003AU |
| #define EVTSVT_LGPT3IN2SEL_PUBID_LGPT2C2 0x00000038U |
| #define EVTSVT_LGPT3IN2SEL_PUBID_LGPT2C1 0x00000037U |
| #define EVTSVT_LGPT3IN2SEL_PUBID_LGPT2C0 0x00000036U |
| #define EVTSVT_LGPT3IN2SEL_PUBID_LRFD_EVT2 0x00000034U |
| #define EVTSVT_LGPT3IN2SEL_PUBID_LRFD_EVT1 0x00000033U |
| #define EVTSVT_LGPT3IN2SEL_PUBID_LRFD_EVT0 0x00000032U |
| #define EVTSVT_LGPT3IN2SEL_PUBID_LGPT1_ADC 0x00000031U |
| #define EVTSVT_LGPT3IN2SEL_PUBID_LGPT1_DMA 0x00000030U |
| #define EVTSVT_LGPT3IN2SEL_PUBID_LGPT1C2 0x0000002FU |
| #define EVTSVT_LGPT3IN2SEL_PUBID_LGPT1C1 0x0000002EU |
| #define EVTSVT_LGPT3IN2SEL_PUBID_LGPT1C0 0x0000002DU |
| #define EVTSVT_LGPT3IN2SEL_PUBID_LGPT0_ADC 0x0000002CU |
| #define EVTSVT_LGPT3IN2SEL_PUBID_LGPT0_DMA 0x0000002BU |
| #define EVTSVT_LGPT3IN2SEL_PUBID_LGPT0C2 0x0000002AU |
| #define EVTSVT_LGPT3IN2SEL_PUBID_LGPT0C1 0x00000029U |
| #define EVTSVT_LGPT3IN2SEL_PUBID_LGPT0C0 0x00000028U |
| #define EVTSVT_LGPT3IN2SEL_PUBID_SYSTIM4 0x00000027U |
| #define EVTSVT_LGPT3IN2SEL_PUBID_SYSTIM3 0x00000026U |
| #define EVTSVT_LGPT3IN2SEL_PUBID_SYSTIM2 0x00000025U |
| #define EVTSVT_LGPT3IN2SEL_PUBID_SYSTIM1 0x00000024U |
| #define EVTSVT_LGPT3IN2SEL_PUBID_SYSTIM0 0x00000023U |
| #define EVTSVT_LGPT3IN2SEL_PUBID_SYSTIM_LT 0x00000022U |
| #define EVTSVT_LGPT3IN2SEL_PUBID_SYSTIM_HB 0x00000021U |
| #define EVTSVT_LGPT3IN2SEL_PUBID_ADC_EVT 0x00000019U |
| #define EVTSVT_LGPT3IN2SEL_PUBID_GPIO_EVT 0x00000012U |
| #define EVTSVT_LGPT3IN2SEL_PUBID_NONE 0x00000000U |
| #define EVTSVT_LGPT3TENSEL_PUBID_W 7U |
| #define EVTSVT_LGPT3TENSEL_PUBID_M 0x0000007FU |
| #define EVTSVT_LGPT3TENSEL_PUBID_S 0U |
| #define EVTSVT_LGPT3TENSEL_PUBID_SYSTIM5 0x0000004CU |
| #define EVTSVT_LGPT3TENSEL_PUBID_GPIO_EVT1 0x0000004BU |
| #define EVTSVT_LGPT3TENSEL_PUBID_CAN_EVT 0x00000044U |
| #define EVTSVT_LGPT3TENSEL_PUBID_LGPT3_ADC 0x00000041U |
| #define EVTSVT_LGPT3TENSEL_PUBID_LGPT3_DMA 0x00000040U |
| #define EVTSVT_LGPT3TENSEL_PUBID_LGPT3C2 0x0000003EU |
| #define EVTSVT_LGPT3TENSEL_PUBID_LGPT3C1 0x0000003DU |
| #define EVTSVT_LGPT3TENSEL_PUBID_LGPT3C0 0x0000003CU |
| #define EVTSVT_LGPT3TENSEL_PUBID_LGPT2_ADC 0x0000003BU |
| #define EVTSVT_LGPT3TENSEL_PUBID_LGPT2_DMA 0x0000003AU |
| #define EVTSVT_LGPT3TENSEL_PUBID_LGPT2C2 0x00000038U |
| #define EVTSVT_LGPT3TENSEL_PUBID_LGPT2C1 0x00000037U |
| #define EVTSVT_LGPT3TENSEL_PUBID_LGPT2C0 0x00000036U |
| #define EVTSVT_LGPT3TENSEL_PUBID_LRFD_EVT2 0x00000034U |
| #define EVTSVT_LGPT3TENSEL_PUBID_LRFD_EVT1 0x00000033U |
| #define EVTSVT_LGPT3TENSEL_PUBID_LRFD_EVT0 0x00000032U |
| #define EVTSVT_LGPT3TENSEL_PUBID_LGPT1_ADC 0x00000031U |
| #define EVTSVT_LGPT3TENSEL_PUBID_LGPT1_DMA 0x00000030U |
| #define EVTSVT_LGPT3TENSEL_PUBID_LGPT1C2 0x0000002FU |
| #define EVTSVT_LGPT3TENSEL_PUBID_LGPT1C1 0x0000002EU |
| #define EVTSVT_LGPT3TENSEL_PUBID_LGPT1C0 0x0000002DU |
| #define EVTSVT_LGPT3TENSEL_PUBID_LGPT0_ADC 0x0000002CU |
| #define EVTSVT_LGPT3TENSEL_PUBID_LGPT0_DMA 0x0000002BU |
| #define EVTSVT_LGPT3TENSEL_PUBID_LGPT0C2 0x0000002AU |
| #define EVTSVT_LGPT3TENSEL_PUBID_LGPT0C1 0x00000029U |
| #define EVTSVT_LGPT3TENSEL_PUBID_LGPT0C0 0x00000028U |
| #define EVTSVT_LGPT3TENSEL_PUBID_SYSTIM4 0x00000027U |
| #define EVTSVT_LGPT3TENSEL_PUBID_SYSTIM3 0x00000026U |
| #define EVTSVT_LGPT3TENSEL_PUBID_SYSTIM2 0x00000025U |
| #define EVTSVT_LGPT3TENSEL_PUBID_SYSTIM1 0x00000024U |
| #define EVTSVT_LGPT3TENSEL_PUBID_SYSTIM0 0x00000023U |
| #define EVTSVT_LGPT3TENSEL_PUBID_SYSTIM_LT 0x00000022U |
| #define EVTSVT_LGPT3TENSEL_PUBID_SYSTIM_HB 0x00000021U |
| #define EVTSVT_LGPT3TENSEL_PUBID_ADC_EVT 0x00000019U |
| #define EVTSVT_LGPT3TENSEL_PUBID_GPIO_EVT 0x00000012U |
| #define EVTSVT_LGPT3TENSEL_PUBID_NONE 0x00000000U |
| #define EVTSVT_LRFDIN0SEL_PUBID_W 7U |
| #define EVTSVT_LRFDIN0SEL_PUBID_M 0x0000007FU |
| #define EVTSVT_LRFDIN0SEL_PUBID_S 0U |
| #define EVTSVT_LRFDIN0SEL_PUBID_SYSTIM2 0x00000025U |
| #define EVTSVT_LRFDIN1SEL_PUBID_W 7U |
| #define EVTSVT_LRFDIN1SEL_PUBID_M 0x0000007FU |
| #define EVTSVT_LRFDIN1SEL_PUBID_S 0U |
| #define EVTSVT_LRFDIN1SEL_PUBID_SYSTIM3 0x00000026U |
| #define EVTSVT_LRFDIN2SEL_PUBID_W 7U |
| #define EVTSVT_LRFDIN2SEL_PUBID_M 0x0000007FU |
| #define EVTSVT_LRFDIN2SEL_PUBID_S 0U |
| #define EVTSVT_LRFDIN2SEL_PUBID_SYSTIM4 0x00000027U |
| #define EVTSVT_I2SSTMPSEL_PUBID_W 7U |
| #define EVTSVT_I2SSTMPSEL_PUBID_M 0x0000007FU |
| #define EVTSVT_I2SSTMPSEL_PUBID_S 0U |
| #define EVTSVT_I2SSTMPSEL_PUBID_SYSTIM5 0x0000004CU |
| #define EVTSVT_I2SSTMPSEL_PUBID_GPIO_EVT1 0x0000004BU |
| #define EVTSVT_I2SSTMPSEL_PUBID_VCE_IRQ 0x00000046U |
| #define EVTSVT_I2SSTMPSEL_PUBID_SPI1_COMB 0x00000045U |
| #define EVTSVT_I2SSTMPSEL_PUBID_CAN_EVT 0x00000044U |
| #define EVTSVT_I2SSTMPSEL_PUBID_CAN_IRQ 0x00000043U |
| #define EVTSVT_I2SSTMPSEL_PUBID_I2S_IRQ 0x00000042U |
| #define EVTSVT_I2SSTMPSEL_PUBID_LGPT3_ADC 0x00000041U |
| #define EVTSVT_I2SSTMPSEL_PUBID_LGPT3_DMA 0x00000040U |
| #define EVTSVT_I2SSTMPSEL_PUBID_LGPT3_COMB 0x0000003FU |
| #define EVTSVT_I2SSTMPSEL_PUBID_LGPT3C2 0x0000003EU |
| #define EVTSVT_I2SSTMPSEL_PUBID_LGPT3C1 0x0000003DU |
| #define EVTSVT_I2SSTMPSEL_PUBID_LGPT3C0 0x0000003CU |
| #define EVTSVT_I2SSTMPSEL_PUBID_LGPT2_ADC 0x0000003BU |
| #define EVTSVT_I2SSTMPSEL_PUBID_LGPT2_DMA 0x0000003AU |
| #define EVTSVT_I2SSTMPSEL_PUBID_LGPT2_COMB 0x00000039U |
| #define EVTSVT_I2SSTMPSEL_PUBID_LGPT2C2 0x00000038U |
| #define EVTSVT_I2SSTMPSEL_PUBID_LGPT2C1 0x00000037U |
| #define EVTSVT_I2SSTMPSEL_PUBID_LGPT2C0 0x00000036U |
| #define EVTSVT_I2SSTMPSEL_PUBID_UART1_COMB 0x00000035U |
| #define EVTSVT_I2SSTMPSEL_PUBID_LRFD_EVT2 0x00000034U |
| #define EVTSVT_I2SSTMPSEL_PUBID_LRFD_EVT1 0x00000033U |
| #define EVTSVT_I2SSTMPSEL_PUBID_LRFD_EVT0 0x00000032U |
| #define EVTSVT_I2SSTMPSEL_PUBID_LGPT1_ADC 0x00000031U |
| #define EVTSVT_I2SSTMPSEL_PUBID_LGPT1_DMA 0x00000030U |
| #define EVTSVT_I2SSTMPSEL_PUBID_LGPT1C2 0x0000002FU |
| #define EVTSVT_I2SSTMPSEL_PUBID_LGPT1C1 0x0000002EU |
| #define EVTSVT_I2SSTMPSEL_PUBID_LGPT1C0 0x0000002DU |
| #define EVTSVT_I2SSTMPSEL_PUBID_LGPT0_ADC 0x0000002CU |
| #define EVTSVT_I2SSTMPSEL_PUBID_LGPT0_DMA 0x0000002BU |
| #define EVTSVT_I2SSTMPSEL_PUBID_LGPT0C2 0x0000002AU |
| #define EVTSVT_I2SSTMPSEL_PUBID_LGPT0C1 0x00000029U |
| #define EVTSVT_I2SSTMPSEL_PUBID_LGPT0C0 0x00000028U |
| #define EVTSVT_I2SSTMPSEL_PUBID_SYSTIM4 0x00000027U |
| #define EVTSVT_I2SSTMPSEL_PUBID_SYSTIM3 0x00000026U |
| #define EVTSVT_I2SSTMPSEL_PUBID_SYSTIM2 0x00000025U |
| #define EVTSVT_I2SSTMPSEL_PUBID_SYSTIM1 0x00000024U |
| #define EVTSVT_I2SSTMPSEL_PUBID_SYSTIM0 0x00000023U |
| #define EVTSVT_I2SSTMPSEL_PUBID_SYSTIM_LT 0x00000022U |
| #define EVTSVT_I2SSTMPSEL_PUBID_SYSTIM_HB 0x00000021U |
| #define EVTSVT_I2SSTMPSEL_PUBID_I2C0_IRQ 0x00000020U |
| #define EVTSVT_I2SSTMPSEL_PUBID_UART0_COMB 0x0000001FU |
| #define EVTSVT_I2SSTMPSEL_PUBID_AES_COMB 0x0000001EU |
| #define EVTSVT_I2SSTMPSEL_PUBID_DMA_ERR 0x0000001DU |
| #define EVTSVT_I2SSTMPSEL_PUBID_DMA_DONE_COMB 0x0000001CU |
| #define EVTSVT_I2SSTMPSEL_PUBID_LGPT1_COMB 0x0000001BU |
| #define EVTSVT_I2SSTMPSEL_PUBID_LGPT0_COMB 0x0000001AU |
| #define EVTSVT_I2SSTMPSEL_PUBID_ADC_EVT 0x00000019U |
| #define EVTSVT_I2SSTMPSEL_PUBID_ADC_COMB 0x00000018U |
| #define EVTSVT_I2SSTMPSEL_PUBID_SPI0_COMB 0x00000017U |
| #define EVTSVT_I2SSTMPSEL_PUBID_LRFD_IRQ2 0x00000016U |
| #define EVTSVT_I2SSTMPSEL_PUBID_LRFD_IRQ1 0x00000015U |
| #define EVTSVT_I2SSTMPSEL_PUBID_LRFD_IRQ0 0x00000014U |
| #define EVTSVT_I2SSTMPSEL_PUBID_FLASH_IRQ 0x00000013U |
| #define EVTSVT_I2SSTMPSEL_PUBID_GPIO_EVT 0x00000012U |
| #define EVTSVT_I2SSTMPSEL_PUBID_GPIO_COMB 0x00000011U |
| #define EVTSVT_I2SSTMPSEL_PUBID_SYSTIM_COMB 0x00000010U |
| #define EVTSVT_I2SSTMPSEL_PUBID_AON_IOC_COMB 0x00000007U |
| #define EVTSVT_I2SSTMPSEL_PUBID_AON_LPMCMP_IRQ 0x00000006U |
| #define EVTSVT_I2SSTMPSEL_PUBID_AON_DBG_COMB 0x00000005U |
| #define EVTSVT_I2SSTMPSEL_PUBID_AON_RTC_COMB 0x00000004U |
| #define EVTSVT_I2SSTMPSEL_PUBID_AON_CKM_COMB 0x00000003U |
| #define EVTSVT_I2SSTMPSEL_PUBID_AON_PMU_COMB 0x00000002U |
| #define EVTSVT_I2SSTMPSEL_PUBID_NONE 0x00000000U |
| #define EVTSVT_DMACH0SEL_IPID_W 4U |
| #define EVTSVT_DMACH0SEL_IPID_M 0x0000000FU |
| #define EVTSVT_DMACH0SEL_IPID_S 0U |
| #define EVTSVT_DMACH0SEL_IPID_UART1RXTRG 0x0000000DU |
| #define EVTSVT_DMACH0SEL_IPID_SPI0TXTRG 0x00000000U |
| #define EVTSVT_DMACH1SEL_IPID_W 4U |
| #define EVTSVT_DMACH1SEL_IPID_M 0x0000000FU |
| #define EVTSVT_DMACH1SEL_IPID_S 0U |
| #define EVTSVT_DMACH1SEL_IPID_UART1TXTRG 0x0000000CU |
| #define EVTSVT_DMACH1SEL_IPID_SPI0RXTRG 0x00000001U |
| #define EVTSVT_DMACH2SEL_IPID_W 4U |
| #define EVTSVT_DMACH2SEL_IPID_M 0x0000000FU |
| #define EVTSVT_DMACH2SEL_IPID_S 0U |
| #define EVTSVT_DMACH2SEL_IPID_UART0TXTRG 0x00000006U |
| #define EVTSVT_DMACH2SEL_IPID_LRFDTRG 0x00000002U |
| #define EVTSVT_DMACH3SEL_IPID_W 4U |
| #define EVTSVT_DMACH3SEL_IPID_M 0x0000000FU |
| #define EVTSVT_DMACH3SEL_IPID_S 0U |
| #define EVTSVT_DMACH3SEL_IPID_UART0RXTRG 0x00000007U |
| #define EVTSVT_DMACH3SEL_IPID_ADC0TRG 0x00000005U |
| #define EVTSVT_DMACH4SEL_IPID_W 4U |
| #define EVTSVT_DMACH4SEL_IPID_M 0x0000000FU |
| #define EVTSVT_DMACH4SEL_IPID_S 0U |
| #define EVTSVT_DMACH4SEL_IPID_LAESTRGA 0x00000003U |
| #define EVTSVT_DMACH4SEL_IPID_LRFDTRG 0x00000002U |
| #define EVTSVT_DMACH5SEL_IPID_W 4U |
| #define EVTSVT_DMACH5SEL_IPID_M 0x0000000FU |
| #define EVTSVT_DMACH5SEL_IPID_S 0U |
| #define EVTSVT_DMACH5SEL_IPID_ADC0TRG 0x00000005U |
| #define EVTSVT_DMACH5SEL_IPID_LAESTRGB 0x00000004U |
| #define EVTSVT_DMACH6SEL_IPID_W 4U |
| #define EVTSVT_DMACH6SEL_IPID_M 0x0000000FU |
| #define EVTSVT_DMACH6SEL_IPID_S 0U |
| #define EVTSVT_DMACH6SEL_IPID_SPI1TXTRG 0x0000000AU |
| #define EVTSVT_DMACH6SEL_IPID_CANTRGA 0x00000008U |
| #define EVTSVT_DMACH7SEL_IPID_W 4U |
| #define EVTSVT_DMACH7SEL_IPID_M 0x0000000FU |
| #define EVTSVT_DMACH7SEL_IPID_S 0U |
| #define EVTSVT_DMACH7SEL_IPID_SPI1RXTRG 0x0000000BU |
| #define EVTSVT_DMACH7SEL_IPID_CANTRGB 0x00000009U |
| #define EVTSVT_DMACH10SEL_EDGDETDIS 0x00010000U |
| #define EVTSVT_DMACH10SEL_EDGDETDIS_M 0x00010000U |
| #define EVTSVT_DMACH10SEL_EDGDETDIS_S 16U |
| #define EVTSVT_DMACH10SEL_PUBID_W 7U |
| #define EVTSVT_DMACH10SEL_PUBID_M 0x0000007FU |
| #define EVTSVT_DMACH10SEL_PUBID_S 0U |
| #define EVTSVT_DMACH10SEL_PUBID_SYSTIM5 0x0000004CU |
| #define EVTSVT_DMACH10SEL_PUBID_GPIO_EVT1 0x0000004BU |
| #define EVTSVT_DMACH10SEL_PUBID_VCE_IRQ 0x00000046U |
| #define EVTSVT_DMACH10SEL_PUBID_SPI1_COMB 0x00000045U |
| #define EVTSVT_DMACH10SEL_PUBID_CAN_EVT 0x00000044U |
| #define EVTSVT_DMACH10SEL_PUBID_CAN_IRQ 0x00000043U |
| #define EVTSVT_DMACH10SEL_PUBID_I2S_IRQ 0x00000042U |
| #define EVTSVT_DMACH10SEL_PUBID_LGPT3_ADC 0x00000041U |
| #define EVTSVT_DMACH10SEL_PUBID_LGPT3_DMA 0x00000040U |
| #define EVTSVT_DMACH10SEL_PUBID_LGPT3_COMB 0x0000003FU |
| #define EVTSVT_DMACH10SEL_PUBID_LGPT3C2 0x0000003EU |
| #define EVTSVT_DMACH10SEL_PUBID_LGPT3C1 0x0000003DU |
| #define EVTSVT_DMACH10SEL_PUBID_LGPT3C0 0x0000003CU |
| #define EVTSVT_DMACH10SEL_PUBID_LGPT2_ADC 0x0000003BU |
| #define EVTSVT_DMACH10SEL_PUBID_LGPT2_DMA 0x0000003AU |
| #define EVTSVT_DMACH10SEL_PUBID_LGPT2_COMB 0x00000039U |
| #define EVTSVT_DMACH10SEL_PUBID_LGPT2C2 0x00000038U |
| #define EVTSVT_DMACH10SEL_PUBID_LGPT2C1 0x00000037U |
| #define EVTSVT_DMACH10SEL_PUBID_LGPT2C0 0x00000036U |
| #define EVTSVT_DMACH10SEL_PUBID_UART1_COMB 0x00000035U |
| #define EVTSVT_DMACH10SEL_PUBID_LRFD_EVT2 0x00000034U |
| #define EVTSVT_DMACH10SEL_PUBID_LRFD_EVT1 0x00000033U |
| #define EVTSVT_DMACH10SEL_PUBID_LRFD_EVT0 0x00000032U |
| #define EVTSVT_DMACH10SEL_PUBID_LGPT1_ADC 0x00000031U |
| #define EVTSVT_DMACH10SEL_PUBID_LGPT1_DMA 0x00000030U |
| #define EVTSVT_DMACH10SEL_PUBID_LGPT1C2 0x0000002FU |
| #define EVTSVT_DMACH10SEL_PUBID_LGPT1C1 0x0000002EU |
| #define EVTSVT_DMACH10SEL_PUBID_LGPT1C0 0x0000002DU |
| #define EVTSVT_DMACH10SEL_PUBID_LGPT0_ADC 0x0000002CU |
| #define EVTSVT_DMACH10SEL_PUBID_LGPT0_DMA 0x0000002BU |
| #define EVTSVT_DMACH10SEL_PUBID_LGPT0C2 0x0000002AU |
| #define EVTSVT_DMACH10SEL_PUBID_LGPT0C1 0x00000029U |
| #define EVTSVT_DMACH10SEL_PUBID_LGPT0C0 0x00000028U |
| #define EVTSVT_DMACH10SEL_PUBID_SYSTIM4 0x00000027U |
| #define EVTSVT_DMACH10SEL_PUBID_SYSTIM3 0x00000026U |
| #define EVTSVT_DMACH10SEL_PUBID_SYSTIM2 0x00000025U |
| #define EVTSVT_DMACH10SEL_PUBID_SYSTIM1 0x00000024U |
| #define EVTSVT_DMACH10SEL_PUBID_SYSTIM0 0x00000023U |
| #define EVTSVT_DMACH10SEL_PUBID_SYSTIM_LT 0x00000022U |
| #define EVTSVT_DMACH10SEL_PUBID_SYSTIM_HB 0x00000021U |
| #define EVTSVT_DMACH10SEL_PUBID_I2C0_IRQ 0x00000020U |
| #define EVTSVT_DMACH10SEL_PUBID_UART0_COMB 0x0000001FU |
| #define EVTSVT_DMACH10SEL_PUBID_AES_COMB 0x0000001EU |
| #define EVTSVT_DMACH10SEL_PUBID_DMA_ERR 0x0000001DU |
| #define EVTSVT_DMACH10SEL_PUBID_DMA_DONE_COMB 0x0000001CU |
| #define EVTSVT_DMACH10SEL_PUBID_LGPT1_COMB 0x0000001BU |
| #define EVTSVT_DMACH10SEL_PUBID_LGPT0_COMB 0x0000001AU |
| #define EVTSVT_DMACH10SEL_PUBID_ADC_EVT 0x00000019U |
| #define EVTSVT_DMACH10SEL_PUBID_ADC_COMB 0x00000018U |
| #define EVTSVT_DMACH10SEL_PUBID_SPI0_COMB 0x00000017U |
| #define EVTSVT_DMACH10SEL_PUBID_LRFD_IRQ2 0x00000016U |
| #define EVTSVT_DMACH10SEL_PUBID_LRFD_IRQ1 0x00000015U |
| #define EVTSVT_DMACH10SEL_PUBID_LRFD_IRQ0 0x00000014U |
| #define EVTSVT_DMACH10SEL_PUBID_FLASH_IRQ 0x00000013U |
| #define EVTSVT_DMACH10SEL_PUBID_GPIO_EVT 0x00000012U |
| #define EVTSVT_DMACH10SEL_PUBID_GPIO_COMB 0x00000011U |
| #define EVTSVT_DMACH10SEL_PUBID_SYSTIM_COMB 0x00000010U |
| #define EVTSVT_DMACH10SEL_PUBID_AON_IOC_COMB 0x00000007U |
| #define EVTSVT_DMACH10SEL_PUBID_AON_LPMCMP_IRQ 0x00000006U |
| #define EVTSVT_DMACH10SEL_PUBID_AON_DBG_COMB 0x00000005U |
| #define EVTSVT_DMACH10SEL_PUBID_AON_RTC_COMB 0x00000004U |
| #define EVTSVT_DMACH10SEL_PUBID_AON_CKM_COMB 0x00000003U |
| #define EVTSVT_DMACH10SEL_PUBID_AON_PMU_COMB 0x00000002U |
| #define EVTSVT_DMACH10SEL_PUBID_NONE 0x00000000U |
| #define EVTSVT_DMACH11SEL_EDGDETDIS 0x00010000U |
| #define EVTSVT_DMACH11SEL_EDGDETDIS_M 0x00010000U |
| #define EVTSVT_DMACH11SEL_EDGDETDIS_S 16U |
| #define EVTSVT_DMACH11SEL_PUBID_W 7U |
| #define EVTSVT_DMACH11SEL_PUBID_M 0x0000007FU |
| #define EVTSVT_DMACH11SEL_PUBID_S 0U |
| #define EVTSVT_DMACH11SEL_PUBID_SYSTIM5 0x0000004CU |
| #define EVTSVT_DMACH11SEL_PUBID_GPIO_EVT1 0x0000004BU |
| #define EVTSVT_DMACH11SEL_PUBID_VCE_IRQ 0x00000046U |
| #define EVTSVT_DMACH11SEL_PUBID_SPI1_COMB 0x00000045U |
| #define EVTSVT_DMACH11SEL_PUBID_CAN_EVT 0x00000044U |
| #define EVTSVT_DMACH11SEL_PUBID_CAN_IRQ 0x00000043U |
| #define EVTSVT_DMACH11SEL_PUBID_I2S_IRQ 0x00000042U |
| #define EVTSVT_DMACH11SEL_PUBID_LGPT3_ADC 0x00000041U |
| #define EVTSVT_DMACH11SEL_PUBID_LGPT3_DMA 0x00000040U |
| #define EVTSVT_DMACH11SEL_PUBID_LGPT3_COMB 0x0000003FU |
| #define EVTSVT_DMACH11SEL_PUBID_LGPT3C2 0x0000003EU |
| #define EVTSVT_DMACH11SEL_PUBID_LGPT3C1 0x0000003DU |
| #define EVTSVT_DMACH11SEL_PUBID_LGPT3C0 0x0000003CU |
| #define EVTSVT_DMACH11SEL_PUBID_LGPT2_ADC 0x0000003BU |
| #define EVTSVT_DMACH11SEL_PUBID_LGPT2_DMA 0x0000003AU |
| #define EVTSVT_DMACH11SEL_PUBID_LGPT2_COMB 0x00000039U |
| #define EVTSVT_DMACH11SEL_PUBID_LGPT2C2 0x00000038U |
| #define EVTSVT_DMACH11SEL_PUBID_LGPT2C1 0x00000037U |
| #define EVTSVT_DMACH11SEL_PUBID_LGPT2C0 0x00000036U |
| #define EVTSVT_DMACH11SEL_PUBID_UART1_COMB 0x00000035U |
| #define EVTSVT_DMACH11SEL_PUBID_LRFD_EVT2 0x00000034U |
| #define EVTSVT_DMACH11SEL_PUBID_LRFD_EVT1 0x00000033U |
| #define EVTSVT_DMACH11SEL_PUBID_LRFD_EVT0 0x00000032U |
| #define EVTSVT_DMACH11SEL_PUBID_LGPT1_ADC 0x00000031U |
| #define EVTSVT_DMACH11SEL_PUBID_LGPT1_DMA 0x00000030U |
| #define EVTSVT_DMACH11SEL_PUBID_LGPT1C2 0x0000002FU |
| #define EVTSVT_DMACH11SEL_PUBID_LGPT1C1 0x0000002EU |
| #define EVTSVT_DMACH11SEL_PUBID_LGPT1C0 0x0000002DU |
| #define EVTSVT_DMACH11SEL_PUBID_LGPT0_ADC 0x0000002CU |
| #define EVTSVT_DMACH11SEL_PUBID_LGPT0_DMA 0x0000002BU |
| #define EVTSVT_DMACH11SEL_PUBID_LGPT0C2 0x0000002AU |
| #define EVTSVT_DMACH11SEL_PUBID_LGPT0C1 0x00000029U |
| #define EVTSVT_DMACH11SEL_PUBID_LGPT0C0 0x00000028U |
| #define EVTSVT_DMACH11SEL_PUBID_SYSTIM4 0x00000027U |
| #define EVTSVT_DMACH11SEL_PUBID_SYSTIM3 0x00000026U |
| #define EVTSVT_DMACH11SEL_PUBID_SYSTIM2 0x00000025U |
| #define EVTSVT_DMACH11SEL_PUBID_SYSTIM1 0x00000024U |
| #define EVTSVT_DMACH11SEL_PUBID_SYSTIM0 0x00000023U |
| #define EVTSVT_DMACH11SEL_PUBID_SYSTIM_LT 0x00000022U |
| #define EVTSVT_DMACH11SEL_PUBID_SYSTIM_HB 0x00000021U |
| #define EVTSVT_DMACH11SEL_PUBID_I2C0_IRQ 0x00000020U |
| #define EVTSVT_DMACH11SEL_PUBID_UART0_COMB 0x0000001FU |
| #define EVTSVT_DMACH11SEL_PUBID_AES_COMB 0x0000001EU |
| #define EVTSVT_DMACH11SEL_PUBID_DMA_ERR 0x0000001DU |
| #define EVTSVT_DMACH11SEL_PUBID_DMA_DONE_COMB 0x0000001CU |
| #define EVTSVT_DMACH11SEL_PUBID_LGPT1_COMB 0x0000001BU |
| #define EVTSVT_DMACH11SEL_PUBID_LGPT0_COMB 0x0000001AU |
| #define EVTSVT_DMACH11SEL_PUBID_ADC_EVT 0x00000019U |
| #define EVTSVT_DMACH11SEL_PUBID_ADC_COMB 0x00000018U |
| #define EVTSVT_DMACH11SEL_PUBID_SPI0_COMB 0x00000017U |
| #define EVTSVT_DMACH11SEL_PUBID_LRFD_IRQ2 0x00000016U |
| #define EVTSVT_DMACH11SEL_PUBID_LRFD_IRQ1 0x00000015U |
| #define EVTSVT_DMACH11SEL_PUBID_LRFD_IRQ0 0x00000014U |
| #define EVTSVT_DMACH11SEL_PUBID_FLASH_IRQ 0x00000013U |
| #define EVTSVT_DMACH11SEL_PUBID_GPIO_EVT 0x00000012U |
| #define EVTSVT_DMACH11SEL_PUBID_GPIO_COMB 0x00000011U |
| #define EVTSVT_DMACH11SEL_PUBID_SYSTIM_COMB 0x00000010U |
| #define EVTSVT_DMACH11SEL_PUBID_AON_IOC_COMB 0x00000007U |
| #define EVTSVT_DMACH11SEL_PUBID_AON_LPMCMP_IRQ 0x00000006U |
| #define EVTSVT_DMACH11SEL_PUBID_AON_DBG_COMB 0x00000005U |
| #define EVTSVT_DMACH11SEL_PUBID_AON_RTC_COMB 0x00000004U |
| #define EVTSVT_DMACH11SEL_PUBID_AON_CKM_COMB 0x00000003U |
| #define EVTSVT_DMACH11SEL_PUBID_AON_PMU_COMB 0x00000002U |
| #define EVTSVT_DMACH11SEL_PUBID_NONE 0x00000000U |
| #define EVTSVT_DMACH8SEL_EDGDETDIS 0x00010000U |
| #define EVTSVT_DMACH8SEL_EDGDETDIS_M 0x00010000U |
| #define EVTSVT_DMACH8SEL_EDGDETDIS_S 16U |
| #define EVTSVT_DMACH8SEL_PUBID_W 7U |
| #define EVTSVT_DMACH8SEL_PUBID_M 0x0000007FU |
| #define EVTSVT_DMACH8SEL_PUBID_S 0U |
| #define EVTSVT_DMACH8SEL_PUBID_SYSTIM5 0x0000004CU |
| #define EVTSVT_DMACH8SEL_PUBID_GPIO_EVT1 0x0000004BU |
| #define EVTSVT_DMACH8SEL_PUBID_VCE_IRQ 0x00000046U |
| #define EVTSVT_DMACH8SEL_PUBID_SPI1_COMB 0x00000045U |
| #define EVTSVT_DMACH8SEL_PUBID_CAN_EVT 0x00000044U |
| #define EVTSVT_DMACH8SEL_PUBID_CAN_IRQ 0x00000043U |
| #define EVTSVT_DMACH8SEL_PUBID_I2S_IRQ 0x00000042U |
| #define EVTSVT_DMACH8SEL_PUBID_LGPT3_ADC 0x00000041U |
| #define EVTSVT_DMACH8SEL_PUBID_LGPT3_DMA 0x00000040U |
| #define EVTSVT_DMACH8SEL_PUBID_LGPT3_COMB 0x0000003FU |
| #define EVTSVT_DMACH8SEL_PUBID_LGPT3C2 0x0000003EU |
| #define EVTSVT_DMACH8SEL_PUBID_LGPT3C1 0x0000003DU |
| #define EVTSVT_DMACH8SEL_PUBID_LGPT3C0 0x0000003CU |
| #define EVTSVT_DMACH8SEL_PUBID_LGPT2_ADC 0x0000003BU |
| #define EVTSVT_DMACH8SEL_PUBID_LGPT2_DMA 0x0000003AU |
| #define EVTSVT_DMACH8SEL_PUBID_LGPT2_COMB 0x00000039U |
| #define EVTSVT_DMACH8SEL_PUBID_LGPT2C2 0x00000038U |
| #define EVTSVT_DMACH8SEL_PUBID_LGPT2C1 0x00000037U |
| #define EVTSVT_DMACH8SEL_PUBID_LGPT2C0 0x00000036U |
| #define EVTSVT_DMACH8SEL_PUBID_UART1_COMB 0x00000035U |
| #define EVTSVT_DMACH8SEL_PUBID_LRFD_EVT2 0x00000034U |
| #define EVTSVT_DMACH8SEL_PUBID_LRFD_EVT1 0x00000033U |
| #define EVTSVT_DMACH8SEL_PUBID_LRFD_EVT0 0x00000032U |
| #define EVTSVT_DMACH8SEL_PUBID_LGPT1_ADC 0x00000031U |
| #define EVTSVT_DMACH8SEL_PUBID_LGPT1_DMA 0x00000030U |
| #define EVTSVT_DMACH8SEL_PUBID_LGPT1C2 0x0000002FU |
| #define EVTSVT_DMACH8SEL_PUBID_LGPT1C1 0x0000002EU |
| #define EVTSVT_DMACH8SEL_PUBID_LGPT1C0 0x0000002DU |
| #define EVTSVT_DMACH8SEL_PUBID_LGPT0_ADC 0x0000002CU |
| #define EVTSVT_DMACH8SEL_PUBID_LGPT0_DMA 0x0000002BU |
| #define EVTSVT_DMACH8SEL_PUBID_LGPT0C2 0x0000002AU |
| #define EVTSVT_DMACH8SEL_PUBID_LGPT0C1 0x00000029U |
| #define EVTSVT_DMACH8SEL_PUBID_LGPT0C0 0x00000028U |
| #define EVTSVT_DMACH8SEL_PUBID_SYSTIM4 0x00000027U |
| #define EVTSVT_DMACH8SEL_PUBID_SYSTIM3 0x00000026U |
| #define EVTSVT_DMACH8SEL_PUBID_SYSTIM2 0x00000025U |
| #define EVTSVT_DMACH8SEL_PUBID_SYSTIM1 0x00000024U |
| #define EVTSVT_DMACH8SEL_PUBID_SYSTIM0 0x00000023U |
| #define EVTSVT_DMACH8SEL_PUBID_SYSTIM_LT 0x00000022U |
| #define EVTSVT_DMACH8SEL_PUBID_SYSTIM_HB 0x00000021U |
| #define EVTSVT_DMACH8SEL_PUBID_I2C0_IRQ 0x00000020U |
| #define EVTSVT_DMACH8SEL_PUBID_UART0_COMB 0x0000001FU |
| #define EVTSVT_DMACH8SEL_PUBID_AES_COMB 0x0000001EU |
| #define EVTSVT_DMACH8SEL_PUBID_DMA_ERR 0x0000001DU |
| #define EVTSVT_DMACH8SEL_PUBID_DMA_DONE_COMB 0x0000001CU |
| #define EVTSVT_DMACH8SEL_PUBID_LGPT1_COMB 0x0000001BU |
| #define EVTSVT_DMACH8SEL_PUBID_LGPT0_COMB 0x0000001AU |
| #define EVTSVT_DMACH8SEL_PUBID_ADC_EVT 0x00000019U |
| #define EVTSVT_DMACH8SEL_PUBID_ADC_COMB 0x00000018U |
| #define EVTSVT_DMACH8SEL_PUBID_SPI0_COMB 0x00000017U |
| #define EVTSVT_DMACH8SEL_PUBID_LRFD_IRQ2 0x00000016U |
| #define EVTSVT_DMACH8SEL_PUBID_LRFD_IRQ1 0x00000015U |
| #define EVTSVT_DMACH8SEL_PUBID_LRFD_IRQ0 0x00000014U |
| #define EVTSVT_DMACH8SEL_PUBID_FLASH_IRQ 0x00000013U |
| #define EVTSVT_DMACH8SEL_PUBID_GPIO_EVT 0x00000012U |
| #define EVTSVT_DMACH8SEL_PUBID_GPIO_COMB 0x00000011U |
| #define EVTSVT_DMACH8SEL_PUBID_SYSTIM_COMB 0x00000010U |
| #define EVTSVT_DMACH8SEL_PUBID_AON_IOC_COMB 0x00000007U |
| #define EVTSVT_DMACH8SEL_PUBID_AON_LPMCMP_IRQ 0x00000006U |
| #define EVTSVT_DMACH8SEL_PUBID_AON_DBG_COMB 0x00000005U |
| #define EVTSVT_DMACH8SEL_PUBID_AON_RTC_COMB 0x00000004U |
| #define EVTSVT_DMACH8SEL_PUBID_AON_CKM_COMB 0x00000003U |
| #define EVTSVT_DMACH8SEL_PUBID_AON_PMU_COMB 0x00000002U |
| #define EVTSVT_DMACH8SEL_PUBID_NONE 0x00000000U |
| #define EVTSVT_DMACH9SEL_EDGDETDIS 0x00010000U |
| #define EVTSVT_DMACH9SEL_EDGDETDIS_M 0x00010000U |
| #define EVTSVT_DMACH9SEL_EDGDETDIS_S 16U |
| #define EVTSVT_DMACH9SEL_PUBID_W 7U |
| #define EVTSVT_DMACH9SEL_PUBID_M 0x0000007FU |
| #define EVTSVT_DMACH9SEL_PUBID_S 0U |
| #define EVTSVT_DMACH9SEL_PUBID_SYSTIM5 0x0000004CU |
| #define EVTSVT_DMACH9SEL_PUBID_GPIO_EVT1 0x0000004BU |
| #define EVTSVT_DMACH9SEL_PUBID_VCE_IRQ 0x00000046U |
| #define EVTSVT_DMACH9SEL_PUBID_SPI1_COMB 0x00000045U |
| #define EVTSVT_DMACH9SEL_PUBID_CAN_EVT 0x00000044U |
| #define EVTSVT_DMACH9SEL_PUBID_CAN_IRQ 0x00000043U |
| #define EVTSVT_DMACH9SEL_PUBID_I2S_IRQ 0x00000042U |
| #define EVTSVT_DMACH9SEL_PUBID_LGPT3_ADC 0x00000041U |
| #define EVTSVT_DMACH9SEL_PUBID_LGPT3_DMA 0x00000040U |
| #define EVTSVT_DMACH9SEL_PUBID_LGPT3_COMB 0x0000003FU |
| #define EVTSVT_DMACH9SEL_PUBID_LGPT3C2 0x0000003EU |
| #define EVTSVT_DMACH9SEL_PUBID_LGPT3C1 0x0000003DU |
| #define EVTSVT_DMACH9SEL_PUBID_LGPT3C0 0x0000003CU |
| #define EVTSVT_DMACH9SEL_PUBID_LGPT2_ADC 0x0000003BU |
| #define EVTSVT_DMACH9SEL_PUBID_LGPT2_DMA 0x0000003AU |
| #define EVTSVT_DMACH9SEL_PUBID_LGPT2_COMB 0x00000039U |
| #define EVTSVT_DMACH9SEL_PUBID_LGPT2C2 0x00000038U |
| #define EVTSVT_DMACH9SEL_PUBID_LGPT2C1 0x00000037U |
| #define EVTSVT_DMACH9SEL_PUBID_LGPT2C0 0x00000036U |
| #define EVTSVT_DMACH9SEL_PUBID_UART1_COMB 0x00000035U |
| #define EVTSVT_DMACH9SEL_PUBID_LRFD_EVT2 0x00000034U |
| #define EVTSVT_DMACH9SEL_PUBID_LRFD_EVT1 0x00000033U |
| #define EVTSVT_DMACH9SEL_PUBID_LRFD_EVT0 0x00000032U |
| #define EVTSVT_DMACH9SEL_PUBID_LGPT1_ADC 0x00000031U |
| #define EVTSVT_DMACH9SEL_PUBID_LGPT1_DMA 0x00000030U |
| #define EVTSVT_DMACH9SEL_PUBID_LGPT1C2 0x0000002FU |
| #define EVTSVT_DMACH9SEL_PUBID_LGPT1C1 0x0000002EU |
| #define EVTSVT_DMACH9SEL_PUBID_LGPT1C0 0x0000002DU |
| #define EVTSVT_DMACH9SEL_PUBID_LGPT0_ADC 0x0000002CU |
| #define EVTSVT_DMACH9SEL_PUBID_LGPT0_DMA 0x0000002BU |
| #define EVTSVT_DMACH9SEL_PUBID_LGPT0C2 0x0000002AU |
| #define EVTSVT_DMACH9SEL_PUBID_LGPT0C1 0x00000029U |
| #define EVTSVT_DMACH9SEL_PUBID_LGPT0C0 0x00000028U |
| #define EVTSVT_DMACH9SEL_PUBID_SYSTIM4 0x00000027U |
| #define EVTSVT_DMACH9SEL_PUBID_SYSTIM3 0x00000026U |
| #define EVTSVT_DMACH9SEL_PUBID_SYSTIM2 0x00000025U |
| #define EVTSVT_DMACH9SEL_PUBID_SYSTIM1 0x00000024U |
| #define EVTSVT_DMACH9SEL_PUBID_SYSTIM0 0x00000023U |
| #define EVTSVT_DMACH9SEL_PUBID_SYSTIM_LT 0x00000022U |
| #define EVTSVT_DMACH9SEL_PUBID_SYSTIM_HB 0x00000021U |
| #define EVTSVT_DMACH9SEL_PUBID_I2C0_IRQ 0x00000020U |
| #define EVTSVT_DMACH9SEL_PUBID_UART0_COMB 0x0000001FU |
| #define EVTSVT_DMACH9SEL_PUBID_AES_COMB 0x0000001EU |
| #define EVTSVT_DMACH9SEL_PUBID_DMA_ERR 0x0000001DU |
| #define EVTSVT_DMACH9SEL_PUBID_DMA_DONE_COMB 0x0000001CU |
| #define EVTSVT_DMACH9SEL_PUBID_LGPT1_COMB 0x0000001BU |
| #define EVTSVT_DMACH9SEL_PUBID_LGPT0_COMB 0x0000001AU |
| #define EVTSVT_DMACH9SEL_PUBID_ADC_EVT 0x00000019U |
| #define EVTSVT_DMACH9SEL_PUBID_ADC_COMB 0x00000018U |
| #define EVTSVT_DMACH9SEL_PUBID_SPI0_COMB 0x00000017U |
| #define EVTSVT_DMACH9SEL_PUBID_LRFD_IRQ2 0x00000016U |
| #define EVTSVT_DMACH9SEL_PUBID_LRFD_IRQ1 0x00000015U |
| #define EVTSVT_DMACH9SEL_PUBID_LRFD_IRQ0 0x00000014U |
| #define EVTSVT_DMACH9SEL_PUBID_FLASH_IRQ 0x00000013U |
| #define EVTSVT_DMACH9SEL_PUBID_GPIO_EVT 0x00000012U |
| #define EVTSVT_DMACH9SEL_PUBID_GPIO_COMB 0x00000011U |
| #define EVTSVT_DMACH9SEL_PUBID_SYSTIM_COMB 0x00000010U |
| #define EVTSVT_DMACH9SEL_PUBID_AON_IOC_COMB 0x00000007U |
| #define EVTSVT_DMACH9SEL_PUBID_AON_LPMCMP_IRQ 0x00000006U |
| #define EVTSVT_DMACH9SEL_PUBID_AON_DBG_COMB 0x00000005U |
| #define EVTSVT_DMACH9SEL_PUBID_AON_RTC_COMB 0x00000004U |
| #define EVTSVT_DMACH9SEL_PUBID_AON_CKM_COMB 0x00000003U |
| #define EVTSVT_DMACH9SEL_PUBID_AON_PMU_COMB 0x00000002U |
| #define EVTSVT_DMACH9SEL_PUBID_NONE 0x00000000U |