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SPILPF3DMA Hardware attributes. More...
#include <SPILPF3DMA.h>
Data Fields | |
uint32_t | baseAddr |
SPI Peripheral's base address. More... | |
uint32_t | swiPriority |
SPI SWI priority. The higher the number, the higher the priority. The minimum is 0 and the maximum is 15 by default. The maximum can be reduced to save RAM by adding or modifying Swi.numPriorities in the kernel configuration file. More... | |
uint32_t | rxChannelBitMask |
uint32_t | txChannelBitMask |
volatile uDMAControlTableEntry * | dmaTxTableEntryPri |
volatile uDMAControlTableEntry * | dmaRxTableEntryPri |
volatile uDMAControlTableEntry * | dmaTxTableEntryAlt |
volatile uDMAControlTableEntry * | dmaRxTableEntryAlt |
int32_t | pociPinMux |
int32_t | picoPinMux |
int32_t | sclkPinMux |
int32_t | csnPinMux |
uint32_t | minDmaTransferSize |
PowerLPF3_Resource | powerID |
uint16_t | defaultTxBufValue |
uint8_t | txChannelEvtMux |
uint8_t | rxChannelEvtMux |
uint8_t | intNum |
uint8_t | intPriority |
SPILPF3DMA Peripheral's interrupt priority. More... | |
uint_least8_t | picoPin |
uint_least8_t | pociPin |
uint_least8_t | sclkPin |
uint_least8_t | csnPin |
SPILPF3DMA Hardware attributes.
These fields, with the exception of intPriority, are used by driverlib APIs and therefore must be populated by driverlib macro definitions. For driverlib these definitions are found in:
intPriority is the SPI peripheral's interrupt priority, as defined by the underlying OS. It is passed unmodified to the underlying OS's interrupt handler creation code, so you need to refer to the OS documentation for usage. For example, for SYS/BIOS applications, refer to the ti.sysbios.family.arm.m3.Hwi documentation for SYS/BIOS usage of interrupt priorities. If the driver uses the ti.dpl interface instead of making OS calls directly, then the HwiP port handles the interrupt priority in an OS specific way. In the case of the SYS/BIOS port, intPriority is passed unmodified to Hwi_create().
A sample structure is shown below:
uint32_t SPILPF3DMA_HWAttrs::baseAddr |
SPI Peripheral's base address.
uint32_t SPILPF3DMA_HWAttrs::swiPriority |
SPI SWI priority. The higher the number, the higher the priority. The minimum is 0 and the maximum is 15 by default. The maximum can be reduced to save RAM by adding or modifying Swi.numPriorities in the kernel configuration file.
uint32_t SPILPF3DMA_HWAttrs::rxChannelBitMask |
uDMA controlTable channel index
uint32_t SPILPF3DMA_HWAttrs::txChannelBitMask |
uDMA controlTable channel index
volatile uDMAControlTableEntry* SPILPF3DMA_HWAttrs::dmaTxTableEntryPri |
uDMA controlTable primary tx entry
volatile uDMAControlTableEntry* SPILPF3DMA_HWAttrs::dmaRxTableEntryPri |
uDMA controlTable primary tx entry
volatile uDMAControlTableEntry* SPILPF3DMA_HWAttrs::dmaTxTableEntryAlt |
uDMA controlTable alternate tx entry
volatile uDMAControlTableEntry* SPILPF3DMA_HWAttrs::dmaRxTableEntryAlt |
uDMA controlTable alternate rx entry
int32_t SPILPF3DMA_HWAttrs::pociPinMux |
POCI PIN mux value. Can be applied to either PICO or POCI
int32_t SPILPF3DMA_HWAttrs::picoPinMux |
PICO PIN mux value. Can be applied to either PICO or POCI
int32_t SPILPF3DMA_HWAttrs::sclkPinMux |
SCLK PIN mux value for flow control
int32_t SPILPF3DMA_HWAttrs::csnPinMux |
CSN PIN mux value for flow control
uint32_t SPILPF3DMA_HWAttrs::minDmaTransferSize |
Minimum transfer size for DMA based transfer
PowerLPF3_Resource SPILPF3DMA_HWAttrs::powerID |
Power driver ID for this SPI instance
uint16_t SPILPF3DMA_HWAttrs::defaultTxBufValue |
Default TX value if txBuf == NULL
uint8_t SPILPF3DMA_HWAttrs::txChannelEvtMux |
DMA Mux ID for this SPI TX channel
uint8_t SPILPF3DMA_HWAttrs::rxChannelEvtMux |
DMA Mux ID for this SPI RX channel
uint8_t SPILPF3DMA_HWAttrs::intNum |
SPILPF3DMA Peripheral's interrupt vector
uint8_t SPILPF3DMA_HWAttrs::intPriority |
SPILPF3DMA Peripheral's interrupt priority.
The Low Power F3 devices use either three or two priority bits, depending on the device. That means ~0 has the same effect as (7 << 5) or (3 << 6), respectively.
Setting the priority to 0 is not supported by this driver.
HWI's with priority 0 ignore the HWI dispatcher to support zero-latency interrupts, thus invalidating the critical sections in this driver.
uint_least8_t SPILPF3DMA_HWAttrs::picoPin |
SPI PICO pin
uint_least8_t SPILPF3DMA_HWAttrs::pociPin |
SPI POCI pin
uint_least8_t SPILPF3DMA_HWAttrs::sclkPin |
SPI SCLK pin
uint_least8_t SPILPF3DMA_HWAttrs::csnPin |
SPI CSN pin