Data Fields
MCAN_MsgRamConfig Struct Reference

Structure for MCAN Message RAM Configuration Parameters. More...

#include <MCAN.h>

Data Fields

uint32_t sidFilterStartAddr
 
uint32_t sidFilterListSize
 
uint32_t xidFilterStartAddr
 
uint32_t xidFilterListSize
 
uint32_t rxFifo0StartAddr
 
uint32_t rxFifo0Size
 
uint32_t rxFifo0Watermark
 
uint32_t rxFifo0OpMode
 
uint32_t rxFifo1StartAddr
 
uint32_t rxFifo1Size
 
uint32_t rxFifo1Watermark
 
uint32_t rxFifo1OpMode
 
uint32_t rxBufStartAddr
 
uint32_t rxBufElemSize
 
uint32_t rxFifo0ElemSize
 
uint32_t rxFifo1ElemSize
 
uint32_t txEventFifoStartAddr
 
uint32_t txEventFifoSize
 
uint32_t txEventFifoWatermark
 
uint32_t txBufStartAddr
 
uint32_t txBufNum
 
uint32_t txFifoQSize
 
uint32_t txFifoQMode
 
uint32_t txBufElemSize
 

Detailed Description

Structure for MCAN Message RAM Configuration Parameters.

Message RAM can contain following sections:

Note
If any section in the message RAM is not used then its size should be initialized to '0'. (Number of buffers in case of Tx/Rx buffer).

Field Documentation

§ sidFilterStartAddr

uint32_t MCAN_MsgRamConfig::sidFilterStartAddr

Standard ID Filter List Start Address

§ sidFilterListSize

uint32_t MCAN_MsgRamConfig::sidFilterListSize

List Size: Standard ID
0 = No standard Message ID filter
1-128 = Number of standard Message ID filter elements

§ xidFilterStartAddr

uint32_t MCAN_MsgRamConfig::xidFilterStartAddr

Extended ID Filter List Start Address

§ xidFilterListSize

uint32_t MCAN_MsgRamConfig::xidFilterListSize

List Size: Extended ID
0 = No standard Message ID filter
1-64 = Number of standard Message ID filter elements

§ rxFifo0StartAddr

uint32_t MCAN_MsgRamConfig::rxFifo0StartAddr

Rx FIFO0 Start Address

§ rxFifo0Size

uint32_t MCAN_MsgRamConfig::rxFifo0Size

Rx FIFO0 Size
0 = No Rx FIFO
1-64 = Number of Rx FIFO elements

§ rxFifo0Watermark

uint32_t MCAN_MsgRamConfig::rxFifo0Watermark

Rx FIFO0 Watermark
0 = Watermark interrupt disabled
1-64 = Level for Rx FIFO 0 watermark interrupt

§ rxFifo0OpMode

uint32_t MCAN_MsgRamConfig::rxFifo0OpMode

Rx FIFO0 Operation Mode
0 = FIFO blocking mode
1 = FIFO overwrite mode

§ rxFifo1StartAddr

uint32_t MCAN_MsgRamConfig::rxFifo1StartAddr

Rx FIFO1 Start Address

§ rxFifo1Size

uint32_t MCAN_MsgRamConfig::rxFifo1Size

Rx FIFO1 Size
0 = No Rx FIFO
1-64 = Number of Rx FIFO elements

§ rxFifo1Watermark

uint32_t MCAN_MsgRamConfig::rxFifo1Watermark

Rx FIFO1 Watermark
0 = Watermark interrupt disabled
1-64 = Level for Rx FIFO 1 watermark interrupt

§ rxFifo1OpMode

uint32_t MCAN_MsgRamConfig::rxFifo1OpMode

Rx FIFO1 Operation Mode
0 = FIFO blocking mode
1 = FIFO overwrite mode

§ rxBufStartAddr

uint32_t MCAN_MsgRamConfig::rxBufStartAddr

Rx Buffer Start Address

§ rxBufElemSize

uint32_t MCAN_MsgRamConfig::rxBufElemSize

Rx Buffer Element Size

§ rxFifo0ElemSize

uint32_t MCAN_MsgRamConfig::rxFifo0ElemSize

Rx FIFO0 Element Size

§ rxFifo1ElemSize

uint32_t MCAN_MsgRamConfig::rxFifo1ElemSize

Rx FIFO1 Element Size

§ txEventFifoStartAddr

uint32_t MCAN_MsgRamConfig::txEventFifoStartAddr

Tx Event FIFO Start Address

§ txEventFifoSize

uint32_t MCAN_MsgRamConfig::txEventFifoSize

Event FIFO Size
0 = Tx Event FIFO disabled
1-32 = Number of Tx Event FIFO elements

§ txEventFifoWatermark

uint32_t MCAN_MsgRamConfig::txEventFifoWatermark

Tx Event FIFO Watermark
0 = Watermark interrupt disabled
1-32 = Level for Tx Event FIFO watermark interrupt

§ txBufStartAddr

uint32_t MCAN_MsgRamConfig::txBufStartAddr

Tx Buffers Start Address

§ txBufNum

uint32_t MCAN_MsgRamConfig::txBufNum

Number of Dedicated Transmit Buffers
0 = No Dedicated Tx Buffers
1-32 = Number of Dedicated Tx Buffers

§ txFifoQSize

uint32_t MCAN_MsgRamConfig::txFifoQSize

Transmit FIFO/Queue Size
0 = No Tx FIFO/Queue
1-32 = Number of Tx Buffers used for Tx FIFO/Queue

§ txFifoQMode

uint32_t MCAN_MsgRamConfig::txFifoQMode

Tx FIFO/Queue Mode
0 = Tx FIFO operation
1 = Tx Queue operation

§ txBufElemSize

uint32_t MCAN_MsgRamConfig::txBufElemSize

Tx Buffer Element Size


The documentation for this struct was generated from the following file:
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