Detailed Description

Power manager interface for CC23X0 devices.

============================================================================

The Power header file should be included in an application by including the top level header file as follows:

Refer to Power.h for a complete description of APIs.

Implementation

This header file defines the power resources, constraints, events, sleep states and transition latencies for CC23X0.

#include <ti/drivers/dpl/HwiP.h>
#include <ti/drivers/dpl/ClockP.h>
#include <ti/drivers/Power.h>
#include <ti/devices/DeviceFamily.h>
#include <DeviceFamily_constructPath(inc/hw_pmctl.h)>
#include <DeviceFamily_constructPath(inc/hw_clkctl.h)>
#include <DeviceFamily_constructPath(inc/hw_lrfddbell.h)>
#include <DeviceFamily_constructPath(inc/hw_memmap.h)>
#include <DeviceFamily_constructPath(inc/hw_types.h)>
#include <DeviceFamily_constructPath(driverlib/pmctl.h)>

Include dependency graph for PowerCC23X0.h:

Go to the source code of this file.

Data Structures
struct	PowerCC23X0_Config
	Global configuration structure. More...

Macros
#define	PowerCC23X0_RESUMETIMESTANDBY 400

#define	PowerCC23X0_TOTALTIMESTANDBY 500

#define	PowerCC23X0_WAKEDELAYSTANDBY 185

#define	PowerLPF3_PERIPH_GPIO (PowerCC23X0_PERIPH_GROUP_CLKCTL0 \| CLKCTL_DESCEX0_GPIO_S)

#define	PowerLPF3_PERIPH_UART0 (PowerCC23X0_PERIPH_GROUP_CLKCTL0 \| CLKCTL_DESCEX0_UART0_S)

#define	PowerLPF3_PERIPH_I2C0 (PowerCC23X0_PERIPH_GROUP_CLKCTL0 \| CLKCTL_DESCEX0_I2C0_S)

#define	PowerLPF3_PERIPH_SPI0 (PowerCC23X0_PERIPH_GROUP_CLKCTL0 \| CLKCTL_DESCEX0_SPI0_S)

#define	PowerLPF3_PERIPH_ADC0 (PowerCC23X0_PERIPH_GROUP_CLKCTL0 \| CLKCTL_DESCEX0_ADC0_S)

#define	PowerLPF3_PERIPH_AES (PowerCC23X0_PERIPH_GROUP_CLKCTL0 \| CLKCTL_DESCEX0_LAES_S)

#define	PowerLPF3_PERIPH_DMA (PowerCC23X0_PERIPH_GROUP_CLKCTL0 \| CLKCTL_DESCEX0_DMA_S)

#define	PowerLPF3_PERIPH_LGPT0 (PowerCC23X0_PERIPH_GROUP_CLKCTL0 \| CLKCTL_DESCEX0_LGPT0_S)

#define	PowerLPF3_PERIPH_LGPT1 (PowerCC23X0_PERIPH_GROUP_CLKCTL0 \| CLKCTL_DESCEX0_LGPT1_S)

#define	PowerLPF3_PERIPH_LGPT2 (PowerCC23X0_PERIPH_GROUP_CLKCTL0 \| CLKCTL_DESCEX0_LGPT2_S)

#define	PowerLPF3_PERIPH_LGPT3 (PowerCC23X0_PERIPH_GROUP_CLKCTL0 \| CLKCTL_DESCEX0_LGPT3_S)

#define	PowerLPF3_PERIPH_LFRD_TRC (PowerCC23X0_PERIPH_GROUP_LRFD \| LRFDDBELL_CLKCTL_TRC_S)

#define	PowerLPF3_PERIPH_LFRD_S2RRAM (PowerCC23X0_PERIPH_GROUP_LRFD \| LRFDDBELL_CLKCTL_S2RRAM_S)

#define	PowerLPF3_STANDBY 0x1

#define	PowerLPF3_DISALLOW_SHUTDOWN 0

#define	PowerLPF3_DISALLOW_STANDBY 1

#define	PowerLPF3_DISALLOW_IDLE 2

#define	PowerLPF3_NEED_FLASH_IN_IDLE 3

#define	PowerLPF3_ENTERING_STANDBY (1 << 0)

#define	PowerLPF3_ENTERING_SHUTDOWN (1 << 1)

#define	PowerLPF3_AWAKE_STANDBY (1 << 2)

#define	PowerLPF3_HFXT_AVAILABLE (1 << 3)

#define	PowerLPF3_LFCLK_SWITCHED (1 << 4)

#define	Power_getPerformanceLevel(void) 0

#define	Power_setPerformanceLevel(level) Power_EFAIL

Enumerations
enum	PowerLPF3_ResetReason { PowerLPF3_RESET_SHUTDOWN_IO = PMCTL_RESET_SHUTDOWN_IO, PowerLPF3_RESET_SHUTDOWN_SWD = PMCTL_RESET_SHUTDOWN_SWD, PowerLPF3_RESET_WATCHDOG = PMCTL_RESET_WATCHDOG, PowerLPF3_RESET_SYSTEM = PMCTL_RESET_SYSTEM, PowerLPF3_RESET_CPU = PMCTL_RESET_CPU, PowerLPF3_RESET_LOCKUP = PMCTL_RESET_LOCKUP, PowerLPF3_RESET_TSD = PMCTL_RESET_TSD, PowerLPF3_RESET_SWD = PMCTL_RESET_SWD, PowerLPF3_RESET_LFXT = PMCTL_RESET_LFXT, PowerLPF3_RESET_VDDR = PMCTL_RESET_VDDR, PowerLPF3_RESET_VDDS = PMCTL_RESET_VDDS, PowerLPF3_RESET_PIN = PMCTL_RESET_PIN, PowerLPF3_RESET_POR = PMCTL_RESET_POR, PowerLPF3_RESET_SHUTDOWN_IO = PMCTL_RESET_SHUTDOWN_IO, PowerLPF3_RESET_SHUTDOWN_SWD = PMCTL_RESET_SHUTDOWN_SWD, PowerLPF3_RESET_WATCHDOG = PMCTL_RESET_WATCHDOG, PowerLPF3_RESET_SYSTEM = PMCTL_RESET_SYSTEM, PowerLPF3_RESET_CPU = PMCTL_RESET_CPU, PowerLPF3_RESET_LOCKUP = PMCTL_RESET_LOCKUP, PowerLPF3_RESET_TSD = PMCTL_RESET_TSD, PowerLPF3_RESET_SWD = PMCTL_RESET_SWD, PowerLPF3_RESET_LFXT = PMCTL_RESET_LFXT, PowerLPF3_RESET_VDDR = PMCTL_RESET_VDDR, PowerLPF3_RESET_VDDS = PMCTL_RESET_VDDS, PowerLPF3_RESET_PIN = PMCTL_RESET_PIN, PowerLPF3_RESET_POR = PMCTL_RESET_POR }
	Reasons the device has booted or rebooted. More...

Functions
void	PowerCC23X0_doWFI (void)
	The wait for interrupt (WFI) policy. More...

static PowerLPF3_ResetReason	PowerLPF3_getResetReason (void)
	Returns the reason for the most recent reset or wakeup. More...

static void	PowerLPF3_releaseLatches (void)
	Unlatch all IOs. More...

void	PowerCC23X0_standbyPolicy (void)
	The STANDBY Power Policy. More...

void	PowerLPF3_selectLFOSC (void)
	Select LFOSC as LFCLK source. More...

void	PowerLPF3_selectLFXT (void)
	Select LFOSC as LFCLK source. More...

void	PowerCC23X0_schedulerDisable (void)

void	PowerCC23X0_schedulerRestore (void)

Macro Definition Documentation

§ PowerCC23X0_RESUMETIMESTANDBY

#define PowerCC23X0_RESUMETIMESTANDBY 400

The latency to reserve for resume from STANDBY (usec).

§ PowerCC23X0_TOTALTIMESTANDBY

#define PowerCC23X0_TOTALTIMESTANDBY 500

The total latency to reserve for entry to and exit from STANDBY (usec).

§ PowerCC23X0_WAKEDELAYSTANDBY

#define PowerCC23X0_WAKEDELAYSTANDBY 185

The initial delay when waking from STANDBY (usec).

§ PowerLPF3_PERIPH_GPIO

#define PowerLPF3_PERIPH_GPIO (PowerCC23X0_PERIPH_GROUP_CLKCTL0 | CLKCTL_DESCEX0_GPIO_S)

< Resource ID: General Purpose I/O Resource ID: UART 0

§ PowerLPF3_PERIPH_UART0

#define PowerLPF3_PERIPH_UART0 (PowerCC23X0_PERIPH_GROUP_CLKCTL0 | CLKCTL_DESCEX0_UART0_S)

Resource ID: I2C 0

§ PowerLPF3_PERIPH_I2C0

#define PowerLPF3_PERIPH_I2C0 (PowerCC23X0_PERIPH_GROUP_CLKCTL0 | CLKCTL_DESCEX0_I2C0_S)

Resource ID: SPI 0

§ PowerLPF3_PERIPH_SPI0

#define PowerLPF3_PERIPH_SPI0 (PowerCC23X0_PERIPH_GROUP_CLKCTL0 | CLKCTL_DESCEX0_SPI0_S)

Resource ID: ADC

§ PowerLPF3_PERIPH_ADC0

#define PowerLPF3_PERIPH_ADC0 (PowerCC23X0_PERIPH_GROUP_CLKCTL0 | CLKCTL_DESCEX0_ADC0_S)

Resource ID: AES Security Module

§ PowerLPF3_PERIPH_AES

#define PowerLPF3_PERIPH_AES (PowerCC23X0_PERIPH_GROUP_CLKCTL0 | CLKCTL_DESCEX0_LAES_S)

Resource ID: uDMA Controller

§ PowerLPF3_PERIPH_DMA

#define PowerLPF3_PERIPH_DMA (PowerCC23X0_PERIPH_GROUP_CLKCTL0 | CLKCTL_DESCEX0_DMA_S)

Resource ID: General Purpose Timer 0

§ PowerLPF3_PERIPH_LGPT0

#define PowerLPF3_PERIPH_LGPT0 (PowerCC23X0_PERIPH_GROUP_CLKCTL0 | CLKCTL_DESCEX0_LGPT0_S)

Resource ID: General Purpose Timer 1

§ PowerLPF3_PERIPH_LGPT1

#define PowerLPF3_PERIPH_LGPT1 (PowerCC23X0_PERIPH_GROUP_CLKCTL0 | CLKCTL_DESCEX0_LGPT1_S)

§ PowerLPF3_PERIPH_LGPT2

#define PowerLPF3_PERIPH_LGPT2 (PowerCC23X0_PERIPH_GROUP_CLKCTL0 | CLKCTL_DESCEX0_LGPT2_S)

< Resource ID: General Purpose Timer 2 Resource ID: General Purpose Timer 3

§ PowerLPF3_PERIPH_LGPT3

#define PowerLPF3_PERIPH_LGPT3 (PowerCC23X0_PERIPH_GROUP_CLKCTL0 | CLKCTL_DESCEX0_LGPT3_S)

Resource ID: LRFD Tracer

§ PowerLPF3_PERIPH_LFRD_TRC

#define PowerLPF3_PERIPH_LFRD_TRC (PowerCC23X0_PERIPH_GROUP_LRFD | LRFDDBELL_CLKCTL_TRC_S)

Resource ID: LRFD S2R RAM

§ PowerLPF3_PERIPH_LFRD_S2RRAM

#define PowerLPF3_PERIPH_LFRD_S2RRAM (PowerCC23X0_PERIPH_GROUP_LRFD | LRFDDBELL_CLKCTL_S2RRAM_S)

§ PowerLPF3_STANDBY

#define PowerLPF3_STANDBY 0x1

The STANDBY sleep state

§ PowerLPF3_DISALLOW_SHUTDOWN

#define PowerLPF3_DISALLOW_SHUTDOWN 0

< Constraint: Disallow a transition to the SHUTDOWN state Constraint: Disallow a transition to the STANDBY sleep state

§ PowerLPF3_DISALLOW_STANDBY

#define PowerLPF3_DISALLOW_STANDBY 1

Constraint: Disallow a transition to the IDLE sleep state

§ PowerLPF3_DISALLOW_IDLE

#define PowerLPF3_DISALLOW_IDLE 2

Constraint: Flash memory needs to enabled during IDLE

§ PowerLPF3_NEED_FLASH_IN_IDLE

#define PowerLPF3_NEED_FLASH_IN_IDLE 3

§ PowerLPF3_ENTERING_STANDBY

#define PowerLPF3_ENTERING_STANDBY (1 << 0)

< Power event: The device is entering the STANDBY sleep state Power event: The device is entering the SHUTDOWN state

§ PowerLPF3_ENTERING_SHUTDOWN

#define PowerLPF3_ENTERING_SHUTDOWN (1 << 1)

Power event: The device is waking up from the STANDBY sleep state

§ PowerLPF3_AWAKE_STANDBY

#define PowerLPF3_AWAKE_STANDBY (1 << 2)

Power event: The high frequency (HF) crystal oscillator is now available for use (HFXT) by the digital domain

§ PowerLPF3_HFXT_AVAILABLE

#define PowerLPF3_HFXT_AVAILABLE (1 << 3)

Power event: The system has switched to the low frequency clock source configured in CCFG

§ PowerLPF3_LFCLK_SWITCHED

#define PowerLPF3_LFCLK_SWITCHED (1 << 4)

§ Power_getPerformanceLevel

#define Power_getPerformanceLevel ( void ) 0

§ Power_setPerformanceLevel

#define Power_setPerformanceLevel ( level ) Power_EFAIL

Enumeration Type Documentation

§ PowerLPF3_ResetReason

enum PowerLPF3_ResetReason

Reasons the device has booted or rebooted.

Enumerator
PowerLPF3_RESET_SHUTDOWN_IO	Device woke up from shutdown due to an IO event
PowerLPF3_RESET_SHUTDOWN_SWD	Device woke up from shutdown due to an SWD event
PowerLPF3_RESET_WATCHDOG	Device reset because of a watchdog timeout.
PowerLPF3_RESET_SYSTEM	Device reset trggered by software writing to RSTCTL.SYSRST
PowerLPF3_RESET_CPU	Device reset triggered by CPU reset event
PowerLPF3_RESET_LOCKUP	Device reset triggered by CPU lockup event
PowerLPF3_RESET_TSD	Device woke up from thermal shutdown after temperature drop
PowerLPF3_RESET_SWD	Device woke up due to Serial Wire Debug event
PowerLPF3_RESET_LFXT	Device reset due to LFXT clock loss
PowerLPF3_RESET_VDDR	Device reset due to VDDR brownout event
PowerLPF3_RESET_VDDS	Device reset due to VDDS brownout event
PowerLPF3_RESET_PIN	Device reset due to pin reset
PowerLPF3_RESET_POR	Device booted due to power on reset
PowerLPF3_RESET_SHUTDOWN_IO	Device woke up from shutdown due to an IO event
PowerLPF3_RESET_SHUTDOWN_SWD	Device woke up from shutdown due to an SWD event
PowerLPF3_RESET_WATCHDOG	Device reset because of a watchdog timeout.
PowerLPF3_RESET_SYSTEM	Device reset trggered by software writing to RSTCTL.SYSRST
PowerLPF3_RESET_CPU	Device reset triggered by CPU reset event
PowerLPF3_RESET_LOCKUP	Device reset triggered by CPU lockup event
PowerLPF3_RESET_TSD	Device woke up from thermal shutdown after temperature drop
PowerLPF3_RESET_SWD	Device woke up due to Serial Wire Debug event
PowerLPF3_RESET_LFXT	Device reset due to LFXT clock loss
PowerLPF3_RESET_VDDR	Device reset due to VDDR brownout event
PowerLPF3_RESET_VDDS	Device reset due to VDDS brownout event
PowerLPF3_RESET_PIN	Device reset due to pin reset
PowerLPF3_RESET_POR	Device booted due to power on reset

Function Documentation

§ PowerCC23X0_doWFI()

void PowerCC23X0_doWFI ( void )

The wait for interrupt (WFI) policy.

This is a lightweight Power Policy which simply invokes CPU wait for interrupt.

This policy can be selected statically via the policyFxn pointer in the PowerCC23X0_Config structure, or dynamically at runtime, via Power_setPolicy().

§ PowerLPF3_getResetReason()

static PowerLPF3_ResetReason PowerLPF3_getResetReason ( void )

inlinestatic

Returns the reason for the most recent reset or wakeup.

Returns: PowerLPF3_ResetReason

Precondition: Power_shutdown()

Postcondition: PowerLPF3_releaseLatches()

§ PowerLPF3_releaseLatches()

static void PowerLPF3_releaseLatches ( void )

inlinestatic

Unlatch all IOs.

This function releases the latches on all frozen IOs. This function should be called after waking up from shutdown and reconfiguring the IO state so as not to cause glitches.

Note: Calling this function will clear the reset reason register if it was PowerLPF3_RESET_SHUTDOWN_IO and PowerLPF3_RESET_SHUTDOWN_SWD and cause PowerLPF3_getResetReason() not to return the true reset reason.

Precondition: Power_shutdown(); PowerLPF3_getResetReason()

References PowerCC23X0_schedulerDisable(), PowerCC23X0_schedulerRestore(), PowerCC23X0_standbyPolicy(), PowerLPF3_selectLFOSC(), and PowerLPF3_selectLFXT().

§ PowerCC23X0_standbyPolicy()

void PowerCC23X0_standbyPolicy ( void )

The STANDBY Power Policy.

This is an agressive Power Policy, which considers active constraints, sleep state transition latencies, and time until the next scheduled work, and automatically transitions the device into the deepest sleep state possible.

The first goal is to enter STANDBY; if that is not appropriate given current conditions (e.g., the sleep transition latency is greater greater than the time until the next scheduled Clock event), then the secondary goal is the IDLE state; if that is disallowed (e.g., if the PowerLPF3_DISALLOW_IDLE constraint is declared), then the policy will fallback and simply invoke WFI, to clock gate the CPU until the next interrupt.

In order for this policy to run, it must be selected as the Power Policy (either by being specified as the 'policyFxn' in the PowerCC23X0_Config structure, or specified at runtime with Power_setPolicy()), and the Power Policy must be enabled (either via 'enablePolicy' in the PowerCC23X0_Config structure, or via a call to Power_enablePolicy() at runtime).

Referenced by PowerLPF3_releaseLatches().

§ PowerLPF3_selectLFOSC()

void PowerLPF3_selectLFOSC ( void )

Select LFOSC as LFCLK source.

Turn on the LFOSC and choose it as LFCLK source. Once LFCLK has switched, the PowerLPF3_LFCLK_SWITCHED notification will be issued and all subscribers to this event will be notified.

Warning: Dynamic switching between LF clocks is not supported. Once one of PowerLPF3_selectLFOSC() or PowerLPF3_selectLFXT() is called in an application, the other one may not be invoked thereafter.

Precondition: Power_init()

See also: PowerLPF3_selectLFXT()

Referenced by PowerLPF3_releaseLatches().

§ PowerLPF3_selectLFXT()

void PowerLPF3_selectLFXT ( void )

Select LFOSC as LFCLK source.

Turn on the LFXT and choose it as LFCLK source. Once LFCLK has switched, the PowerLPF3_LFCLK_SWITCHED notification will be issued and all subscribers to this event will be notified.

Warning: Dynamic switching between LF clocks is not supported. Once one of PowerLPF3_selectLFOSC() or PowerLPF3_selectLFXT() is called in an application, the other one may not be invoked thereafter.

Precondition: Power_init()

See also: PowerLPF3_selectLFOSC()

Referenced by PowerLPF3_releaseLatches().

§ PowerCC23X0_schedulerDisable()

void PowerCC23X0_schedulerDisable ( void )

Referenced by PowerLPF3_releaseLatches().

§ PowerCC23X0_schedulerRestore()

void PowerCC23X0_schedulerRestore ( void )

Referenced by PowerLPF3_releaseLatches().

Detailed Description

Implementation

Data Structures

Macros

Enumerations

Functions

Macro Definition Documentation

§ PowerCC23X0_RESUMETIMESTANDBY

§ PowerCC23X0_TOTALTIMESTANDBY

§ PowerCC23X0_WAKEDELAYSTANDBY

§ PowerLPF3_PERIPH_GPIO

§ PowerLPF3_PERIPH_UART0

§ PowerLPF3_PERIPH_I2C0

§ PowerLPF3_PERIPH_SPI0

§ PowerLPF3_PERIPH_ADC0

§ PowerLPF3_PERIPH_AES

§ PowerLPF3_PERIPH_DMA

§ PowerLPF3_PERIPH_LGPT0

§ PowerLPF3_PERIPH_LGPT1

§ PowerLPF3_PERIPH_LGPT2

§ PowerLPF3_PERIPH_LGPT3

§ PowerLPF3_PERIPH_LFRD_TRC

§ PowerLPF3_PERIPH_LFRD_S2RRAM

§ PowerLPF3_STANDBY

§ PowerLPF3_DISALLOW_SHUTDOWN

§ PowerLPF3_DISALLOW_STANDBY

§ PowerLPF3_DISALLOW_IDLE

§ PowerLPF3_NEED_FLASH_IN_IDLE

§ PowerLPF3_ENTERING_STANDBY

§ PowerLPF3_ENTERING_SHUTDOWN

§ PowerLPF3_AWAKE_STANDBY

§ PowerLPF3_HFXT_AVAILABLE

§ PowerLPF3_LFCLK_SWITCHED

§ Power_getPerformanceLevel

§ Power_setPerformanceLevel

Enumeration Type Documentation

§ PowerLPF3_ResetReason

Function Documentation

§ PowerCC23X0_doWFI()

§ PowerLPF3_getResetReason()

§ PowerLPF3_releaseLatches()

§ PowerCC23X0_standbyPolicy()

§ PowerLPF3_selectLFOSC()

§ PowerLPF3_selectLFXT()

§ PowerCC23X0_schedulerDisable()

§ PowerCC23X0_schedulerRestore()