SYS0

Instance: SYS0
Component: SYS0
Base address: 0x40004000


This is top module of SYS0 for LOKI

TOP:SYS0 Register Summary

Register Name

Type

Register Width (Bits)

Register Reset

Address Offset

Physical Address

DESC

RO

32

0x6B4E 0010

0x0000 0000

0x4000 4000

ATESTCFG

RW

32

0x0000 000F

0x0000 0100

0x4000 4100

TSENSCFG

RW

32

0x0000 0000

0x0000 0108

0x4000 4108

LPCMPCFG

RW

32

0x0000 0000

0x0000 010C

0x4000 410C

DEVICEID

RO

32

0x0BB8 402F

0x0000 03FC

0x4000 43FC

PARTID

RW

32

0x0000 0000

0x0000 07F8

0x4000 47F8

TOP:SYS0 Register Descriptions

TOP:SYS0:DESC

Address Offset 0x0000 0000
Physical Address 0x4000 4000 Instance 0x4000 4000
Description Description Register. This register provides IP module ID, revision information, instance index and standard MMR registers offset.
Type RO
Bits Field Name Description Type Reset
31:16 MODID Module identifier used to uniquely identify this IP. RO 0x6B4E
15:12 STDIPOFF Standard IP MMR block offset. Standard IP MMRs are the set of from aggregated IRQ registers till DTB.

0: Standard IP MMRs do not exist

0x1-0xF: Standard IP MMRs begin at offset of (64*STDIPOFF from the base IP address)		 RO 0x0
11:8 INSTIDX IP Instance ID number. If multiple instances of IP exist in the device, this field can identify the instance number (0-15). RO 0x0
7:4 MAJREV Major revision of IP (0-15). RO 0x1
3:0 MINREV Minor revision of IP (0-15). RO 0x0

TOP:SYS0:ATESTCFG

Address Offset 0x0000 0100
Physical Address 0x4000 4100 Instance 0x4000 4100
Description This register is used to configure analog switches in ATEST module
Type RW
Bits Field Name Description Type Reset
31:24 KEY Key must be written with value 0x5A for successful write to ATESTCFG and to unlock register state.
Write with any value other than 0x5A to KEY will be ignored and register content is not updated.
It is recommended to write this register with incorrect KEY to lock back register state after necessary ATESTCFG updates are done.
Read value of KEY is 0x0.		 WO 0x00
23:9 RESERVED9 Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior. RO 0b000 0000 0000 0000
8 VSEL Selects supply for ATEST switches.
Value ENUM Name Description
0x0 VDDBST Selects VDDBOOST
0x1 VDDA Selects VDDA
RW 0
7 VA2VA1 Enables isolation switch between VA_ATEST_A1 and VA_PAD_A1.
Value ENUM Name Description
0x0 OPEN Switch is open
0x1 CLOSE Switch is closed
RW 0
6 VA2VA0 Enables isolation switch between VA_ATEST_A0 and VA_PAD_A0.
Value ENUM Name Description
0x0 OPEN Switch is open
0x1 CLOSE Switch is closed
RW 0
5 VR2VA1 Enables isolation switch between VR_ATEST_A1 and VA_ATEST_A1.
Value ENUM Name Description
0x0 OPEN Switch is open
0x1 CLOSE Switch is closed
RW 0
4 VR2VA0 Enables isolation switch between VR_ATEST_A0 and VA_ATEST_A0.
Value ENUM Name Description
0x0 OPEN Switch is open
0x1 CLOSE Switch is closed
RW 0
3 SHTVA1 Shorts VA_ATEST_A1 to ground.
Value ENUM Name Description
0x0 OPEN Switch is open
0x1 CLOSE Switch is closed
RW 1
2 SHTVA0 Shorts VA_ATEST_A0 to ground.
Value ENUM Name Description
0x0 OPEN Switch is open
0x1 CLOSE Switch is closed
RW 1
1 SHTVR1 Shorts VR_ATEST_A1 to ground.
Value ENUM Name Description
0x0 OPEN Switch is open
0x1 CLOSE Switch is closed
RW 1
0 SHTVR0 Shorts VR_ATEST_A0 to ground.
Value ENUM Name Description
0x0 OPEN Switch is open
0x1 CLOSE Switch is closed
RW 1

TOP:SYS0:TSENSCFG

Address Offset 0x0000 0108
Physical Address 0x4000 4108 Instance 0x4000 4108
Description This register is used to configure temperature sensor module.
Type RW
Bits Field Name Description Type Reset
31:12 RESERVED12 Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior RO 0x0 0000
11:8 SPARE Spare bits RW 0x0
7:2 RESERVED2 Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior. RO 0b00 0000
1:0 SEL Used to enable and configure temperature sensor module. Setting the value to 0x3 will disable the temperature sensor.
Value ENUM Name Description
0x0 DISABLE Temperature sensor is disabled
0x1 VALUE 20uA current is injected on VR_ATEST_A0 and voltage measured on VR_ATEST_A1
0x2 GND 20uA current is injected on VR_ATEST_A0 and ground measured on VR_ATEST_A1
RW 0b00

TOP:SYS0:LPCMPCFG

Address Offset 0x0000 010C
Physical Address 0x4000 410C Instance 0x4000 410C
Description This register is used to configure and check the status of low-power comparator (LPCOMP) module.
Type RW
Bits Field Name Description Type Reset
31 RESERVED31 Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior RO 0
30 HYSPOL Spare bit for LPCOMP RW 0
29:28 ATESTMUX Used to configure ATEST mux in comparator module and provides chosen output on VA_ATEST_A0.
Note: This bit field is write-protected using global lock indicator on production device.
Value ENUM Name Description
0x0 OFF ATEST mux is off
0x1 COMPOUT Selects comparator output
0x2 COMP_VIN_NEG Selects voltage divider output
0x3 IBIASOUT Selects bias current output
RW 0b00
27:25 RESERVED25 Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior. RO 0b000
24 EVTIFG Event flag. The event flag is set when the comparator output transition is qualified based on the edge polarity configuration in EDGCFG.
Value ENUM Name Description
0x0 CLR Clear
0x1 SET Set
RW 0
23:22 RESERVED22 Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior. RO 0b00
21 COUTEN Enables LPCOMP output on device pin.
Value ENUM Name Description
0x0 DIS Disabled
0x1 EN Enabled
RW 0
20 COUT LPCOMP output status. This bit captures the value LPCOMP raw output.
Value ENUM Name Description
0x0 LOW Output is low
0x1 HIGH Output is high
RO 0
19 RESERVED19 Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior. RO 0
18 WUENSB Enables lpcmpcfg output to wake device from standby.
Value ENUM Name Description
0x0 DIS Disable
0x1 EN Enable
RW 0
17 EVTEN Enables event generation. Comparator module will produce event on ULL event fabric when EVTIFG is set.
Value ENUM Name Description
0x0 DIS Disable
0x1 EN Enable
RW 0
16 EDGCFG Selects positive edge or negative edge detection on comparator output to set the event flag
Value ENUM Name Description
0x0 RISE Rise edge detection
0x1 FALL Fall edge detection
RW 0
15 RESERVED15 Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior. RO 0
14:12 NSEL Negative input selection. Setting values 0x5-0x7 will open all the switches.
Value ENUM Name Description
0x0 OPEN All switches are open
0x1 VA_PAD_A2 Selects VA_PAD_A2
0x2 VA_PAD_A3 Selects VA_PAD_A3
0x3 VDDA Selects VDDA
0x4 VDDD Selects VDDD
RW 0b000
11:8 PSEL Positive input selection. Setting values 0x9-0xF will open all the switches.
Value ENUM Name Description
0x0 OPEN All switches are open
0x1 VA_PAD_A1 Selects VA_PAD_A1
0x2 VA_PAD_A2 Selects VA_PAD_A2
0x3 VA_PAD_A3 Selects VA_PAD_A3
0x4 VR_ATEST_A0 Selects VR_ATEST_A0
0x5 VR_ATEST_A1 Selects VR_ATEST_A1
0x6 VA_ATEST_A0 Selects VA_ATEST_A0
0x7 VA_ATEST_A1 Selects VA_ATEST_A1
0x8 VDDA Selects VDDA
RW 0x0
7:5 HYSSEL Used to enable and select hysteresis level.
Value ENUM Name Description
0x0 VAL0 Hysteresis is disabled
0x1 VAL1 Hysteresis value: TBD
0x2 VAL2 Hysteresis value: TBD
0x3 VAL3 Hysteresis value: TBD
0x4 VAL4 Hysteresis value: TBD
0x5 VAL5 Hysteresis value: TBD
0x6 VAL6 Hysteresis value: TBD
0x7 VAL7 Hysteresis value: TBD
RW 0b000
4 DIVPATH Used to select the path on which voltage divider is applied
Value ENUM Name Description
0x0 NSIDE Divider is applied on N-side
0x1 PSIDE Divider is applied on P-side
RW 0
3:1 DIV Used to configure reference divider. Setting values 0x5-0x7 will set the divide value to 1.
Value ENUM Name Description
0x0 VAL0 Divide value is 1
0x1 VAL1 Divide value is 3/4
0x2 VAL2 Divide value is 1/2
0x3 VAL3 Divide value is 1/3
0x4 VAL4 Divide value is 1/4
RW 0b000
0 EN Used to enable comparator module.
Value ENUM Name Description
0x0 DIS Disable
0x1 EN Enable
RW 0

TOP:SYS0:DEVICEID

Address Offset 0x0000 03FC
Physical Address 0x4000 43FC Instance 0x4000 43FC
Description This register provides Device ID information.
Note: This 32-bit register value is provided as output to DEBUGSS.
Type RO
Bits Field Name Description Type Reset
31:28 VERSION Monotonic increasing value indicating new hardware revision. A newer hardware revision shall never have a lower version than an older revision of hardware. RO 0x0
27:12 DEVICE Value generated by RAMP for the SOC. This value uniquely identifies the die from any other TI device. RO 0xBB84
11:1 MANFACTURER JEP 106 assigned manufacturer ID. This field identifies the device as a Texas Instruments device. RO 0b000 0001 0111
0 ALWAYSONE Value 1 in this bit field means that a 32-bit scan register exists. RO 1

TOP:SYS0:PARTID

Address Offset 0x0000 07F8
Physical Address 0x4000 47F8 Instance 0x4000 47F8
Description This register is programmed by boot code with Part ID information.Note: This 32-bit register value is provided as output to DEBUGSS
Type RW
Bits Field Name Description Type Reset
31 START Start bit
Value ENUM Name Description
0x0 CLR Clear
0x1 SET Set
RW 0
30:28 MAJORREV Monotonic increasing value indicating a new revision of the SKU significant enough that users of the device may have to revise PCB or or software design RW 0b000
27:24 MINORREV Monotonic increasing value indicating a new revision of the SKU that preserves compatibility with lesser MINORREV values RW 0x0
23:16 VARIANT Bit pattern uniquely identifying a part RW 0x00
15:0 PART Bit pattern uniquely identifying a part RW 0x0000


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