CC26xx Driver Library
RF Core

Data Structures

struct  rfTrim_t
 

Functions

static void RFCClockEnable (void)
 Enable the RF core clocks. More...
 
static void RFCClockDisable (void)
 Disable the RF core clocks. More...
 
static void RFCCpeIntClear (uint32_t ui32Mask)
 Clear HW interrupt flags. More...
 
static void RFCHwIntClear (uint32_t ui32Mask)
 Clear CPE interrupt flags. More...
 
static void RFCCpe0IntSelect (uint32_t ui32Mask)
 Select interrupt sources to CPE0 (assign to INT_RFC_CPE_0 interrupt vector). More...
 
static void RFCCpe1IntSelect (uint32_t ui32Mask)
 Select interrupt sources to CPE1 (assign to INT_RFC_CPE_1 interrupt vector). More...
 
static void RFCCpeIntEnable (uint32_t ui32Mask)
 Enable CPEx interrupt sources. More...
 
static void RFCCpe0IntSelectClearEnable (uint32_t ui32Mask)
 Select, clear, and enable interrupt sources to CPE0. More...
 
static void RFCCpe1IntSelectClearEnable (uint32_t ui32Mask)
 Select, clear, and enable interrupt sources to CPE1. More...
 
static void RFCHwIntEnable (uint32_t ui32Mask)
 Enable HW interrupt sources. More...
 
static void RFCCpeIntDisable (uint32_t ui32Mask)
 Disable CPE interrupt sources. More...
 
static void RFCHwIntDisable (uint32_t ui32Mask)
 Disable HW interrupt sources. More...
 
uint32_t RFCCpeIntGetAndClear (uint32_t ui32Mask)
 Get and clear CPE interrupt flags. More...
 
static void RFCAckIntClear (void)
 Clear ACK interrupt flag. More...
 
uint32_t RFCDoorbellSendTo (uint32_t pOp)
 Send a radio operation to the doorbell and wait for an acknowledgment. More...
 
void RFCSynthPowerDown (void)
 This function implements a fast way to turn off the synthesizer. More...
 
void RFCCpePatchReset (void)
 Reset previously patched CPE RAM to a state where it can be patched again. More...
 
uint8_t RFCOverrideSearch (const uint32_t *pOverride, const uint32_t pattern, const uint32_t mask, const uint8_t searchDepth)
 
uint8_t RFCOverrideUpdate (rfc_radioOp_t *pOpSetup, uint32_t *pParams)
 Function to update override list. More...
 
uint32_t RFCHwIntGetAndClear (uint32_t ui32Mask)
 Get and clear HW interrupt flags. More...
 
static bool RFCGetPaType (void)
 Get the type of currently selected PA. More...
 
static uint32_t RFCGetPaGain (void)
 Get the gain of currently selected PA. More...
 
uint32_t RFCAnaDivTxOverride (uint8_t loDivider, uint8_t frontEndMode)
 Function to calculate the proper override run-time for the High Gain PA. More...
 

Detailed Description

Function Documentation

static void RFCAckIntClear ( void  )
inlinestatic

Clear ACK interrupt flag.

Referenced by RFCDoorbellSendTo().

322 {
323  // Clear any pending interrupts.
324  HWREG(RFC_DBELL_BASE + RFC_DBELL_O_RFACKIFG) = 0x0;
325 }
uint32_t RFCAnaDivTxOverride ( uint8_t  loDivider,
uint8_t  frontEndMode 
)

Function to calculate the proper override run-time for the High Gain PA.

186 {
187  uint16_t fsOnly;
188  uint16_t txSetting;
189 
190  switch (loDivider)
191  {
192  case 0: fsOnly = 0x0502;
193  break;
194  case 2:
195  fsOnly = 0x0102;
196  break;
197  case 4:
198  case 6:
199  case 12:
200  fsOnly = 0xF101;
201  break;
202  case 5:
203  case 10:
204  case 15:
205  case 30:
206  fsOnly = 0x1101;
207  break;
208  default:
209  // Error, should not occur!
210  fsOnly = 0;
211  break;
212  }
213 
214  if (frontEndMode == 255)
215  {
216  // Special value meaning 20 dBm PA
217  txSetting = (fsOnly | 0x00C0) & ~0x0400;
218  }
219  else if (frontEndMode == 0)
220  {
221  // Differential
222  txSetting = fsOnly | 0x0030;
223  }
224  else if (frontEndMode & 1)
225  {
226  // Single ended on RFP
227  txSetting = fsOnly | 0x0010;
228  }
229  else
230  {
231  // Single ended on RFN
232  txSetting = fsOnly | 0x0020;
233  }
234 
235  return ((((uint32_t) txSetting) << 16) | RFC_FE_OVERRIDE_ADDRESS);
236 }
#define RFC_FE_OVERRIDE_ADDRESS
Definition: rfc.h:88
static void RFCClockDisable ( void  )
inlinestatic

Disable the RF core clocks.

As soon as the RF core is started it will handle clock control autonomously. No check should be performed to check the clocks. Instead the radio can be ping'ed through the command interface.

When disabling clocks it is the programmers responsibility that the RF core clocks are safely gated. I.e. the RF core should be safely 'parked'.

Returns
None
159 {
160  // Disable all clocks
161  HWREG(RFC_PWR_NONBUF_BASE + RFC_PWR_O_PWMCLKEN) = 0x0;
162 }
static void RFCClockEnable ( void  )
inlinestatic

Enable the RF core clocks.

As soon as the RF core is started it will handle clock control autonomously. No check should be performed to check the clocks. Instead the radio can be ping'ed through the command interface.

Returns
None
134 {
135  // Enable basic clocks to get the CPE run
136  HWREG(RFC_PWR_NONBUF_BASE + RFC_PWR_O_PWMCLKEN) = RFC_PWR_PWMCLKEN_CPERAM
139 }
static void RFCCpe0IntSelect ( uint32_t  ui32Mask)
inlinestatic

Select interrupt sources to CPE0 (assign to INT_RFC_CPE_0 interrupt vector).

Referenced by RFCCpe0IntSelectClearEnable().

198 {
199  // Multiplex RF Core interrupts to CPE0 IRQ.
200  HWREG(RFC_DBELL_BASE + RFC_DBELL_O_RFCPEISL) &= ~ui32Mask;
201 }
static void RFCCpe0IntSelectClearEnable ( uint32_t  ui32Mask)
inlinestatic

Select, clear, and enable interrupt sources to CPE0.

237 {
238  // Multiplex RF Core interrupts to CPE0 IRQ.
239  RFCCpe0IntSelect(ui32Mask);
240 
241  // Clear the masked interrupts.
242  RFCCpeIntClear(ui32Mask);
243 
244  // Enable the masked interrupts.
245  RFCCpeIntEnable(ui32Mask);
246 }
static void RFCCpeIntClear(uint32_t ui32Mask)
Clear HW interrupt flags.
Definition: rfc.h:171
static void RFCCpeIntEnable(uint32_t ui32Mask)
Enable CPEx interrupt sources.
Definition: rfc.h:223
static void RFCCpe0IntSelect(uint32_t ui32Mask)
Select interrupt sources to CPE0 (assign to INT_RFC_CPE_0 interrupt vector).
Definition: rfc.h:197

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static void RFCCpe1IntSelect ( uint32_t  ui32Mask)
inlinestatic

Select interrupt sources to CPE1 (assign to INT_RFC_CPE_1 interrupt vector).

Referenced by RFCCpe1IntSelectClearEnable().

211 {
212  // Multiplex RF Core interrupts to CPE1 IRQ.
213  HWREG(RFC_DBELL_BASE + RFC_DBELL_O_RFCPEISL) |= ui32Mask;
214 }
static void RFCCpe1IntSelectClearEnable ( uint32_t  ui32Mask)
inlinestatic

Select, clear, and enable interrupt sources to CPE1.

256 {
257  // Multiplex RF Core interrupts to CPE1 IRQ.
258  RFCCpe1IntSelect(ui32Mask);
259 
260  // Clear the masked interrupts.
261  RFCCpeIntClear(ui32Mask);
262 
263  // Enable the masked interrupts.
264  RFCCpeIntEnable(ui32Mask);
265 }
static void RFCCpe1IntSelect(uint32_t ui32Mask)
Select interrupt sources to CPE1 (assign to INT_RFC_CPE_1 interrupt vector).
Definition: rfc.h:210
static void RFCCpeIntClear(uint32_t ui32Mask)
Clear HW interrupt flags.
Definition: rfc.h:171
static void RFCCpeIntEnable(uint32_t ui32Mask)
Enable CPEx interrupt sources.
Definition: rfc.h:223

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static void RFCCpeIntClear ( uint32_t  ui32Mask)
inlinestatic

Clear HW interrupt flags.

Referenced by RFCCpe0IntSelectClearEnable(), RFCCpe1IntSelectClearEnable(), and RFCCpeIntGetAndClear().

172 {
173  // Clear the masked pending interrupts.
174  HWREG(RFC_DBELL_BASE + RFC_DBELL_O_RFCPEIFG) = ~ui32Mask;
175 }
static void RFCCpeIntDisable ( uint32_t  ui32Mask)
inlinestatic

Disable CPE interrupt sources.

288 {
289  // Disable the masked interrupts
290  HWREG(RFC_DBELL_BASE + RFC_DBELL_O_RFCPEIEN) &= ~ui32Mask;
291 }
static void RFCCpeIntEnable ( uint32_t  ui32Mask)
inlinestatic

Enable CPEx interrupt sources.

Referenced by RFCCpe0IntSelectClearEnable(), and RFCCpe1IntSelectClearEnable().

224 {
225  // Enable CPE interrupts from RF Core.
226  HWREG(RFC_DBELL_BASE + RFC_DBELL_O_RFCPEIEN) |= ui32Mask;
227 }
uint32_t RFCCpeIntGetAndClear ( uint32_t  ui32Mask)

Get and clear CPE interrupt flags.

76 {
77  // Read the CPE interrupt flags which match the provided bitmask
78  uint32_t ui32Ifg = HWREG(RFC_DBELL_BASE + RFC_DBELL_O_RFCPEIFG) & ui32Mask;
79 
80  // Clear the interrupt flags
81  RFCCpeIntClear(ui32Ifg);
82 
83  // Return with the interrupt flags
84  return (ui32Ifg);
85 }
static void RFCCpeIntClear(uint32_t ui32Mask)
Clear HW interrupt flags.
Definition: rfc.h:171

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void RFCCpePatchReset ( void  )

Reset previously patched CPE RAM to a state where it can be patched again.

150 {
151  // Function is not complete
152 }
uint32_t RFCDoorbellSendTo ( uint32_t  pOp)

Send a radio operation to the doorbell and wait for an acknowledgment.

95 {
96  // Wait until the doorbell becomes available
97  while(HWREG(RFC_DBELL_BASE + RFC_DBELL_O_CMDR) != 0);
99 
100  // Submit the command to the CM0 through the doorbell
101  HWREG(RFC_DBELL_BASE + RFC_DBELL_O_CMDR) = pOp;
102 
103  // Wait until the CM0 starts to parse the command
104  while(!HWREG(RFC_DBELL_BASE + RFC_DBELL_O_RFACKIFG));
105  RFCAckIntClear();
106 
107  // Return with the content of status register
108  return(HWREG(RFC_DBELL_BASE + RFC_DBELL_O_CMDSTA));
109 }
static void RFCAckIntClear(void)
Clear ACK interrupt flag.
Definition: rfc.h:321

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static uint32_t RFCGetPaGain ( void  )
inlinestatic

Get the gain of currently selected PA.

394 {
395  return (HWREG(RFC_PA_GAIN_ADDRESS) & RFC_PA_GAIN_MASK);
396 }
#define RFC_PA_GAIN_ADDRESS
Definition: rfc.h:85
#define RFC_PA_GAIN_MASK
Definition: rfc.h:86
static bool RFCGetPaType ( void  )
inlinestatic

Get the type of currently selected PA.

383 {
384  return (bool)(HWREGB(RFC_PA_TYPE_ADDRESS) & RFC_PA_TYPE_MASK);
385 }
#define RFC_PA_TYPE_ADDRESS
Definition: rfc.h:83
#define RFC_PA_TYPE_MASK
Definition: rfc.h:84
static void RFCHwIntClear ( uint32_t  ui32Mask)
inlinestatic

Clear CPE interrupt flags.

Referenced by RFCHwIntGetAndClear().

185 {
186  // Clear the masked pending interrupts.
187  HWREG(RFC_DBELL_BASE + RFC_DBELL_O_RFHWIFG) = ~ui32Mask;
188 }
static void RFCHwIntDisable ( uint32_t  ui32Mask)
inlinestatic

Disable HW interrupt sources.

301 {
302  // Disable the masked interrupts
303  HWREG(RFC_DBELL_BASE + RFC_DBELL_O_RFHWIEN) &= ~ui32Mask;
304 }
static void RFCHwIntEnable ( uint32_t  ui32Mask)
inlinestatic

Enable HW interrupt sources.

275 {
276  // Enable the masked interrupts
277  HWREG(RFC_DBELL_BASE + RFC_DBELL_O_RFHWIEN) |= ui32Mask;
278 }
uint32_t RFCHwIntGetAndClear ( uint32_t  ui32Mask)

Get and clear HW interrupt flags.

258 {
259  // Read the CPE interrupt flags which match the provided bitmask
260  uint32_t ui32Ifg = HWREG(RFC_DBELL_BASE + RFC_DBELL_O_RFHWIFG) & ui32Mask;
261 
262  // Clear the interupt flags
263  RFCHwIntClear(ui32Ifg);
264 
265  // Return with the interrupt flags
266  return (ui32Ifg);
267 }
static void RFCHwIntClear(uint32_t ui32Mask)
Clear CPE interrupt flags.
Definition: rfc.h:184

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uint8_t RFCOverrideSearch ( const uint32_t *  pOverride,
const uint32_t  pattern,
const uint32_t  mask,
const uint8_t  searchDepth 
)
162 {
163  // Search from start of the override list, to look for first override entry that matches search pattern
164  uint8_t override_index;
165  for(override_index = 0; (override_index < searchDepth) && (pOverride[override_index] != END_OVERRIDE); override_index++)
166  {
167  // Compare the value to the given pattern
168  if((pOverride[override_index] & mask) == pattern)
169  {
170  // Return with the index of override in case of match
171  return override_index;
172  }
173  }
174 
175  // Return with an invalid index
176  return 0xFF;
177 }
#define END_OVERRIDE
End of string for override register.
Definition: rf_mailbox.h:335
uint8_t RFCOverrideUpdate ( rfc_radioOp_t pOpSetup,
uint32_t *  pParams 
)

Function to update override list.

245 {
246  // Function is left blank for compatibility reasons.
247  return 0;
248 }
void RFCSynthPowerDown ( void  )

This function implements a fast way to turn off the synthesizer.

119 {
120  // Definition of reserved words
121  const uint32_t RFC_RESERVED0 = 0x40046054;
122  const uint32_t RFC_RESERVED1 = 0x40046060;
123  const uint32_t RFC_RESERVED2 = 0x40046058;
124  const uint32_t RFC_RESERVED3 = 0x40044100;
125 
126  // Disable CPE clock, enable FSCA clock.
127  HWREG(RFC_PWR_NONBUF_BASE + RFC_PWR_O_PWMCLKEN) = (HWREG(RFC_PWR_NONBUF_BASE + RFC_PWR_O_PWMCLKEN)
129 
130  HWREG(RFC_RESERVED0) = 3;
131  HWREG(RFC_RESERVED1) = 0x1030;
132  HWREG(RFC_RESERVED2) = 1;
133  HWREG(RFC_RESERVED1) = 0x50;
134  HWREG(RFC_RESERVED2) = 1;
135  HWREG(RFC_RESERVED1) = 0x650;
136  HWREG(RFC_RESERVED2) = 1;
137  HWREG(RFC_RESERVED1) = 0x10C0;
138  HWREG(RFC_RESERVED2) = 1;
139  HWREG(RFC_RESERVED3) = 1;
140 }

Macro Definition Documentation

#define RFC_FE_MODE_ESCAPE_VALUE   0xFF
#define RFC_FE_OVERRIDE_ADDRESS   0x0703

Referenced by RFCAnaDivTxOverride().

#define RFC_FE_OVERRIDE_MASK   0x0000FFFF
#define RFC_MAX_SEARCH_DEPTH   5
#define RFC_PA_GAIN_ADDRESS   0x2100034C

Referenced by RFCGetPaGain().

#define RFC_PA_GAIN_MASK   0x003FFFFF

Referenced by RFCGetPaGain().

#define RFC_PA_TYPE_ADDRESS   0x21000345

Referenced by RFCGetPaType().

#define RFC_PA_TYPE_MASK   0x04

Referenced by RFCGetPaType().