Terms and Definitions

General Terms and Acronyms

CCFG
Customer Configuration
Customer Configuration Area

Customer Configuration is set by the application and contains configuration parameters for the ROM boot code, device hardware, and device firmware. It contains lock-bits on the last page of flash. You can read more in the Customer Configuration section in the CC13x2 CC26x2 SimpleLink Wireless MCU Technical Reference Manual.

CCS
Code Composer Studio

An integrated development environment to develop applications for Texas Instruments embedded processors. Download: Code Composer Studio

cJTAG
compact JTAG

Class 4 IEEE 1149.7: Standard for Reduced-pin and Enhanced-functionality Test Access Port and Boundary-scan Architecture. This is known by acronym cJTAG.

GCC
GNU Compiler Collection

A compiler system produced by the GNU Project, which support various programming languages such as C and C++.

GPRAM
General purpose RAM

This memory area is used for the cache per default, but can be configured to be used as RAM.

IAR

Refers to IAR Systems’ IAR Embedded Workbench, which is an integrated development environment used for building and debugging embedded applications.

JTAG
Joint Test Action Group

IEEE standard 1149.1: Standard Test Access Port and Boundary Scan Architecture Test Access Port (TAP). This standard is known by the acronym JTAG.

MCU
Microcontroller Unit

A small computer on a single integrated circuit.

NVS
Non-Volatile Storage

Storage of data in non-volatile memory (NVM). NVM retains saved data during power cycles. In the context of CC13xx and CC26xx devices, NVM either refers to the internal flash or some external flash.

ROM
Read-only Memory

Type of non-volatile memory used in computers. Once data is written to ROM, the data cannot be removed and can only be read.

RTSC
Real Time Software Components

A toolset for creating reusable code, used by TI-RTOS. See RTSC and RTSC-Pedia.

SysConfig
System Configuration Tool

SysConfig is a graphical interface for configuring software projects. Configuration files, C source files and header files are generated based on the parameters configured in the SysConfig dashboard. See Get started with SysConfig.

TI-CLANG
TI Arm Clang Compiler Toolchain

The TI Arm Clang Compiler Toolchain (tiarmclang) is the next generation TI Arm compiler, replacing the previous TI Arm Compiler Tools (armcl). You can use the tiarmclang compiler toolchain to build applications from C, C++, and/or assembly source files to be loaded and run on one of the Cortex-M or Cortex-R Arm processors that are supported by the toolchain. You can find more information here.

VIMS
Versatile Instruction Memory System

A system control module that handles access to the device memory areas from the CPU and system bus. You can read more in the CC13x2 CC26x2 SimpleLink Wireless MCU Technical Reference Manual.

.bss

Block started by symbol. This memory section usually contains uninitialized variables including the task stacks.

Thread Terms and Acronyms

CCA
Clear Channel Assessment

Used to determine wheter an RF medium is idle or busy. A combination of carrier sensing and energy detection is used to draw a conclusion.

CoAP
Constrained Application Protocol

A specialized web transfer protocol for use with constrained nodes and constrained networks, which provides a request/response interaction model between application endpoints. Defined by RFC7252.

DHCPv6
Dynamic Host Configuration Protocol for IPv6

Networking protocol for configuring IPv6 nodes with IPv6 addresses. Defined by RFC3315.

FCC
Federal Communications Commission

A U.S. regulatory body for regulating interstate communications by radio, television, wire, satelitte, and cable.

FED
Full Thread Device

An FTD acting as an End Device. Cannot be promoted to a Router.

FFD
Full Functionality Device

A device in a PAN which implements the general communication model, and can therefore operate at all levels of functionality.

FTD
Full Thread Device

A Thread device which contains the full implementation of a Thread stack.

ICMPv6
Internet Control Message Protocol for IPv6

Error-reporting support protocol in the IP suite, used for diagnostics or for generating error messages to the source IP address when network problems occur. Defined by RFC4443.

IEEE
Institute of Electrical and Electronics Engineers

An organization composed of engineers, scientists, and students. Develops standards for the computer and electronics industry.

MED
Minimal End Device

An MTD acting as an End Device. The receiver is on when idle.

ML-EID
Mesh-Local Endpoint Identifier

An Endpoint Identifier that is unique to a Thread device in a Thread network, regardless of network topology.

MTD
Minimal Thread Device

A Thread device which contains a subset implementation of a Thread stack.

NCP
Network Co-Processor

An architectural design where the application layer runs on a host processor and Thread features on the SoC. Communication between the host and SoC is via some serial connection.

PAN
Personal Area Network

A network of techology devices focues around the area of an individual person.

PER
Packet Error Rate

Represents the ratio between number of incorrectly received data packets and total number of transmitted data packets, often achieved by sending sequenced data packets.

PIB
PAN Information Bases

Object of data related to describe or maintain IEEE 802.15.4 PHY or MAC.

REED
Router-Eligible End Device

An FTD which is not actively participating as a Router, but can be promoted to a Router.

RLOC
Routing Locator

An RLOC is an IPv6 unicast address which identifies the location of a device in a Thread network. It is used for efficiently routing a message across the network, and changes to accommodate network topology changes. The lower 16 bits of the RLOC, RLOC16, is used as the device’s 802.15.4 short address.

RFD
Reduced Functionality Device

A device in a PAN which implements a reduced communication model, and can therefore operate at redcued levels of functionality.

Router

An FTD which is actively participating in routing of the Thread network.

SED
Sleepy End Device

An MTD acting as an End Device. The receiver is off when idle.

SLAAC
Stateless Address Autoconfiguration

A mechanism for devices in an IPv6 network to autoconfigure its IPv6 interfaces. Defined by RFC4862.

SoC
System-on-Chip

A single-chip solution that integrates all components of an electronic system. In the context of Thread, a system which combines an IEEE 802.15.4 radio and a processor.

UDP
User Datagram Protocol

Transport layer protocol used for low-latency and lossy connections between application programs in IP networks. Defined by RFC768.

ULA
Unique Local Address

An IPv6 address that is guaranteed to be unique for a device in a specified scope. For example, an ML-EID is a ULA for the mesh-local scope.

URI
Uniform Resource Identifier

A string of characters used to unambiguously identify an abstract or physical resource. Defined by RFC3986.

TI-RTOS7 Terms and Acronyms

HWI
Hardware Interrupts

A TI-RTOS7 hardware interrupt.

Idle Task

A TI-RTOS7 default task that is executes when no other higher priority thread needs to run.

ROV
Runtime Object View

A TI-RTOS7 kernel plugin for CCS and IAR to view a target’s instrumentation data.

RTC
Real-Time Clock

An accurate computer clock which keeps track of the current time.

RTOS
Real Time Operating System

An operating system intended to serve applications with real-time requirements.

SWI
Software Interrupts

A TI-RTOS7 software interrupt.

TI-RTOS7
Texas Instruments Real Time Operating System

An RTOS developed by TI for TI microcontrollers.

Zero-Latency Interrupts

An interrupt that will not be routed through the TI-RTOS kernel’s Hwi dispatcher. For more information, see the Hwi module documentation in the TI-RTOS7 Kernel (SYS/BIOS) User’s Guide.

Over-the-Air Download (OAD) Terms and Acronyms

BIM
Boot Image Manager

A bootloader that runs after the device’s ROM startup code. The BIM is responsible for analyzing the image header of all images and determining the most suitable image to run. Once the BIM has found the proper image, it will jump to it’s program entry.

CRC
Cyclic Redundancy Check

An error-detecting code used to check the integrity of blocks of data.

ECDSA
Elliptic Curve Digital Signature Algorithm

A variant of the Digital Signature Algorithm (DSA) which uses elliptic curve cryptography.

Factory Image

The factory image is a “golden” image that resides in external flash as a fail-safe mechanism.

HIB
Halt In Boot

A mechanism in CC13xx or CC26xx to ensure that the external emulator can take control of the device before it executes any application code.

OAD
Over-the-Air Download

The process of performing a device firmware update over the air.

OAD Target

The device whose firmware is being upgraded over the air. This is assumed to be a CC26xx or CC13xx device running the TI protocol-specific transport for OAD.

OAD Distributor

The device responsible for accepting an OAD enabled image from the compiler and transferring it over the air to the OAD Target.

Sensor Controller Terms and Acronyms

SC
Sensor Controller

A dedicated 16-bit CPU core on CC13xx and CC26xx devices, located in the auxiliary (AUX) power/clock domain. It can perform simple background tasks autonomously and independently of the System CPU and the MCU domain power states.

SCS
Sensor Controller Studio

A stand-alone IDE used to write, test and debug code for the Sensor Controller.