[spi.h] Serial Peripheral Interface

Functions
void	SPIConfigSetExpClk (uint32_t ui32Base, uint32_t ui32SPIClk, uint32_t ui32Protocol, uint32_t ui32Mode, uint32_t ui32BitRate, uint32_t ui32DataWidth)
	Configures the serial peripheral port. More...
static void	SPIEnable (uint32_t ui32Base)
	Enables the serial peripheral port. More...
static void	SPIDisable (uint32_t ui32Base)
	Disables the serial peripheral port. More...
void	SPIDataPut (uint32_t ui32Base, uint32_t ui32Data)
	Puts a data element into the SPI transmit FIFO. More...
int32_t	SPIDataPutNonBlocking (uint32_t ui32Base, uint32_t ui32Data)
	Puts a data element into the SPI transmit FIFO. More...
void	SPIDataGet (uint32_t ui32Base, uint32_t *pui32Data)
	Gets a data element from the SPI receive FIFO. More...
int32_t	SPIDataGetNonBlocking (uint32_t ui32Base, uint32_t *pui32Data)
	Gets a data element from the SPI receive FIFO. More...
static bool	SPIBusy (uint32_t ui32Base)
	Determines whether the SPI transmitter is busy or not. More...
static uint32_t	SPIStatus (uint32_t ui32Base)
	Get the status of the SPI data buffers. More...
void	SPIIntRegister (uint32_t ui32Base, void(*pfnHandler)(void))
	Registers an interrupt handler for the Serial Peripheral Interface in the dynamic interrupt table. More...
void	SPIIntUnregister (uint32_t ui32Base)
	Unregisters an interrupt handler for the Serial Peripheral Interface in the dynamic interrupt table. More...
static void	SPIIntEnable (uint32_t ui32Base, uint32_t ui32IntFlags)
	Enables individual SPI interrupt sources. More...
static void	SPIIntDisable (uint32_t ui32Base, uint32_t ui32IntFlags)
	Disables individual SPI interrupt sources. More...
static void	SPIIntClear (uint32_t ui32Base, uint32_t ui32IntFlags)
	Clears SPI interrupt sources. More...
static uint32_t	SPIIntStatus (uint32_t ui32Base, bool bMasked)
	Gets the current interrupt status. More...
static void	SPIDMAEnable (uint32_t ui32Base, uint32_t ui32DMAFlags)
	Enable SPI DMA operation. More...
static void	SPIDMADisable (uint32_t ui32Base, uint32_t ui32DMAFlags)
	Disable SPI DMA operation. More...

Detailed Description

Function Documentation

SPIBusy()

static bool SPIBusy ( uint32_t  ui32Base )

inlinestatic

Determines whether the SPI transmitter is busy or not.

Allows the caller to determine whether all transmitted bytes have cleared the transmitter hardware. If false is returned, then the transmit FIFO is empty and all bits of the last transmitted word have left the hardware shift register.

Parameters

ui32Base

is the base address of the SPI port.

Returns

Returns status of the SPI transmit buffer.

• true : SPI is transmitting.
• false : SPI transmissions are complete.

{
    // Check the arguments
    ASSERT(SPIBaseValid(ui32Base));

    // Determine if the SPI is busy
    return ((HWREG(ui32Base + SPI_O_STAT) & SPI_STAT_BUSY) ? true : false);
}

SPIConfigSetExpClk()

void SPIConfigSetExpClk	(	uint32_t	ui32Base,
		uint32_t	ui32SPIClk,
		uint32_t	ui32Protocol,
		uint32_t	ui32Mode,
		uint32_t	ui32BitRate,
		uint32_t	ui32DataWidth
	)

Configures the serial peripheral port.

This function configures the serial peripheral port. It sets the SPI protocol, mode of operation, bit rate, and data width.

The ui32Protocol parameter defines the data frame format. The Motorola frame formats imply the following polarity and phase configurations:

Polarity Phase   Motorola Protocol                  Mode
  0       0           3-wire                SPI_FRF_MOTO_MODE_0
  0       1           3-wire                SPI_FRF_MOTO_MODE_1
  1       0           3-wire                SPI_FRF_MOTO_MODE_2
  1       1           3-wire                SPI_FRF_MOTO_MODE_3
  0       0           4-wire                SPI_FRF_MOTO_MODE_4
  0       1           4-wire                SPI_FRF_MOTO_MODE_5
  1       0           4-wire                SPI_FRF_MOTO_MODE_6
  1       1           4-wire                SPI_FRF_MOTO_MODE_7

The ui32Mode parameter defines the operating mode of the SPI module. The SPI module can operate as a controller or peripheral; if a peripheral, the SPI can be configured to disable output on its serial output line.

The ui32BitRate parameter defines the bit rate for the SPI.

The ui32DataWidth parameter defines the width of the data transfers, and can be a value between 4 and 32, for controller mode, and 7 to 32, in peripheral mode.

Note

The peripheral clock is not necessarily the same as the processor clock. The frequency of the peripheral clock is set by the system control.

Parameters

ui32Base	specifies the SPI module base address.
ui32SPIClk	is the rate of the clock supplied to the SPI module.
ui32Protocol	specifies the data transfer protocol. The parameter can be one of the following values: SPI_FRF_MOTO_MODE_0 SPI_FRF_MOTO_MODE_1 SPI_FRF_MOTO_MODE_2 SPI_FRF_MOTO_MODE_3 SPI_FRF_MOTO_MODE_4 SPI_FRF_MOTO_MODE_5 SPI_FRF_MOTO_MODE_6 SPI_FRF_MOTO_MODE_7 SPI_FRF_TI SPI_FRF_NMW.
ui32Mode	specifies the mode of operation. The parameter can be one of the following values: SPI_MODE_CONTROLLER SPI_MODE_PERIPHERAL SPI_MODE_PERIPHERAL_OD
ui32BitRate	specifies the clock rate.
ui32DataWidth	specifies number of bits transferred per frame. Must be a value between 4 and 32, for controller mode, and 7 to 32, in peripheral mode.

Returns

None

{

    uint32_t ui32RegVal;

    // Check the arguments
    ASSERT(SPIBaseValid(ui32Base));
    ASSERT((ui32Protocol == SPI_FRF_MOTO_MODE_0) ||
           (ui32Protocol == SPI_FRF_MOTO_MODE_1) ||
           (ui32Protocol == SPI_FRF_MOTO_MODE_2) ||
           (ui32Protocol == SPI_FRF_MOTO_MODE_3) ||
           (ui32Protocol == SPI_FRF_MOTO_MODE_4) ||
           (ui32Protocol == SPI_FRF_MOTO_MODE_5) ||
           (ui32Protocol == SPI_FRF_MOTO_MODE_6) ||
           (ui32Protocol == SPI_FRF_MOTO_MODE_7) ||
           (ui32Protocol == SPI_FRF_TI) ||
           (ui32Protocol == SPI_FRF_NMW));
    ASSERT((ui32Mode == SPI_MODE_CONTROLLER) ||
           (ui32Mode == SPI_MODE_PERIPHERAL) ||
           (ui32Mode == SPI_MODE_PERIPHERAL_OD));
    ASSERT(ui32BitRate > 0);
    ASSERT(((ui32Mode == SPI_MODE_CONTROLLER) && (ui32BitRate <= (ui32SPIClk / 2))) ||
           ((ui32Mode != SPI_MODE_CONTROLLER) && (ui32BitRate <= (ui32SPIClk / 12))));
    ASSERT((ui32SPIClk / ui32BitRate) <= (254 * 256));
    ASSERT((ui32DataWidth >= 4) && (ui32DataWidth <= 16));

    // Set operating mode
    ui32RegVal = (ui32Mode == SPI_MODE_PERIPHERAL_OD) ? SPI_CTL1_SOD_ENABLE : SPI_CTL1_SOD_DISABLE;
    ui32RegVal |= (ui32Mode == SPI_MODE_CONTROLLER) ? SPI_CTL1_MS_ENABLE : SPI_CTL1_MS_DISABLE;

    // Set data mode MSB first
    HWREG(ui32Base + SPI_O_CTL1) = ui32RegVal | SPI_CTL1_MSB_ENABLE;

    // Set Serial clock divider
    HWREG(ui32Base + SPI_O_CLKCTL) = (ui32SPIClk / (ui32BitRate << 1)) - 1;

    // Set clock ratio
    HWREG(ui32Base + SPI_O_CLKDIV2) = SPI_CLKDIV2_RATIO_DIV_BY_1;

    // Set protocol and data length
    ui32RegVal = ui32Protocol | (ui32DataWidth - 1);
    HWREG(ui32Base + SPI_O_CTL0) = ui32RegVal;
}

SPIDataGet()

void SPIDataGet	(	uint32_t	ui32Base,
		uint32_t *	pui32Data
	)

Gets a data element from the SPI receive FIFO.

This function gets received data from the receive FIFO of the specified SPI module and places that data into the location specified by the pui32Data parameter.

Note

Only the lower N bits of the value written to pui32Data contain valid data, where N is the data width as configured by SPIConfigSetExpClk(). For example, if the interface is configured for 8-bit data width, only the lower 8 bits of the value written to pui32Data contain valid data.

Parameters

ui32Base	specifies the SPI module base address.
pui32Data	is a pointer to a storage location for data that was received over the SPI interface.

Returns

None

Referenced by SPIDisable().

{
    // Check the arguments
    ASSERT(SPIBaseValid(ui32Base));

    // Wait until there is data to be read
    while((HWREG(ui32Base + SPI_O_STAT) & SPI_STAT_RFE_EMPTY))
    {
    }

    // Read data from SPI
    *pui32Data = HWREG(ui32Base + SPI_O_RXDATA);
}

SPIDataGetNonBlocking()

int32_t SPIDataGetNonBlocking	(	uint32_t	ui32Base,
		uint32_t *	pui32Data
	)

Gets a data element from the SPI receive FIFO.

This function gets received data from the receive FIFO of the specified SPI module and places that data into the location specified by the ui32Data parameter. If there is no data in the FIFO, then this function returns a zero.

Note

Only the lower N bits of the value written to pui32Data contain valid data, where N is the data width as configured by SPIConfigSetExpClk(). For example, if the interface is configured for 8-bit data width, only the lower 8 bits of the value written to pui32Data contain valid data.

Parameters

ui32Base	specifies the SPI module base address.
pui32Data	is a pointer to a storage location for data that was received over the SPI interface.

Returns

Returns the number of elements read from the SPI receive FIFO.

Referenced by SPIDisable().

{
    // Check the arguments
    ASSERT(SPIBaseValid(ui32Base));

    // Check for data to read
    if(!(HWREG(ui32Base + SPI_O_STAT) & SPI_STAT_RFE_EMPTY))
    {
        *pui32Data = HWREG(ui32Base + SPI_O_RXDATA);
        return (1);
    }
    else
    {
        return (0);
    }
}

SPIDataPut()

void SPIDataPut	(	uint32_t	ui32Base,
		uint32_t	ui32Data
	)

Puts a data element into the SPI transmit FIFO.

This function places the supplied data into the transmit FIFO of the specified SPI module.

Note

The upper 32 - N bits of the ui32Data are discarded by the hardware, where N is the data width as configured by SPIConfigSetExpClk(). For example, if the interface is configured for 8-bit data width, the upper 24 bits of ui32Data are discarded.

Parameters

ui32Base	specifies the SPI module base address.
ui32Data	is the data to be transmitted over the SPI interface.

Returns

None

Referenced by SPIDisable().

{
    // Check the arguments
    ASSERT(SPIBaseValid(ui32Base));
    ASSERT((ui32Data & (0xfffffffe << (HWREG(ui32Base + SPI_O_CTL0) &
                                             SPI_CTL0_DSS_M))) == 0);

    // Wait until there is space
    while(!(HWREG(ui32Base + SPI_O_STAT) & SPI_STAT_TNF_NOT_FULL))
    {
    }

    // Write the data to the SPI
    HWREG(ui32Base + SPI_O_TXDATA) = ui32Data;
}

SPIDataPutNonBlocking()

int32_t SPIDataPutNonBlocking	(	uint32_t	ui32Base,
		uint32_t	ui32Data
	)

Puts a data element into the SPI transmit FIFO.

This function places the supplied data into the transmit FIFO of the specified SPI module. If there is no space in the FIFO, then this function returns a zero.

Note

The upper 32 - N bits of the ui32Data are discarded by the hardware, where N is the data width as configured by SPIConfigSetExpClk(). For example, if the interface is configured for 8-bit data width, the upper 24 bits of ui32Data are discarded.

Parameters

ui32Base	specifies the SPI module base address.
ui32Data	is the data to be transmitted over the SPI interface.

Returns

Returns the number of elements written to the SPI transmit FIFO.

Referenced by SPIDisable().

{
    // Check the arguments
    ASSERT(SPIBaseValid(ui32Base));
    ASSERT((ui32Data & (0xfffffffe << (HWREG(ui32Base + SPI_O_CTL0) &
                                             SPI_CTL0_DSS_M))) == 0);

    // Check for space to write
    if(HWREG(ui32Base + SPI_O_STAT) & SPI_STAT_TNF_NOT_FULL)
    {
        HWREG(ui32Base + SPI_O_TXDATA) = ui32Data;
        return (1);
    }
    else
    {
        return (0);
    }
}

SPIDisable()

static void SPIDisable ( uint32_t  ui32Base )

inlinestatic

Disables the serial peripheral port.

This function disables operation of the serial peripheral port.

Parameters

ui32Base

specifies the SPI module base address.

Returns

None

{
    // Check the arguments
    ASSERT(SPIBaseValid(ui32Base));

    // Read-modify-write the enable bit
    HWREG(ui32Base + SPI_O_CTL1) &= ~(SPI_CTL1_ENABLE);
}

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SPIDMADisable()

static void SPIDMADisable ( uint32_t  ui32Base, uint32_t  ui32DMAFlags  )

inlinestatic

Disable SPI DMA operation.

This function is used to disable SPI DMA features that were enabled by SPIDMAEnable(). The specified SPI DMA features are disabled.

Parameters

ui32Base	is the base address of the SPI port.
ui32DMAFlags	is a bit mask of the DMA features to disable. The parameter is the bitwise OR of any of the following values: SPI_DMA_RX : Disable DMA for receive. SPI_DMA_TX : Disable DMA for transmit.

Returns

None

{
    // Check the arguments
    ASSERT(SPIBaseValid(ui32Base));

    // Clear the requested bits in the SPI DMA control register
    HWREG(ui32Base + SPI_O_DMACR) &= ~(ui32DMAFlags);
}

SPIDMAEnable()

static void SPIDMAEnable ( uint32_t  ui32Base, uint32_t  ui32DMAFlags  )

inlinestatic

Enable SPI DMA operation.

The specified SPI DMA features are enabled. The SPI can be configured to use DMA for transmit and/or receive data transfers.

Note

The uDMA controller must also be set up before DMA can be used with the SPI.

Parameters

ui32Base	is the base address of the SPI port.
ui32DMAFlags	is a bit mask of the DMA features to enable. The parameter is the bitwise OR of any of the following values: SPI_DMA_RX : Enable DMA for receive. SPI_DMA_TX : Enable DMA for transmit.

Returns

None

{
    // Check the arguments
    ASSERT(SPIBaseValid(ui32Base));

    // Set the requested bits in the SPI DMA control register
    HWREG(ui32Base + SPI_O_DMACR) |= ui32DMAFlags;
}

SPIEnable()

static void SPIEnable ( uint32_t  ui32Base )

inlinestatic

Enables the serial peripheral port.

This function enables operation of the serial peripheral port. The serial peripheral port must be configured before it is enabled.

Parameters

ui32Base

specifies the SPI module base address.

Returns

None

{
    // Check the arguments
    ASSERT(SPIBaseValid(ui32Base));

    // Read-modify-write the enable bit
    HWREG(ui32Base + SPI_O_CTL1) |= SPI_CTL1_ENABLE;
}

SPIIntClear()

static void SPIIntClear ( uint32_t  ui32Base, uint32_t  ui32IntFlags  )

inlinestatic

Clears SPI interrupt sources.

The specified SPI interrupt sources are cleared so that they no longer assert. This function must be called in the interrupt handler to keep the interrupts from being recognized again immediately upon exit.

Note

Due to write buffers and synchronizers in the system it may take several clock cycles from a register write clearing an event in a module and until the event is actually cleared in the NVIC of the system CPU. It is recommended to clear the event source early in the interrupt service routine (ISR) to allow the event clear to propagate to the NVIC before returning from the ISR. At the same time, an early event clear allows new events of the same type to be pended instead of ignored if the event is cleared later in the ISR. It is the responsibility of the programmer to make sure that enough time has passed before returning from the ISR to avoid false re-triggering of the cleared event. A simple, although not necessarily optimal, way of clearing an event before returning from the ISR is:

1. Write to clear event (interrupt source). (buffered write)
2. Dummy read from the event source module. (making sure the write has propagated)
3. Wait two system CPU clock cycles (user code or two NOPs), (allowing cleared event to propagate through any synchronizers)

Parameters

ui32Base	specifies the SPI module base address.
ui32IntFlags	is a bit mask of the interrupt sources to be cleared. The parameter can consist of either or both of: SPI_DMA_DONE_TX SPI_DMA_DONE_RX SPI_IDLE SPI_TXEMPTY SPI_TX SPI_RX SPI_RTOUT SPI_PER SPI_RXFIFO_OVF

Returns

None

{
    // Check the arguments
    ASSERT(SPIBaseValid(ui32Base));

    // Clear the requested interrupt sources
    HWREG(ui32Base + SPI_O_ICLR) = ui32IntFlags;
}

SPIIntDisable()

static void SPIIntDisable ( uint32_t  ui32Base, uint32_t  ui32IntFlags  )

inlinestatic

Disables individual SPI interrupt sources.

Disables the indicated SPI interrupt sources.

Parameters

ui32Base	specifies the SPI module base address.
ui32IntFlags	is a bit mask of the interrupt sources to be disabled. SPI_DMA_DONE_TX SPI_DMA_DONE_RX SPI_IDLE SPI_TXEMPTY SPI_TX SPI_RX SPI_RTOUT SPI_PER SPI_RXFIFO_OVF

Returns

None

{
    // Check the arguments
    ASSERT(SPIBaseValid(ui32Base));

    // Disable the specified interrupts
    HWREG(ui32Base + SPI_O_IMASK) &= ~(ui32IntFlags);
}

SPIIntEnable()

static void SPIIntEnable ( uint32_t  ui32Base, uint32_t  ui32IntFlags  )

inlinestatic

Enables individual SPI interrupt sources.

Enables the indicated SPI interrupt sources. Only the sources that are enabled can be reflected to the processor interrupt; disabled sources have no effect on the processor.

Parameters

ui32Base	specifies the SPI module base address.
ui32IntFlags	is a bit mask of the interrupt sources to be enabled. SPI_DMA_DONE_TX SPI_DMA_DONE_RX SPI_IDLE SPI_TXEMPTY SPI_TX SPI_RX SPI_RTOUT SPI_PER SPI_RXFIFO_OVF

Returns

None

{
    // Check the arguments
    ASSERT(SPIBaseValid(ui32Base));

    // Enable the specified interrupts
    HWREG(ui32Base + SPI_O_IMASK) |= ui32IntFlags;
}

SPIIntRegister()

void SPIIntRegister	(	uint32_t	ui32Base,
		void(*)(void)	pfnHandler
	)

Registers an interrupt handler for the Serial Peripheral Interface in the dynamic interrupt table.

Note

Only use this function if you want to use the dynamic vector table (in SRAM)!

This function registers a function as the interrupt handler for a specific interrupt and enables the corresponding interrupt in the interrupt controller.

Specific SPI interrupts must be enabled via SPIIntEnable(). If necessary, it is the interrupt handler's responsibility to clear the interrupt source via SPIIntClear().

Parameters

ui32Base	specifies the SPI module base address.
pfnHandler	is a pointer to the function to be called when the serial peripheral port interrupt occurs.

Returns

None

See also

IntRegister() for important information about registering interrupt handlers.

Referenced by SPIStatus().

{
    uint32_t ui32Int;

    // Check the arguments
    ASSERT(SPIBaseValid(ui32Base));

    // Determine the interrupt number based on the SPI port
    ui32Int = (ui32Base == SPI0_BASE) ? INT_SSI0_COMB : INT_SSI1_COMB;

    // Register the interrupt handler
    IntRegister(ui32Int, pfnHandler);

    // Enable the synchronous serial port interrupt
    IntEnable(ui32Int);
}

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SPIIntStatus()

static uint32_t SPIIntStatus ( uint32_t  ui32Base, bool  bMasked  )

inlinestatic

Gets the current interrupt status.

This function returns the interrupt status for the SPI module. Either the raw interrupt status or the status of interrupts that are allowed to reflect to the processor can be returned.

Parameters

ui32Base	specifies the SPI module base address.
bMasked	selects either raw or masked interrupt. false : Raw interrupt status is required. true : Masked interrupt status is required.

Returns

Returns the current interrupt status as an OR'ed combination of:

• SPI_DMA_DONE_TX
• SPI_DMA_DONE_RX
• SPI_IDLE
• SPI_TXEMPTY
• SPI_TX
• SPI_RX
• SPI_RTOUT
• SPI_PER
• SPI_RXFIFO_OVF

{
    // Check the arguments
    ASSERT(SPIBaseValid(ui32Base));

    // Return either the interrupt status or the raw interrupt status as
    // requested
    if(bMasked)
    {
        return (HWREG(ui32Base + SPI_O_MIS));
    }
    else
    {
        return (HWREG(ui32Base + SPI_O_RIS));
    }
}

SPIIntUnregister()

void SPIIntUnregister

(

uint32_t

ui32Base

)

Unregisters an interrupt handler for the Serial Peripheral Interface in the dynamic interrupt table.

This function will clear the handler to be called when a SPI interrupt occurs. This will also mask off the interrupt in the interrupt controller so that the interrupt handler no longer is called.

Parameters

ui32Base

specifies the SPI module base address.

Returns

None

See also

IntRegister() for important information about registering interrupt handlers.

Referenced by SPIStatus().

{
    uint32_t ui32Int;

    // Check the arguments
    ASSERT(SPIBaseValid(ui32Base));

    // Determine the interrupt number based on the SPI port
    ui32Int = (ui32Base == SPI0_BASE) ? INT_SSI0_COMB : INT_SSI1_COMB;

    // Disable the interrupt
    IntDisable(ui32Int);

    // Unregister the interrupt handler
    IntUnregister(ui32Int);
}

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SPIStatus()

static uint32_t SPIStatus ( uint32_t  ui32Base )

inlinestatic

Get the status of the SPI data buffers.

This function is used to poll the status of the internal FIFOs in the SPI module. The status of both TX and RX FIFO is returned.

Parameters

ui32Base

specifies the SPI module base address.

Returns

Returns the current status of the internal SPI data buffers. The status is a bitwise OR'ed combination of:

• SPI_BUSY : Busy
• SPI_RX_NOT_FULL : Receive FIFO not full
• SPI_RX_EMPTY : Receive FIFO empty
• SPI_TX_NOT_FULL : Transmit FIFO not full
• SPI_TX_EMPTY : Transmit FIFO empty

{
    // Check the arguments
    ASSERT(SPIBaseValid(ui32Base));

    // Return the status
    return (HWREG(ui32Base + SPI_O_STAT) & SPI_STATUS_MASK);
}

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Macro Definition Documentation

SPI_BUSY

#define SPI_BUSY   SPI_STAT_BUSY_ACTIVE

Busy.

SPI_DMA_DONE_RX

#define SPI_DMA_DONE_RX   SPI_IMASK_DMA_DONE_RX

DMA Done 1 event for RX event mask.

SPI_DMA_DONE_TX

#define SPI_DMA_DONE_TX   SPI_IMASK_DMA_DONE_TX

DMA Done 1 event for TX event mask.

SPI_DMA_RX

#define SPI_DMA_RX   SPI_DMACR_RXDMAE

Enable DMA for receive.

SPI_DMA_TX

#define SPI_DMA_TX   SPI_DMACR_TXDMAE

Enable DMA for transmit.

SPI_FRF_MOTO_MODE_0

#define SPI_FRF_MOTO_MODE_0

Value:

( SPI_CTL0_FRF_MOTOROLA_3WIRE |  \
                                  SPI_CTL0_SPO_LOW | SPI_CTL0_SPH_FIRST )

Motorola format 3-wire, polarity 0, phase 0.

Referenced by SPIConfigSetExpClk().

SPI_FRF_MOTO_MODE_1

#define SPI_FRF_MOTO_MODE_1

Value:

( SPI_CTL0_FRF_MOTOROLA_3WIRE |  \
                                  SPI_CTL0_SPO_LOW | SPI_CTL0_SPH_SECOND )

Motorola format 3-wire, polarity 0, phase 1.

Referenced by SPIConfigSetExpClk().

SPI_FRF_MOTO_MODE_2

#define SPI_FRF_MOTO_MODE_2

Value:

( SPI_CTL0_FRF_MOTOROLA_3WIRE |  \
                                  SPI_CTL0_SPO_HIGH | SPI_CTL0_SPH_FIRST )

Motorola format 3-wire, polarity 1, phase 0.

Referenced by SPIConfigSetExpClk().

SPI_FRF_MOTO_MODE_3

#define SPI_FRF_MOTO_MODE_3

Value:

( SPI_CTL0_FRF_MOTOROLA_3WIRE |  \
                                  SPI_CTL0_SPO_HIGH | SPI_CTL0_SPH_SECOND )

Motorola format 3-wire, polarity 1, phase 1.

Referenced by SPIConfigSetExpClk().

SPI_FRF_MOTO_MODE_4

#define SPI_FRF_MOTO_MODE_4

Value:

( SPI_CTL0_FRF_MOTOROLA_4WIRE |  \
                                  SPI_CTL0_SPO_LOW | SPI_CTL0_SPH_FIRST )

Motorola format 4-wire, polarity 0, phase 0.

Referenced by SPIConfigSetExpClk().

SPI_FRF_MOTO_MODE_5

#define SPI_FRF_MOTO_MODE_5

Value:

( SPI_CTL0_FRF_MOTOROLA_4WIRE |  \
                                  SPI_CTL0_SPO_LOW | SPI_CTL0_SPH_SECOND )

Motorola format 4-wire, polarity 0, phase 1.

Referenced by SPIConfigSetExpClk().

SPI_FRF_MOTO_MODE_6

#define SPI_FRF_MOTO_MODE_6

Value:

( SPI_CTL0_FRF_MOTOROLA_4WIRE |  \
                                  SPI_CTL0_SPO_HIGH | SPI_CTL0_SPH_FIRST )

Motorola format 4-wire, polarity 1, phase 0.

Referenced by SPIConfigSetExpClk().

SPI_FRF_MOTO_MODE_7

#define SPI_FRF_MOTO_MODE_7

Value:

( SPI_CTL0_FRF_MOTOROLA_4WIRE |  \
                                  SPI_CTL0_SPO_HIGH | SPI_CTL0_SPH_SECOND )

Motorola format 4-wire, polarity 1, phase 1.

Referenced by SPIConfigSetExpClk().

SPI_FRF_NMW

#define SPI_FRF_NMW   SPI_CTL0_FRF_MIRCOWIRE

MicroWire frame format.

Referenced by SPIConfigSetExpClk().

SPI_FRF_TI

#define SPI_FRF_TI   SPI_CTL0_FRF_TI_SYNC

TI Sync frame format.

Referenced by SPIConfigSetExpClk().

SPI_IDLE

#define SPI_IDLE   SPI_IMASK_IDLE

SPI Idle event mask.

SPI_MODE_CONTROLLER

#define SPI_MODE_CONTROLLER   SPI_CTL1_MS_ENABLE

SPI controller.

Referenced by SPIConfigSetExpClk().

SPI_MODE_PERIPHERAL

#define SPI_MODE_PERIPHERAL   SPI_CTL1_MS_DISABLE

SPI peripheral.

Referenced by SPIConfigSetExpClk().

SPI_MODE_PERIPHERAL_OD

#define SPI_MODE_PERIPHERAL_OD   SPI_CTL1_SOD_ENABLE

output disabled

SPI peripheral with POCI

Referenced by SPIConfigSetExpClk().

SPI_PER

#define SPI_PER   SPI_IMASK_PER

Parity error event mask.

SPI_RTOUT

#define SPI_RTOUT   SPI_IMASK_RTOUT

Enable SPI Receive Time-Out event mask.

SPI_RX

#define SPI_RX   SPI_IMASK_RX

Receive FIFO event. This interrupt is set if the selected Receive FIFO level has been reached.

SPI_RX_EMPTY

#define SPI_RX_EMPTY   SPI_STAT_RFE_EMPTY

Receive FIFO empty.

SPI_RX_NOT_FULL

#define SPI_RX_NOT_FULL   SPI_STAT_RNF_NOT_FULL

Receive FIFO not full.

SPI_RXFIFO_OVF

#define SPI_RXFIFO_OVF   SPI_IMASK_RXFIFO_OVF

RXFIFO overflow event mask.

SPI_STATUS_MASK

#define SPI_STATUS_MASK   0x0000001F

Mask for bits above.

Referenced by SPIStatus().

SPI_TX

#define SPI_TX   SPI_IMASK_TX

Transmit FIFO event mask.

SPI_TX_EMPTY

#define SPI_TX_EMPTY   SPI_STAT_TFE_EMPTY

Transmit FIFO empty.

SPI_TX_NOT_FULL

#define SPI_TX_NOT_FULL   SPI_STAT_TNF_NOT_FULL

Transmit FIFO not full.

SPI_TXEMPTY

#define SPI_TXEMPTY   SPI_IMASK_TXEMPTY

Transmit FIFO Empty event mask.