FLASH

Instance: FLASH
Component: FLASH
Base address: 0x58030000


Thor1M Flash sub-system registers, includes the NoWrapper Flash Memory Controller (NW), flash read path, and an integrated Efuse controller and EFUSEROM.

TOP:FLASH Register Summary

Register Name

Type

Register Width (Bits)

Register Reset

Address Offset

Physical Address

WEPROT_B0_31_0_BY1

RW

32

0xFFFF FFFF

0x0000 0000

0x5803 0000

WEPROT_AUX_BY1

RW

32

0x0000 003F

0x0000 0004

0x5803 0004

STAT

RO

32

0x0000 0000

0x0000 001C

0x5803 001C

CFG

RW

32

0x0000 0000

0x0000 0024

0x5803 0024

FLASH_SIZE

RW

32

0x0000 0200

0x0000 002C

0x5803 002C

FWLOCK

RW

32

0x0000 0000

0x0000 003C

0x5803 003C

FWFLAG

RW

32

0x0000 0000

0x0000 0040

0x5803 0040

BANK0_TRIM_CFG_3

RW

32

0x0000 0000

0x0000 0050

0x5803 0050

BANK0_TRIM_CFG_2

RW

32

0x0000 0000

0x0000 0054

0x5803 0054

BANK0_TRIM_CFG_1

RW

32

0x0000 0000

0x0000 0058

0x5803 0058

BANK0_TRIM_CFG_0

RW

32

0x0000 0000

0x0000 005C

0x5803 005C

BANK1_TRIM_CFG_3

RW

32

0x0000 0000

0x0000 0060

0x5803 0060

BANK1_TRIM_CFG_2

RW

32

0x0000 0000

0x0000 0064

0x5803 0064

BANK1_TRIM_CFG_1

RW

32

0x0000 0000

0x0000 0068

0x5803 0068

BANK1_TRIM_CFG_0

RW

32

0x0000 0000

0x0000 006C

0x5803 006C

PUMP_TRIM_CFG_2

RW

32

0x0055 9400

0x0000 0070

0x5803 0070

PUMP_TRIM_CFG_1

RW

32

0x1920 0000

0x0000 0074

0x5803 0074

PUMP_TRIM_CFG_0

RW

32

0x00B4 C53A

0x0000 0078

0x5803 0078

EFUSE

RW

32

0x0000 0000

0x0000 1000

0x5803 1000

EFUSEADDR

RW

32

0x0000 0000

0x0000 1004

0x5803 1004

DATAUPPER

RW

32

0x0000 0000

0x0000 1008

0x5803 1008

DATALOWER

RW

32

0x0000 0000

0x0000 100C

0x5803 100C

EFUSECFG

RW

32

0x0000 0001

0x0000 1010

0x5803 1010

EFUSESTAT

RO

32

0x0000 0001

0x0000 1014

0x5803 1014

ACC

RO

32

0x0000 0000

0x0000 1018

0x5803 1018

BOUNDARY

RW

32

0x0000 0000

0x0000 101C

0x5803 101C

EFUSEFLAG

RO

32

0x0000 0000

0x0000 1020

0x5803 1020

EFUSEKEY

RW

32

0x0000 0000

0x0000 1024

0x5803 1024

EFUSERELEASE

RO

32

0xXXXX XXXX

0x0000 1028

0x5803 1028

EFUSEPINS

RO

32

0x0000 XXXX

0x0000 102C

0x5803 102C

EFUSECRA

RW

32

0x0000 0000

0x0000 1030

0x5803 1030

EFUSEREAD

RW

32

0x0000 0000

0x0000 1034

0x5803 1034

EFUSEPROGRAM

RW

32

0x0000 0000

0x0000 1038

0x5803 1038

EFUSEERROR

RW

32

0x0000 0000

0x0000 103C

0x5803 103C

SINGLEBIT

RO

32

0x0000 0000

0x0000 1040

0x5803 1040

TWOBIT

RO

32

0x0000 0000

0x0000 1044

0x5803 1044

SELFTESTCYC

RW

32

0x0000 0000

0x0000 1048

0x5803 1048

SELFTESTSIGN

RW

32

0x0000 0000

0x0000 104C

0x5803 104C

TOP:FLASH Register Descriptions

TOP:FLASH:WEPROT_B0_31_0_BY1

Address Offset 0x0000 0000
Physical Address 0x5803 0000 Instance 0x5803 0000
Description Internal. Only to be used through TI provided API.
Type RW
Bits Field Name Description Type Reset
31:0 WEPROT_B0_31_0_BY1 Internal. Only to be used through TI provided API. RW 0xFFFF FFFF

TOP:FLASH:WEPROT_AUX_BY1

Address Offset 0x0000 0004
Physical Address 0x5803 0004 Instance 0x5803 0004
Description Internal. Only to be used through TI provided API.
Type RW
Bits Field Name Description Type Reset
31:6 RESERVED6 Internal. Only to be used through TI provided API. RO 0b00 0000 0000 0000 0000 0000 0000
5 WEPROT_B1_ENGR_BY1 Internal. Only to be used through TI provided API. RW 1
4 WEPROT_B0_ENGR_BY1 Internal. Only to be used through TI provided API. RW 1
3 WEPROT_B1_TRIM_BY1 Internal. Only to be used through TI provided API. RW 1
2 WEPROT_B0_TRIM_BY1 Internal. Only to be used through TI provided API. RW 1
1 WEPROT_B1_FCFG_BY1 Internal. Only to be used through TI provided API. RW 1
0 WEPROT_B0_CCFG_BY1 Internal. Only to be used through TI provided API. RW 1

TOP:FLASH:STAT

Address Offset 0x0000 001C
Physical Address 0x5803 001C Instance 0x5803 001C
Description NW and Efuse Status
Type RO
Bits Field Name Description Type Reset
31:17 RESERVED15 Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior. RO 0b000 0000 0000 0000
16 STALLSTAT An ocp1 or ocp3 read stall has occurred.
0 : No stall or stall acknowledged by writing a 1
1 : Stall condition occurred/occurring

This is a read/write-clear status bit. It will reset to 0. It will be set when either an ocp1 or ocp3 read occurs to a bank that is presently undergoing a program or write operation.

An ocp2 write of 1 to this bit will clear the bit. The ocp2 write will take highest priority in the event an ocp1/ocp3 read is occurring concurrently to the ocp2 write.
Clearing the bit should be done only after the ongoing program/erase operation is complete indicating that both banks are free.
If clearing occurs while the stall condition persists, the field may get set back to one.
RW 0
15 EFUSE_BLANK Efuse scanning detected if fuse ROM is blank:
0 : Not blank
1 : Blank
RO 0
14 EFUSE_TIMEOUT Efuse scanning resulted in timeout error.
0 : No Timeout error
1 : Timeout Error
RO 0
13 SPRS_BYTE_NOT_OK Efuse scanning resulted in scan chain Sparse byte error.
0 : No Sparse error
1 : Sparse Error
RO 0
12:8 EFUSE_ERRCODE Same as EFUSEERROR.CODE RO 0b0 0000
7:6 RESERVED7 Software should not rely on the value of a reserved bit. To provide compatibility with future products, the value of a reserved bit should be preserved across a read-modify-write operation RO 0b00
5:4 BUSY NW FW_SMSTAT.CMD_IN_PROGRESS bit.
This flag is valid immediately after the operation setting it
0 : Not busy
1 : Busy

Bit 4 is for the busy state for Bank0 which is at logical address 0x0
Bit 5 for Bank1.
RO 0b00
3 READY1T 1T access readiness status indicator from NW. Comes later than 2T readiness.
1: FLASH banks are ready for 1T accesses
0: FLASH banks are not ready for 1T accesses
RO 0
2 READY2T 2T access readiness status indicator from NW
1: FLASH banks are ready for 2T accesses
0: FLASH banks are not ready for 2T accesses
RO 0
1:0 POWER_MODE Power state of each of the 2 flash arbiter FSM instances in the flash sub-system. For Thor, these bits should mostly be in the same state since both banks are in the same power mode.
0 : Active
1 : Ready for Low power (The 2T readiness has gone low or the flash_off_req has been set=1, and flash_off_ack is ready to be asserted).

Bit 0 is for the power state for Bank0 which is at logical address 0x0
Bit 1 for Bank1
RO 0b00

TOP:FLASH:CFG

Address Offset 0x0000 0024
Physical Address 0x5803 0024 Instance 0x5803 0024
Description Internal. Only to be used through TI provided API.
Type RW
Bits Field Name Description Type Reset
31 RESERVED31 Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior. RW 0
30 DIS_FWTEST Internal. Only to be used through TI provided API. RW 0
29:12 RESERVED12 Internal. Only to be used through TI provided API. RO 0b00 0000 0000 0000 0000
11 MAIN_STICKY_EN Internal. Only to be used through TI provided API. RW 0
10 CCFG_STICKY_EN Internal. Only to be used through TI provided API. RW 0
9 FCFG_STICKY_EN Internal. Only to be used through TI provided API. RW 0
8 ENGR_TRIM_STICKY_EN Internal. Only to be used through TI provided API. RW 0
7:6 RESERVED6 Internal. Only to be used through TI provided API. RO 0b00
5 DIS_EFUSECLK Internal. Only to be used through TI provided API. RW 0
4 DIS_READACCESS Internal. Only to be used through TI provided API. RW 0
3:1 RESERVED1 Internal. Only to be used through TI provided API. RW 0b000
0 BP_TRIMCFG_EN Internal. Only to be used through TI provided API. RW 0

TOP:FLASH:FLASH_SIZE

Address Offset 0x0000 002C
Physical Address 0x5803 002C Instance 0x5803 002C
Description Internal. Only to be used through TI provided API.
Type RW
Bits Field Name Description Type Reset
31:10 RESERVED10 Internal. Only to be used through TI provided API. RO 0b00 0000 0000 0000 0000 0000
9:7 SECTORS Internal. Only to be used through TI provided API. RW 0b100
6:0 RESERVED0 Internal. Only to be used through TI provided API. RO 0b000 0000

TOP:FLASH:FWLOCK

Address Offset 0x0000 003C
Physical Address 0x5803 003C Instance 0x5803 003C
Description Internal. Only to be used through TI provided API.
Type RW
Bits Field Name Description Type Reset
31:3 RESERVED3 Internal. Only to be used through TI provided API. RO 0b0 0000 0000 0000 0000 0000 0000 0000
2:0 FWLOCK Internal. Only to be used through TI provided API. RW 0b000

TOP:FLASH:FWFLAG

Address Offset 0x0000 0040
Physical Address 0x5803 0040 Instance 0x5803 0040
Description Internal. Only to be used through TI provided API.
Type RW
Bits Field Name Description Type Reset
31:3 RESERVED3 Internal. Only to be used through TI provided API. RO 0b0 0000 0000 0000 0000 0000 0000 0000
2:0 FWFLAG Internal. Only to be used through TI provided API. RW 0b000

TOP:FLASH:BANK0_TRIM_CFG_3

Address Offset 0x0000 0050
Physical Address 0x5803 0050 Instance 0x5803 0050
Description Internal. Only to be used through TI provided API.
Type RW
Bits Field Name Description Type Reset
31:0 RESERVED32 Internal. Only to be used through TI provided API. RW 0x0000 0000

TOP:FLASH:BANK0_TRIM_CFG_2

Address Offset 0x0000 0054
Physical Address 0x5803 0054 Instance 0x5803 0054
Description Internal. Only to be used through TI provided API.
Type RW
Bits Field Name Description Type Reset
31:0 RESERVED32 Internal. Only to be used through TI provided API. RW 0x0000 0000

TOP:FLASH:BANK0_TRIM_CFG_1

Address Offset 0x0000 0058
Physical Address 0x5803 0058 Instance 0x5803 0058
Description Internal. Only to be used through TI provided API.
Type RW
Bits Field Name Description Type Reset
31:28 RESERVED6 Internal. Only to be used through TI provided API. RW 0x0
27:22 REDSWSELW3 Internal. Only to be used through TI provided API. RW 0b00 0000
21:16 REDSWSELW2 Internal. Only to be used through TI provided API. RW 0b00 0000
15:10 REDSWSELW1 Internal. Only to be used through TI provided API. RW 0b00 0000
9:4 REDSWSELW0 Internal. Only to be used through TI provided API. RW 0b00 0000
3 REDSWENW3 Internal. Only to be used through TI provided API. RW 0
2 REDSWENW2 Internal. Only to be used through TI provided API. RW 0
1 REDSWENW1 Internal. Only to be used through TI provided API. RW 0
0 REDSWENW0 Internal. Only to be used through TI provided API. RW 0

TOP:FLASH:BANK0_TRIM_CFG_0

Address Offset 0x0000 005C
Physical Address 0x5803 005C Instance 0x5803 005C
Description Internal. Only to be used through TI provided API.
Type RW
Bits Field Name Description Type Reset
31:0 BANK0_TRIM_CFG_0 Internal. Only to be used through TI provided API. RW 0x0000 0000

TOP:FLASH:BANK1_TRIM_CFG_3

Address Offset 0x0000 0060
Physical Address 0x5803 0060 Instance 0x5803 0060
Description Internal. Only to be used through TI provided API.
Type RW
Bits Field Name Description Type Reset
31:0 RESERVED32 Internal. Only to be used through TI provided API. RW 0x0000 0000

TOP:FLASH:BANK1_TRIM_CFG_2

Address Offset 0x0000 0064
Physical Address 0x5803 0064 Instance 0x5803 0064
Description Internal. Only to be used through TI provided API.
Type RW
Bits Field Name Description Type Reset
31:0 RESERVED32 Internal. Only to be used through TI provided API. RW 0x0000 0000

TOP:FLASH:BANK1_TRIM_CFG_1

Address Offset 0x0000 0068
Physical Address 0x5803 0068 Instance 0x5803 0068
Description Internal. Only to be used through TI provided API.
Type RW
Bits Field Name Description Type Reset
31:28 RESERVED6 Internal. Only to be used through TI provided API. RW 0x0
27:22 REDSWSELW3 Internal. Only to be used through TI provided API. RW 0b00 0000
21:16 REDSWSELW2 Internal. Only to be used through TI provided API. RW 0b00 0000
15:10 REDSWSELW1 Internal. Only to be used through TI provided API. RW 0b00 0000
9:4 REDSWSELW0 Internal. Only to be used through TI provided API. RW 0b00 0000
3 REDSWENW3 Internal. Only to be used through TI provided API. RW 0
2 REDSWENW2 Internal. Only to be used through TI provided API. RW 0
1 REDSWENW1 Internal. Only to be used through TI provided API. RW 0
0 REDSWENW0 Internal. Only to be used through TI provided API. RW 0

TOP:FLASH:BANK1_TRIM_CFG_0

Address Offset 0x0000 006C
Physical Address 0x5803 006C Instance 0x5803 006C
Description Internal. Only to be used through TI provided API.
Type RW
Bits Field Name Description Type Reset
31:0 BANK1_TRIM_CFG_0 Internal. Only to be used through TI provided API. RW 0x0000 0000

TOP:FLASH:PUMP_TRIM_CFG_2

Address Offset 0x0000 0070
Physical Address 0x5803 0070 Instance 0x5803 0070
Description Internal. Only to be used through TI provided API.
Type RW
Bits Field Name Description Type Reset
31:26 RESERVED6 Internal. Only to be used through TI provided API. RW 0b00 0000
25:20 VWLCT Internal. Only to be used through TI provided API. RW 0b00 0101
19:14 VSLCT Internal. Only to be used through TI provided API. RW 0b01 0110
13:9 VREADCT Internal. Only to be used through TI provided API. RW 0b0 1010
8:4 VINLOWCCORCT Internal. Only to be used through TI provided API. RW 0b0 0000
3:0 VINHICCORCT Internal. Only to be used through TI provided API. RW 0x0

TOP:FLASH:PUMP_TRIM_CFG_1

Address Offset 0x0000 0074
Physical Address 0x5803 0074 Instance 0x5803 0074
Description Internal. Only to be used through TI provided API.
Type RW
Bits Field Name Description Type Reset
31 VINHICCORCTLSB Internal. Only to be used through TI provided API. RW 0
30:25 VINHCT Internal. Only to be used through TI provided API. RW 0b00 1100
24:20 VCGCT Internal. Only to be used through TI provided API. RW 0b1 0010
19:15 IREFVRDCT Internal. Only to be used through TI provided API. RW 0b0 0000
14:10 IREFTCCT Internal. Only to be used through TI provided API. RW 0b0 0000
9:6 IREFCT Internal. Only to be used through TI provided API. RW 0x0
5:0 FOSCCT Internal. Only to be used through TI provided API. RW 0b00 0000

TOP:FLASH:PUMP_TRIM_CFG_0

Address Offset 0x0000 0078
Physical Address 0x5803 0078 Instance 0x5803 0078
Description Internal. Only to be used through TI provided API.
Type RW
Bits Field Name Description Type Reset
31:30 RESERVED2 Internal. Only to be used through TI provided API. RW 0b00
29:20 VHVCT_PV Internal. Only to be used through TI provided API. RW 0b00 0000 1011
19:10 VHVCT_PGM Internal. Only to be used through TI provided API. RW 0b01 0011 0001
9:0 VHVCT_ERS Internal. Only to be used through TI provided API. RW 0b01 0011 1010

TOP:FLASH:EFUSE

Address Offset 0x0000 1000
Physical Address 0x5803 1000 Instance 0x5803 1000
Description Internal. Only to be used through TI provided API.
Type RW
Bits Field Name Description Type Reset
31:29 RESERVED29 Internal. Only to be used through TI provided API. RO 0b000
28:24 INSTRUCTION Internal. Only to be used through TI provided API. RW 0b0 0000
23:16 RESERVED16 Internal. Only to be used through TI provided API. RO 0x00
15:0 DUMPWORD Internal. Only to be used through TI provided API. RW 0x0000

TOP:FLASH:EFUSEADDR

Address Offset 0x0000 1004
Physical Address 0x5803 1004 Instance 0x5803 1004
Description Internal. Only to be used through TI provided API.
Type RW
Bits Field Name Description Type Reset
31:16 RESERVED16 Internal. Only to be used through TI provided API. RO 0x0000
15:11 BLOCK Internal. Only to be used through TI provided API. RW 0b0 0000
10:0 ROW Internal. Only to be used through TI provided API. RW 0b000 0000 0000

TOP:FLASH:DATAUPPER

Address Offset 0x0000 1008
Physical Address 0x5803 1008 Instance 0x5803 1008
Description Internal. Only to be used through TI provided API.
Type RW
Bits Field Name Description Type Reset
31:8 RESERVED8 Internal. Only to be used through TI provided API. RO 0x00 0000
7:3 SPARE Internal. Only to be used through TI provided API. RW 0b0 0000
2 P Internal. Only to be used through TI provided API. RW 0
1 R Internal. Only to be used through TI provided API. RW 0
0 EEN Internal. Only to be used through TI provided API. RW 0

TOP:FLASH:DATALOWER

Address Offset 0x0000 100C
Physical Address 0x5803 100C Instance 0x5803 100C
Description Internal. Only to be used through TI provided API.
Type RW
Bits Field Name Description Type Reset
31:0 DATA Internal. Only to be used through TI provided API. RW 0x0000 0000

TOP:FLASH:EFUSECFG

Address Offset 0x0000 1010
Physical Address 0x5803 1010 Instance 0x5803 1010
Description Internal. Only to be used through TI provided API.
Type RW
Bits Field Name Description Type Reset
31:9 RESERVED9 Internal. Only to be used through TI provided API. RO 0b000 0000 0000 0000 0000 0000
8 IDLEGATING Internal. Only to be used through TI provided API. RW 0
7:5 RESERVED5 Internal. Only to be used through TI provided API. RO 0b000
4:3 SLAVEPOWER Internal. Only to be used through TI provided API. RW 0b00
2:1 RESERVED1 Internal. Only to be used through TI provided API. RO 0b00
0 GATING Internal. Only to be used through TI provided API. RW 1

TOP:FLASH:EFUSESTAT

Address Offset 0x0000 1014
Physical Address 0x5803 1014 Instance 0x5803 1014
Description Internal. Only to be used through TI provided API.
Type RO
Bits Field Name Description Type Reset
31:1 RESERVED1 Internal. Only to be used through TI provided API. RO 0b000 0000 0000 0000 0000 0000 0000 0000
0 RESETDONE Internal. Only to be used through TI provided API. RO 1

TOP:FLASH:ACC

Address Offset 0x0000 1018
Physical Address 0x5803 1018 Instance 0x5803 1018
Description Internal. Only to be used through TI provided API.
Type RO
Bits Field Name Description Type Reset
31:24 RESERVED24 Internal. Only to be used through TI provided API. RO 0x00
23:0 ACCUMULATOR Internal. Only to be used through TI provided API. RO 0x00 0000

TOP:FLASH:BOUNDARY

Address Offset 0x0000 101C
Physical Address 0x5803 101C Instance 0x5803 101C
Description Internal. Only to be used through TI provided API.
Type RW
Bits Field Name Description Type Reset
31:24 RESERVED24 Internal. Only to be used through TI provided API. RO 0x00
23 DISROW0 Internal. Only to be used through TI provided API. RW 0
22 SPARE Internal. Only to be used through TI provided API. RW 0
21 EFC_SELF_TEST_ERROR Internal. Only to be used through TI provided API. RW 0
20 EFC_INSTRUCTION_INFO Internal. Only to be used through TI provided API. RW 0
19 EFC_INSTRUCTION_ERROR Internal. Only to be used through TI provided API. RW 0
18 EFC_AUTOLOAD_ERROR Internal. Only to be used through TI provided API. RW 0
17:14 OUTPUTENABLE Internal. Only to be used through TI provided API. RW 0x0
13 SYS_ECC_SELF_TEST_EN Internal. Only to be used through TI provided API. RW 0
12 SYS_ECC_OVERRIDE_EN Internal. Only to be used through TI provided API. RW 0
11 EFC_FDI Internal. Only to be used through TI provided API. RW 0
10 SYS_DIEID_AUTOLOAD_EN Internal. Only to be used through TI provided API. RW 0
9:8 SYS_REPAIR_EN Internal. Only to be used through TI provided API. RW 0b00
7:4 SYS_WS_READ_STATES Internal. Only to be used through TI provided API. RW 0x0
3:0 INPUTENABLE Internal. Only to be used through TI provided API. RW 0x0

TOP:FLASH:EFUSEFLAG

Address Offset 0x0000 1020
Physical Address 0x5803 1020 Instance 0x5803 1020
Description Internal. Only to be used through TI provided API.
Type RO
Bits Field Name Description Type Reset
31:1 RESERVED1 Internal. Only to be used through TI provided API. RO 0b000 0000 0000 0000 0000 0000 0000 0000
0 KEY Internal. Only to be used through TI provided API. RO 0

TOP:FLASH:EFUSEKEY

Address Offset 0x0000 1024
Physical Address 0x5803 1024 Instance 0x5803 1024
Description Internal. Only to be used through TI provided API.
Type RW
Bits Field Name Description Type Reset
31:0 CODE Internal. Only to be used through TI provided API. RW 0x0000 0000

TOP:FLASH:EFUSERELEASE

Address Offset 0x0000 1028
Physical Address 0x5803 1028 Instance 0x5803 1028
Description Internal. Only to be used through TI provided API.
Type RO
Bits Field Name Description Type Reset
31:25 ODPYEAR Internal. Only to be used through TI provided API. RO 0xXX
24:21 ODPMONTH Internal. Only to be used through TI provided API. RO 0xX
20:16 ODPDAY Internal. Only to be used through TI provided API. RO 0xXX
15:9 EFUSEYEAR Internal. Only to be used through TI provided API. RO 0xXX
8:5 EFUSEMONTH Internal. Only to be used through TI provided API. RO 0xX
4:0 EFUSEDAY Internal. Only to be used through TI provided API. RO 0xXX

TOP:FLASH:EFUSEPINS

Address Offset 0x0000 102C
Physical Address 0x5803 102C Instance 0x5803 102C
Description Internal. Only to be used through TI provided API.
Type RO
Bits Field Name Description Type Reset
31:16 RESERVED16 Internal. Only to be used through TI provided API. RO 0x0000
15 EFC_SELF_TEST_DONE Internal. Only to be used through TI provided API. RO X
14 EFC_SELF_TEST_ERROR Internal. Only to be used through TI provided API. RO X
13 SYS_ECC_SELF_TEST_EN Internal. Only to be used through TI provided API. RO X
12 EFC_INSTRUCTION_INFO Internal. Only to be used through TI provided API. RO X
11 EFC_INSTRUCTION_ERROR Internal. Only to be used through TI provided API. RO X
10 EFC_AUTOLOAD_ERROR Internal. Only to be used through TI provided API. RO X
9 SYS_ECC_OVERRIDE_EN Internal. Only to be used through TI provided API. RO X
8 EFC_READY Internal. Only to be used through TI provided API. RO X
7 EFC_FCLRZ Internal. Only to be used through TI provided API. RO X
6 SYS_DIEID_AUTOLOAD_EN Internal. Only to be used through TI provided API. RO X
5:4 SYS_REPAIR_EN Internal. Only to be used through TI provided API. RO 0xX
3:0 SYS_WS_READ_STATES Internal. Only to be used through TI provided API. RO 0xX

TOP:FLASH:EFUSECRA

Address Offset 0x0000 1030
Physical Address 0x5803 1030 Instance 0x5803 1030
Description Internal. Only to be used through TI provided API.
Type RW
Bits Field Name Description Type Reset
31:6 RESERVED6 Internal. Only to be used through TI provided API. RO 0b00 0000 0000 0000 0000 0000 0000
5:0 DATA Internal. Only to be used through TI provided API. RW 0b00 0000

TOP:FLASH:EFUSEREAD

Address Offset 0x0000 1034
Physical Address 0x5803 1034 Instance 0x5803 1034
Description Internal. Only to be used through TI provided API.
Type RW
Bits Field Name Description Type Reset
31:10 RESERVED10 Internal. Only to be used through TI provided API. RO 0b00 0000 0000 0000 0000 0000
9:8 DATABIT Internal. Only to be used through TI provided API. RW 0b00
7:4 READCLOCK Internal. Only to be used through TI provided API. RW 0x0
3 DEBUG Internal. Only to be used through TI provided API. RW 0
2 SPARE Internal. Only to be used through TI provided API. RW 0
1:0 MARGIN Internal. Only to be used through TI provided API. RW 0b00

TOP:FLASH:EFUSEPROGRAM

Address Offset 0x0000 1038
Physical Address 0x5803 1038 Instance 0x5803 1038
Description Internal. Only to be used through TI provided API.
Type RW
Bits Field Name Description Type Reset
31 RESERVED31 Internal. Only to be used through TI provided API. RO 0
30 COMPAREDISABLE Internal. Only to be used through TI provided API. RW 0
29:14 CLOCKSTALL Internal. Only to be used through TI provided API. RW 0x0000
13 VPPTOVDD Internal. Only to be used through TI provided API. RW 0
12:9 ITERATIONS Internal. Only to be used through TI provided API. RW 0x0
8:0 WRITECLOCK Internal. Only to be used through TI provided API. RW 0b0 0000 0000

TOP:FLASH:EFUSEERROR

Address Offset 0x0000 103C
Physical Address 0x5803 103C Instance 0x5803 103C
Description Internal. Only to be used through TI provided API.
Type RW
Bits Field Name Description Type Reset
31:6 RESERVED6 Internal. Only to be used through TI provided API. RO 0b00 0000 0000 0000 0000 0000 0000
5 DONE Internal. Only to be used through TI provided API. RW 0
4:0 CODE Internal. Only to be used through TI provided API. RW 0b0 0000

TOP:FLASH:SINGLEBIT

Address Offset 0x0000 1040
Physical Address 0x5803 1040 Instance 0x5803 1040
Description Internal. Only to be used through TI provided API.
Type RO
Bits Field Name Description Type Reset
31:1 FROMN Internal. Only to be used through TI provided API. RO 0b000 0000 0000 0000 0000 0000 0000 0000
0 FROM0 Internal. Only to be used through TI provided API. RO 0

TOP:FLASH:TWOBIT

Address Offset 0x0000 1044
Physical Address 0x5803 1044 Instance 0x5803 1044
Description Internal. Only to be used through TI provided API.
Type RO
Bits Field Name Description Type Reset
31:1 FROMN Internal. Only to be used through TI provided API. RO 0b000 0000 0000 0000 0000 0000 0000 0000
0 FROM0 Internal. Only to be used through TI provided API. RO 0

TOP:FLASH:SELFTESTCYC

Address Offset 0x0000 1048
Physical Address 0x5803 1048 Instance 0x5803 1048
Description Internal. Only to be used through TI provided API.
Type RW
Bits Field Name Description Type Reset
31:0 CYCLES Internal. Only to be used through TI provided API. RW 0x0000 0000

TOP:FLASH:SELFTESTSIGN

Address Offset 0x0000 104C
Physical Address 0x5803 104C Instance 0x5803 104C
Description Internal. Only to be used through TI provided API.
Type RW
Bits Field Name Description Type Reset
31:0 SIGNATURE Internal. Only to be used through TI provided API. RW 0x0000 0000