CC26xx Driver Library
[osc.h] Oscillator

Data Structures

struct  HposcDebugData_t
 Data structure for experimental HPOSC polynomials calculation. More...
 

Functions

static void OSCXHfPowerModeSet (uint32_t ui32Mode)
 Set Power Mode for High Frequency XTAL Oscillator. More...
 
static void OSCClockLossEventEnable (void)
 Enables OSC clock loss event detection. More...
 
static void OSCClockLossEventDisable (void)
 Disables OSC clock loss event detection. More...
 
void OSCClockSourceSet (uint32_t ui32SrcClk, uint32_t ui32Osc)
 Configure the oscillator input to the a source clock. More...
 
uint32_t OSCClockSourceGet (uint32_t ui32SrcClk)
 Get the source clock settings. More...
 
static bool OSCHfSourceReady (void)
 Check if the HF clock source is ready to be switched. More...
 
static void OSCHfSourceSwitch (void)
 Switch the high frequency clock. More...
 
static bool OSC_IsHPOSCEnabled (void)
 Identifies if HPOSC is enabled. More...
 
static bool OSC_IsHPOSCEnabledWithHfDerivedLfClock (void)
 Identifies if HPOSC is enabled and that SCLK_LF is derived from XOSC_HF. More...
 
uint32_t OSCHF_GetStartupTime (uint32_t timeUntilWakeupInMs)
 Returns maximum startup time (in microseconds) of XOSC_HF. More...
 
void OSCHF_TurnOnXosc (void)
 Turns on XOSC_HF (but without switching to XOSC_HF). More...
 
bool OSCHF_AttemptToSwitchToXosc (void)
 Switch to XOSC_HF if XOSC_HF is ready. More...
 
void OSCHF_SwitchToRcOscTurnOffXosc (void)
 Switch to RCOSC_HF and turn off XOSC_HF. More...
 
uint32_t OSCHF_DebugGetCrystalAmplitude (void)
 Get crystal amplitude (assuming crystal is running). More...
 
uint32_t OSCHF_DebugGetExpectedAverageCrystalAmplitude (void)
 Get the expected average crystal amplitude. More...
 
uint32_t OSCHF_DebugGetCrystalStartupTime (void)
 Measure the crystal startup time. More...
 
void OSC_HPOSCInitializeFrequencyOffsetParameters (void)
 HPOSC initialization function. Must always be called before using HPOSC. More...
 
void OSC_HPOSC_Debug_InitFreqOffsetParams (HposcDebugData_t *pDebugData)
 Debug function to calculate the HPOSC polynomials for experimental data sets. More...
 
void OSC_HPOSCInitializeSingleInsertionFreqOffsParams (uint32_t measFieldAddress)
 Special HPOSC initialization function for single temperature compensation. More...
 
int32_t OSC_HPOSCRelativeFrequencyOffsetGet (int32_t tempDegC)
 Calculate the temperature dependent relative frequency offset of HPOSC. More...
 
void OSC_AdjustXoscHfCapArray (int32_t capArrDelta)
 Adjust the XOSC HF cap array relative to the factory setting. More...
 
int16_t OSC_HPOSCRelativeFrequencyOffsetToRFCoreFormatConvert (int32_t HPOSC_RelFreqOffset)
 Converts the relative frequency offset of HPOSC to the RF Core parameter format. More...
 
void OSC_HPOSCRtcCompensate (int32_t relFreqOffset)
 Compensate the RTC increment based on the relative frequency offset of HPOSC. More...
 

Detailed Description

Function Documentation

§ OSC_AdjustXoscHfCapArray()

void OSC_AdjustXoscHfCapArray ( int32_t  capArrDelta)

Adjust the XOSC HF cap array relative to the factory setting.

The cap array factory setting (FCFG) can be converted to a number in the range 0 - 63. Both this function and the customer configuration (CCFG) setting can apply a delta to the FCFG setting. The CCFG setting is automatically applied at boot time (See ../startup_files/ccfg.c). Calling this function will discard the CCFG setting and adjust relative to the FCFG setting.

Note
Adjusted value will not take effect before XOSC_HF is stopped and restarted
Parameters
capArrDeltaspecifies number of step to adjust the cap array relative to the factory setting.
Returns
None
324 {
325  {
326  // Read the MODE_CONF register in CCFG
327  uint32_t ccfg_ModeConfReg = HWREG( CCFG_BASE + CCFG_O_MODE_CONF );
328  // Clear CAP_MODE and the CAPARRAY_DELATA field
329  ccfg_ModeConfReg &= ~( CCFG_MODE_CONF_XOSC_CAPARRAY_DELTA_M | CCFG_MODE_CONF_XOSC_CAP_MOD_M );
330  // Insert new delta value
331  ccfg_ModeConfReg |= ((((uint32_t)capArrDelta) << CCFG_MODE_CONF_XOSC_CAPARRAY_DELTA_S ) & CCFG_MODE_CONF_XOSC_CAPARRAY_DELTA_M );
332  // Update the HW register with the new delta value
333  DDI32RegWrite(AUX_DDI0_OSC_BASE, DDI_0_OSC_O_ANABYPASSVAL1, SetupGetTrimForAnabypassValue1( ccfg_ModeConfReg ));
334  }
335 }
uint32_t SetupGetTrimForAnabypassValue1(uint32_t ccfg_ModeConfReg)
Returns the trim value to be used for the ANABYPASS_VALUE1 register in OSC_DIG.
Definition: setup_rom.c:436
void DDI32RegWrite(uint32_t ui32Base, uint32_t ui32Reg, uint32_t ui32Val)
Write a 32 bit value to a register in the DDI slave.
Definition: ddi.c:64
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§ OSC_HPOSC_Debug_InitFreqOffsetParams()

void OSC_HPOSC_Debug_InitFreqOffsetParams ( HposcDebugData_t pDebugData)

Debug function to calculate the HPOSC polynomials for experimental data sets.

Parameters
pDebugDatapointer to the input data collected in HposcDebugData_t
Returns
None
See also
OSC_HPOSCInitializeFrequencyOffsetParameters()
533 {
534  /* Initialize HPOSC internal parameter */
535  hposc_insertions_t hposcMeas;
536  int64_t pu0[3],pu1[3],pu2[3] = {0};
537  hposc_param_t hposcParm =
538  {
539  .pu0b = {42, 32, 27, 20},
540  .pu0c = {-284,-184,536,-104798},
541  .pu1b = {36, 32, 27, 20},
542  .pu1c = {-1155,44130,-319090,-3563},
543  .pu2b = {36, 32, 27, 20},
544  .pu2c = {-3410,261727,-32194,-116627}
545  };
546 
547  /* Retrieve insertions from FCFG */
548  readTempAndFreq((uint32_t)&pDebugData->meas_1, &hposcMeas.temp[0], &hposcMeas.dFreq[0], pDebugData->offsetD1);
549  readTempAndFreq((uint32_t)&pDebugData->meas_2, &hposcMeas.temp[1], &hposcMeas.dFreq[1], pDebugData->offsetD2);
550  readTempAndFreq((uint32_t)&pDebugData->meas_3, &hposcMeas.temp[2], &hposcMeas.dFreq[2], pDebugData->offsetD3);
551 
552  /* Compute HPOSC polynomial coefficients */
553  findHposcPc(hposcParm.pu0c, hposcParm.pu0b, &hposcMeas.temp[0], 3, pu0);
554  findHposcPc(hposcParm.pu1c, hposcParm.pu1b, &hposcMeas.temp[0], 3, pu1);
555  findHposcPc(hposcParm.pu2c, hposcParm.pu2b, &hposcMeas.temp[0], 3, pu2);
556  findHposcCoefficients(&hposcMeas.dFreq[0], pu0, pu1, pu2, &hposcParm);
557 }
uint8_t pu2b[4]
Definition: osc.c:366
int32_t offsetD3
Offset to measurement set 3.
Definition: osc.h:539
int32_t offsetD1
Offset to measurement set 1.
Definition: osc.h:537
int64_t pu0c[4]
Definition: osc.c:367
static void readTempAndFreq(uint32_t regAddr, int32_t *pTemp, int32_t *pdFreq, int32_t deltaFreq)
Definition: osc.c:481
uint32_t meas_1
Measurement set 1 (typically at room temp)
Definition: osc.h:534
Definition: osc.c:356
uint32_t meas_3
Measurement set 3 (typically at low temp)
Definition: osc.h:536
int64_t pu1c[4]
Definition: osc.c:368
int32_t offsetD2
Offset to measurement set 2.
Definition: osc.h:538
static void findHposcCoefficients(int32_t *pInput, int64_t *col0, int64_t *col1, int64_t *col2, hposc_param_t *pParam)
Definition: osc.c:408
static void findHposcPc(int64_t *pCoeff, uint8_t *pBits, int32_t *pTemp, uint8_t nTemp, int64_t *pOutput)
Definition: osc.c:464
uint32_t meas_2
Measurement set 2 (typically at high temp)
Definition: osc.h:535
int32_t dFreq[3]
Definition: osc.c:359
uint8_t pu0b[4]
Definition: osc.c:364
uint8_t pu1b[4]
Definition: osc.c:365
Definition: osc.c:362
int64_t pu2c[4]
Definition: osc.c:369
int32_t temp[3]
Definition: osc.c:358
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§ OSC_HPOSCInitializeFrequencyOffsetParameters()

void OSC_HPOSCInitializeFrequencyOffsetParameters ( void  )

HPOSC initialization function. Must always be called before using HPOSC.

Calculates the fitting curve parameters (polynomials) to be used by the HPOSC temperature compensation.

Returns
None
See also
OSC_HPOSC_Debug_InitFreqOffsetParams(), OSC_HPOSCInitializeSingleInsertionFreqOffsParams()

Referenced by OSC_IsHPOSCEnabledWithHfDerivedLfClock().

502 {
503  /* Initialize HPOSC internal parameter */
504  hposc_insertions_t hposcMeas;
505  int64_t pu0[3],pu1[3],pu2[3] = {0};
506  hposc_param_t hposcParm =
507  {
508  .pu0b = {42, 32, 27, 20},
509  .pu0c = {-284,-184,536,-104798},
510  .pu1b = {36, 32, 27, 20},
511  .pu1c = {-1155,44130,-319090,-3563},
512  .pu2b = {36, 32, 27, 20},
513  .pu2c = {-3410,261727,-32194,-116627}
514  };
515 
516  /* Retrieve insertions from FCFG */
517  readTempAndFreq(FCFG1_BASE + FCFG1_O_HPOSC_MEAS_1, &hposcMeas.temp[0], &hposcMeas.dFreq[0], D1OFFSET_25C);
518  readTempAndFreq(FCFG1_BASE + FCFG1_O_HPOSC_MEAS_2, &hposcMeas.temp[1], &hposcMeas.dFreq[1], D2OFFSET_85C);
519  readTempAndFreq(FCFG1_BASE + FCFG1_O_HPOSC_MEAS_3, &hposcMeas.temp[2], &hposcMeas.dFreq[2], D3OFFSET_n40C);
520 
521  /* Compute HPOSC polynomial coefficients */
522  findHposcPc(hposcParm.pu0c, hposcParm.pu0b, &hposcMeas.temp[0], 3, pu0);
523  findHposcPc(hposcParm.pu1c, hposcParm.pu1b, &hposcMeas.temp[0], 3, pu1);
524  findHposcPc(hposcParm.pu2c, hposcParm.pu2b, &hposcMeas.temp[0], 3, pu2);
525  findHposcCoefficients(&hposcMeas.dFreq[0], pu0, pu1, pu2, &hposcParm);
526 }
uint8_t pu2b[4]
Definition: osc.c:366
int64_t pu0c[4]
Definition: osc.c:367
#define D3OFFSET_n40C
Definition: osc.c:345
static void readTempAndFreq(uint32_t regAddr, int32_t *pTemp, int32_t *pdFreq, int32_t deltaFreq)
Definition: osc.c:481
Definition: osc.c:356
#define D2OFFSET_85C
Definition: osc.c:344
int64_t pu1c[4]
Definition: osc.c:368
static void findHposcCoefficients(int32_t *pInput, int64_t *col0, int64_t *col1, int64_t *col2, hposc_param_t *pParam)
Definition: osc.c:408
static void findHposcPc(int64_t *pCoeff, uint8_t *pBits, int32_t *pTemp, uint8_t nTemp, int64_t *pOutput)
Definition: osc.c:464
int32_t dFreq[3]
Definition: osc.c:359
uint8_t pu0b[4]
Definition: osc.c:364
uint8_t pu1b[4]
Definition: osc.c:365
Definition: osc.c:362
int64_t pu2c[4]
Definition: osc.c:369
int32_t temp[3]
Definition: osc.c:358
#define D1OFFSET_25C
Definition: osc.c:343
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§ OSC_HPOSCInitializeSingleInsertionFreqOffsParams()

void OSC_HPOSCInitializeSingleInsertionFreqOffsParams ( uint32_t  measFieldAddress)

Special HPOSC initialization function for single temperature compensation.

Used when a single temperature offset measurement is available. This is espesially designed to get a better crystal performance (SW TCXO) on the SiP module but can also be usful to get better crystal performance over the entire temperature range on a standard design as well.

Returns
None
See also
OSC_HPOSCInitializeFrequencyOffsetParameters()
566 {
567  /* Initialize HPOSC internal parameter */
568  hposc_insertions_t hposcMeas;
569  int64_t pu0;
570  hposc_param_t hposcParm =
571  {
572  /* Coefficients for SW-TCXO */
573  .pu0b = {44, 44, 27, 20},
574  .pu0c = {8183, -2546, -210, -104866}
575  };
576 
577  /* Retrieve insertions from FCFG */
578  readTempAndFreq( measFieldAddress, &hposcMeas.temp[0], &hposcMeas.dFreq[0], 0);
579 
580  /* Compute HPOSC polynomial coefficients */
581  findHposcPc(hposcParm.pu0c, hposcParm.pu0b, &hposcMeas.temp[0], 1, &pu0);
582  findHposcCoefficients(&hposcMeas.dFreq[0], &pu0, NULL, NULL, &hposcParm);
583 }
int64_t pu0c[4]
Definition: osc.c:367
static void readTempAndFreq(uint32_t regAddr, int32_t *pTemp, int32_t *pdFreq, int32_t deltaFreq)
Definition: osc.c:481
Definition: osc.c:356
static void findHposcCoefficients(int32_t *pInput, int64_t *col0, int64_t *col1, int64_t *col2, hposc_param_t *pParam)
Definition: osc.c:408
static void findHposcPc(int64_t *pCoeff, uint8_t *pBits, int32_t *pTemp, uint8_t nTemp, int64_t *pOutput)
Definition: osc.c:464
int32_t dFreq[3]
Definition: osc.c:359
uint8_t pu0b[4]
Definition: osc.c:364
Definition: osc.c:362
int32_t temp[3]
Definition: osc.c:358
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§ OSC_HPOSCRelativeFrequencyOffsetGet()

int32_t OSC_HPOSCRelativeFrequencyOffsetGet ( int32_t  tempDegC)

Calculate the temperature dependent relative frequency offset of HPOSC.

The HPOSC (High Precision Oscillator) frequency will vary slightly with chip temperature. The frequency offset from the nominal value can be predicted based on second order linear interpolation using coefficients measured in chip production and stored as factory configuration parameters.

This function calculates the relative frequency offset, defined as:

    F_HPOSC = F_nom * (1 + d/(2^22))

where

  • F_HPOSC is the current HPOSC frequency.
  • F_nom is the nominal oscillator frequency, assumed to be 48.000 MHz.
  • d is the relative frequency offset (the value returned).

By knowing the relative frequency offset it is then possible to compensate any timing related values accordingly.

Parameters
tempDegCis the chip temperature in degrees Celsius. Use the function AONBatMonTemperatureGetDegC() to get current chip temperature.
Returns
Returns the relative frequency offset parameter d.
See also
OSC_HPOSCRelativeFrequencyOffsetToRFCoreFormatConvert(), AONBatMonTemperatureGetDegC()
592 {
593  // Estimate HPOSC frequency offset, using temperature and curve fitting parameters
594 
595  // Now we can find the HPOSC freq offset, given as a signed variable d, expressed by:
596  //
597  // F_HPOSC = F_nom * (1 + d/(2^22)) , where: F_HPOSC = HPOSC frequency
598  // F_nom = nominal clock source frequency (e.g. 48.000 MHz)
599  // d = describes relative freq offset
600 
601  // We can estimate the d variable, using temperature compensation parameters:
602  //
603  // d = P[3]*(t - T0)^3 + P[2]*(t - T0)^2 + P[1]*(t - T0) + P[0], where: P0,P1,P2,P3 are curve fitting parameters
604  // t = current temperature (from temp sensor) in deg C
605  // T0 = 27 deg C (fixed temperature constant)
606 
607  int32_t d,t1,t2,t3;
608 
609  t1 = tempDegC - 27;
610  t2 = t1 * t1;
611  t3 = t2 * t1;
612 
613  d = ((((int64_t)_hposcCoeffs[3]*t3 + (int64_t)_hposcCoeffs[2]*t2 + (int64_t)_hposcCoeffs[1]*t1) >> HPOSC_COEFF0_SHIFT) +
614  (int64_t)_hposcCoeffs[0]) >> HPOSC_COEFF0_BITS;
615 
616  return ( d );
617 }
#define HPOSC_COEFF0_SHIFT
Definition: osc.c:350
#define HPOSC_COEFF0_BITS
Definition: osc.c:348
int32_t _hposcCoeffs[4]
Definition: osc.c:354

§ OSC_HPOSCRelativeFrequencyOffsetToRFCoreFormatConvert()

int16_t OSC_HPOSCRelativeFrequencyOffsetToRFCoreFormatConvert ( int32_t  HPOSC_RelFreqOffset)

Converts the relative frequency offset of HPOSC to the RF Core parameter format.

The HPOSC (High Precision Oscillator) clock is used by the RF Core. To compensate for a frequency offset in the frequency of the clock source, a frequency offset parameter can be provided as part of the radio configuration override setting list to enable compensation of the RF synthesizer frequency, symbol timing, and radio timer to still achieve correct frequencies.

The RF Core takes a relative frequency offset parameter defined differently compared to the relative frequency offset parameter returned from function OSC_HPOSCRelativeFrequencyOffsetGet() and thus needs to be converted:

    F_nom = F_HPOSC * (1 + RfCoreRelFreqOffset/(2^22))

where

  • F_nom is the nominal oscillator frequency, assumed to be 48.000 MHz.
  • F_HPOSC is the current HPOSC frequency.
  • RfCoreRelFreqOffset is the relative frequency offset in the "RF Core" format (the value returned).
Parameters
HPOSC_RelFreqOffsetis the relative frequency offset parameter d returned from OSC_HPOSCRelativeFrequencyOffsetGet()
Returns
Returns the relative frequency offset in RF Core format.
See also
OSC_HPOSCRelativeFrequencyOffsetGet()
626 {
627  // The input argument, hereby referred to simply as "d", describes the frequency offset
628  // of the HPOSC relative to the nominal frequency in this way:
629  //
630  // F_HPOSC = F_nom * (1 + d/(2^22))
631  //
632  // But for use by the radio, to compensate the frequency error, we need to find the
633  // frequency offset "rfcFreqOffset" defined in the following format:
634  //
635  // F_nom = F_HPOSC * (1 + rfCoreFreqOffset/(2^22))
636  //
637  // To derive "rfCoreFreqOffset" from "d" we combine the two above equations and get:
638  //
639  // (1 + rfCoreFreqOffset/(2^22)) = (1 + d/(2^22))^-1
640  //
641  // Which can be rewritten into:
642  //
643  // rfCoreFreqOffset = -d*(2^22) / ((2^22) + d)
644  //
645  // = -d * [ 1 / (1 + d/(2^22)) ]
646  //
647  // To avoid doing a 64-bit division due to the (1 + d/(2^22))^-1 expression,
648  // we can use Taylor series (Maclaurin series) to approximate it:
649  //
650  // 1 / (1 - x) ~= 1 + x + x^2 + x^3 + x^4 + ... etc (Maclaurin series)
651  //
652  // In our case, we have x = - d/(2^22), and we only include up to the first
653  // order term of the series, as the second order term ((d^2)/(2^44)) is very small:
654  //
655  // freqError ~= -d + d^2/(2^22) (+ small approximation error)
656  //
657  // The approximation error is negligible for our use.
658 
659  int32_t rfCoreFreqOffset = -HPOSC_RelFreqOffset + (( HPOSC_RelFreqOffset * HPOSC_RelFreqOffset ) >> 22 );
660 
661  return ( rfCoreFreqOffset );
662 }

§ OSC_HPOSCRtcCompensate()

void OSC_HPOSCRtcCompensate ( int32_t  relFreqOffset)

Compensate the RTC increment based on the relative frequency offset of HPOSC.

The HPOSC (High Precision Oscillator) frequency will vary slightly with chip temperature. This variation forces the RTC increment to be compensated if SCLK_LF is configured to be derived from the HF clock of HPOSC. This function must only be called if SCLK_LF is configured to be derived from the HF clock of HPOSC. The status of this configuration can be determined by calling the OSC_IsHPOSCEnabledWithHfDerivedLfClock() function.

This function first calculates the HPOSC frequency, defined as:

    F_HPOSC = F_nom * (1 + d/(2^22))

where

  • F_HPOSC is the current HPOSC frequency.
  • F_nom is the nominal oscillator frequency, assumed to be 48.000 MHz.
  • d is the relative frequency offset given by the input argument relFreqOffset. Then the SCLK_LF frequency is calculated, defined as:
        F_SCLK_LF = F_HPOSC / 1536
    
    Then the RTC increment SUBSECINC is calculated, defined as;
        SUBSECINC = (2^38) / F_SCLK_LF
    
    Finally the RTC module is updated with the calculated SUBSECINC value.
Parameters
relFreqOffsetis the relative frequency offset parameter d returned from OSC_HPOSCRelativeFrequencyOffsetGet()
Returns
None
671 {
672  uint32_t rtcSubSecInc;
673  uint32_t lfClkFrequency;
674  uint32_t hfFreq;
675  int64_t calcFactor;
676 
677  // Calculate SCLK_HF frequency, defined as:
678  // hfFreq = 48000000 * (1 + relFreqOffset/(2^22))
679  if( relFreqOffset >= 0 )
680  {
681  calcFactor = ( ( 48000000 * (int64_t)relFreqOffset ) + 0x200000 ) / 0x400000;
682  }
683  else
684  {
685  calcFactor = ( ( 48000000 * (int64_t)relFreqOffset ) - 0x200000 ) / 0x400000;
686  }
687  hfFreq = 48000000 + calcFactor;
688 
689  // Calculate SCLK_LF frequency, defined as SCLK_LF_FREQ = SCLK_HF_FREQ / 1536
690  lfClkFrequency = ( hfFreq + 768 ) / 1536;
691 
692  // Calculate SUBSECINC, defined as: SUBSECINC = 2^38 / SCLK_LF_FREQ
693  rtcSubSecInc = 0x4000000000 / lfClkFrequency;
694 
695  /* Update SUBSECINC value */
696  SetupSetAonRtcSubSecInc(rtcSubSecInc);
697 }
void SetupSetAonRtcSubSecInc(uint32_t subSecInc)
Doing the tricky stuff needed to enter new RTCSUBSECINC value.
Definition: setup_rom.c:927
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§ OSC_IsHPOSCEnabled()

static bool OSC_IsHPOSCEnabled ( void  )
inlinestatic

Identifies if HPOSC is enabled.

This function checks if the device supports HPOSC and that HPOSC is selected as HF oscillator for use when the radio is active.

Returns
Returns status of HPOSC functionality:
  • true : HPOSC is enabled.
  • false : HPOSC is not enabled.
352 {
353  bool enabled = false;
354 
355  if((( HWREG(CCFG_BASE + CCFG_O_MODE_CONF) & CCFG_MODE_CONF_XOSC_FREQ_M) == CCFG_MODE_CONF_XOSC_FREQ_HPOSC) &&
356  (( HWREG(FCFG1_BASE + FCFG1_O_OSC_CONF) & FCFG1_OSC_CONF_HPOSC_OPTION) == 0))
357  {
358  enabled = true;
359  }
360 
361  return (enabled);
362 }

§ OSC_IsHPOSCEnabledWithHfDerivedLfClock()

static bool OSC_IsHPOSCEnabledWithHfDerivedLfClock ( void  )
inlinestatic

Identifies if HPOSC is enabled and that SCLK_LF is derived from XOSC_HF.

This function checks if the device supports HPOSC and that HPOSC is selected as HF oscillator for use when the radio is active and also that SCLK_LF is derived from XOSC_HF.

Returns
Returns status of HPOSC and SCLK_LF configuration:
  • true : HPOSC is enabled and SCLK_LF is derived from XOSC_HF.
  • false : Either HPOSC not enabled or SCLK_LF is not derived from XOSC_HF.
379 {
380  bool enabled = false;
381 
382  // Check configuration by reading lower half of the 32-bit CTL0 register
383  uint16_t regVal = HWREGH(AUX_DDI0_OSC_BASE + DDI_0_OSC_O_CTL0);
384  if( ( ( regVal & DDI_0_OSC_CTL0_SCLK_LF_SRC_SEL_M ) == DDI_0_OSC_CTL0_SCLK_LF_SRC_SEL_XOSCHFDLF ) &&
385  ( ( regVal & DDI_0_OSC_CTL0_HPOSC_MODE_EN_M ) == DDI_0_OSC_CTL0_HPOSC_MODE_EN ) )
386  {
387  enabled = true;
388  }
389 
390  return (enabled);
391 }
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§ OSCClockLossEventDisable()

static void OSCClockLossEventDisable ( void  )
inlinestatic

Disables OSC clock loss event detection.

Disabling the OSC clock loss event does also clear the clock loss event flag.

Note
OSC clock loss event must be disabled before SCLK_LF clock source is changed (by calling OSCClockSourceSet()) and remain disabled until the change is confirmed (by calling OSCClockSourceGet()).
Returns
None
See also
OSCClockLossEventEnable()
203 {
204  DDI16BitfieldWrite( AUX_DDI0_OSC_BASE, DDI_0_OSC_O_CTL0,
205  DDI_0_OSC_CTL0_CLK_LOSS_EN_M,
206  DDI_0_OSC_CTL0_CLK_LOSS_EN_S, 0 );
207 }
void DDI16BitfieldWrite(uint32_t ui32Base, uint32_t ui32Reg, uint32_t ui32Mask, uint32_t ui32Shift, uint16_t ui32Data)
Write a bit field via the DDI using 16-bit maskable write.
Definition: ddi.c:115
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§ OSCClockLossEventEnable()

static void OSCClockLossEventEnable ( void  )
inlinestatic

Enables OSC clock loss event detection.

Enables the clock loss event flag to be raised if a clock loss is detected.

Note
OSC clock loss event must be disabled before SCLK_LF clock source is changed (by calling OSCClockSourceSet()) and remain disabled until the change is confirmed (by calling OSCClockSourceGet()).
Returns
None
See also
OSCClockLossEventDisable()
180 {
181  DDI16BitfieldWrite( AUX_DDI0_OSC_BASE, DDI_0_OSC_O_CTL0,
182  DDI_0_OSC_CTL0_CLK_LOSS_EN_M,
183  DDI_0_OSC_CTL0_CLK_LOSS_EN_S, 1 );
184 }
void DDI16BitfieldWrite(uint32_t ui32Base, uint32_t ui32Reg, uint32_t ui32Mask, uint32_t ui32Shift, uint16_t ui32Data)
Write a bit field via the DDI using 16-bit maskable write.
Definition: ddi.c:115
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§ OSCClockSourceGet()

uint32_t OSCClockSourceGet ( uint32_t  ui32SrcClk)

Get the source clock settings.

Use this function to get the oscillator source for one of the system source clocks.

Parameters
ui32SrcClkis the source clock to check.
Returns
Returns the type of oscillator that drives the clock source.
See also
OSCClockSourceSet(), OSCHfSourceSwitch()

Referenced by OSCClockLossEventDisable(), OSCHF_AttemptToSwitchToXosc(), OSCHF_SwitchToRcOscTurnOffXosc(), and SetupAfterColdResetWakeupFromShutDownCfg3().

151 {
152  uint32_t ui32ClockSource;
153 
154  // Check the arguments.
155  ASSERT((ui32SrcClk & OSC_SRC_CLK_LF) ||
156  (ui32SrcClk & OSC_SRC_CLK_HF));
157 
158  // Return the source for the selected clock.
159  if(ui32SrcClk == OSC_SRC_CLK_LF)
160  {
161  ui32ClockSource = DDI16BitfieldRead(AUX_DDI0_OSC_BASE, DDI_0_OSC_O_STAT0,
162  DDI_0_OSC_STAT0_SCLK_LF_SRC_M,
163  DDI_0_OSC_STAT0_SCLK_LF_SRC_S);
164  }
165  else
166  {
167  ui32ClockSource = DDI16BitfieldRead(AUX_DDI0_OSC_BASE, DDI_0_OSC_O_STAT0,
168  DDI_0_OSC_STAT0_SCLK_HF_SRC_M,
169  DDI_0_OSC_STAT0_SCLK_HF_SRC_S);
170  }
171  return ( ui32ClockSource );
172 }
#define OSC_SRC_CLK_HF
Definition: osc.h:118
#define OSC_SRC_CLK_LF
Definition: osc.h:119
uint16_t DDI16BitfieldRead(uint32_t ui32Base, uint32_t ui32Reg, uint32_t ui32Mask, uint32_t ui32Shift)
Read a bit field via the DDI using 16-bit read.
Definition: ddi.c:183
#define ASSERT(expr)
Definition: debug.h:71
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§ OSCClockSourceSet()

void OSCClockSourceSet ( uint32_t  ui32SrcClk,
uint32_t  ui32Osc 
)

Configure the oscillator input to the a source clock.

Use this function to set the oscillator source for one or more of the system source clocks.

When selecting the high frequency clock source (OSC_SRC_CLK_HF), this function will not do the actual switch. Enabling the high frequency XTAL can take several hundred micro seconds, so the actual switch is done in a separate function, OSCHfSourceSwitch(), leaving System CPU free to perform other tasks as the XTAL starts up.

Note
The High Frequency (OSC_SRC_CLK_HF) can only be derived from the high frequency oscillator. The Low Frequency source clock (OSC_SRC_CLK_LF) can be derived from all 4 oscillators.
If enabling OSC_XOSC_LF it is not safe to go to powerdown/shutdown until the LF clock is running which can be checked using OSCClockSourceGet().
Clock loss reset generation must be disabled before SCLK_LF (OSC_SRC_CLK_LF) clock source is changed and remain disabled until the change is confirmed.
Parameters
ui32SrcClkis the source clocks to configure.
ui32Oscis the oscillator that drives the source clock.
See also
OSCClockSourceGet(), OSCHfSourceSwitch()
Returns
None

Referenced by OSCClockLossEventDisable(), OSCHF_SwitchToRcOscTurnOffXosc(), OSCHF_TurnOnXosc(), and SetupAfterColdResetWakeupFromShutDownCfg3().

114 {
115  // Check the arguments.
116  ASSERT((ui32SrcClk & OSC_SRC_CLK_LF) ||
117  (ui32SrcClk & OSC_SRC_CLK_HF));
118  ASSERT((ui32Osc == OSC_RCOSC_HF) ||
119  (ui32Osc == OSC_RCOSC_LF) ||
120  (ui32Osc == OSC_XOSC_HF) ||
121  (ui32Osc == OSC_XOSC_LF));
122 
123  // Request the high frequency source clock (using 24 MHz XTAL)
124  if(ui32SrcClk & OSC_SRC_CLK_HF)
125  {
126  // Enable the HF XTAL as HF clock source
127  DDI16BitfieldWrite(AUX_DDI0_OSC_BASE, DDI_0_OSC_O_CTL0,
128  DDI_0_OSC_CTL0_SCLK_HF_SRC_SEL_M,
129  DDI_0_OSC_CTL0_SCLK_HF_SRC_SEL_S,
130  ui32Osc);
131  }
132 
133  // Configure the low frequency source clock.
134  if(ui32SrcClk & OSC_SRC_CLK_LF)
135  {
136  // Change the clock source.
137  DDI16BitfieldWrite(AUX_DDI0_OSC_BASE, DDI_0_OSC_O_CTL0,
138  DDI_0_OSC_CTL0_SCLK_LF_SRC_SEL_M,
139  DDI_0_OSC_CTL0_SCLK_LF_SRC_SEL_S,
140  ui32Osc);
141  }
142 }
void DDI16BitfieldWrite(uint32_t ui32Base, uint32_t ui32Reg, uint32_t ui32Mask, uint32_t ui32Shift, uint16_t ui32Data)
Write a bit field via the DDI using 16-bit maskable write.
Definition: ddi.c:115
#define OSC_SRC_CLK_HF
Definition: osc.h:118
#define OSC_RCOSC_HF
Definition: osc.h:121
#define OSC_XOSC_HF
Definition: osc.h:122
#define OSC_SRC_CLK_LF
Definition: osc.h:119
#define ASSERT(expr)
Definition: debug.h:71
#define OSC_RCOSC_LF
Definition: osc.h:123
#define OSC_XOSC_LF
Definition: osc.h:124
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§ OSCHF_AttemptToSwitchToXosc()

bool OSCHF_AttemptToSwitchToXosc ( void  )

Switch to XOSC_HF if XOSC_HF is ready.

This is a non-blocking function checking if the XOSC_HF is ready and performs the switching if ready. The function is somewhat blocking in the case where switching is performed.

Returns
Returns status of the XOSC_HF switching:
  • true : Switching to XOSC_HF has occurred.
  • false : Switching has not occurred.

Referenced by OSC_IsHPOSCEnabledWithHfDerivedLfClock(), and OSCHF_DebugGetCrystalStartupTime().

258 {
259  uint32_t startupTimeInUs;
260  uint32_t prevLimmit25InUs;
261 
262 #if ( defined( ROM_OSCClockSourceGet ))
264 #else
266 #endif
267  {
268  // Already on XOSC - nothing to do
269  return ( 1 );
270  }
271  if ( OSCHfSourceReady()) {
273 
274  // Store startup time, but limit to 25 percent reduction each time.
277  prevLimmit25InUs = oscHfGlobals.previousStartupTimeInUs;
278  prevLimmit25InUs -= ( prevLimmit25InUs >> 2 ); // 25 percent margin
279  oscHfGlobals.previousStartupTimeInUs = startupTimeInUs;
280  if ( prevLimmit25InUs > startupTimeInUs ) {
281  oscHfGlobals.previousStartupTimeInUs = prevLimmit25InUs;
282  }
283  return ( 1 );
284  }
285  return ( 0 );
286 }
static void OSCHfSourceSwitch(void)
Switch the high frequency clock.
Definition: osc.h:313
#define ROM_OSCClockSourceGet
Definition: rom.h:812
uint32_t timeXoscStable_CV
Definition: osc.c:101
uint32_t OSCClockSourceGet(uint32_t ui32SrcClk)
Get the source clock settings.
Definition: osc.c:150
#define OSC_SRC_CLK_HF
Definition: osc.h:118
static bool OSCHfSourceReady(void)
Check if the HF clock source is ready to be switched.
Definition: osc.h:285
#define OSC_XOSC_HF
Definition: osc.h:122
uint32_t previousStartupTimeInUs
Definition: osc.c:98
static OscHfGlobals_t oscHfGlobals
Definition: osc.c:105
uint32_t timeXoscOn_CV
Definition: osc.c:100
#define RTC_CV_TO_US(x)
Definition: osc.c:95
static uint32_t AONRTCCurrentCompareValueGet(void)
Get the current value of the RTC counter in a format that matches RTC compare values.
Definition: aon_rtc.h:818
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§ OSCHF_DebugGetCrystalAmplitude()

uint32_t OSCHF_DebugGetCrystalAmplitude ( void  )

Get crystal amplitude (assuming crystal is running).

Note
This is a debug function only. It is hence not recommended to call this function in normal operation.

This function uses an on-chip ADC and peak detector for reading the crystal amplitude. The measurement time is set to 4 milliseconds and this function does not return before the measurement is done.

Expected value is OSCHF_DebugGetExpectedAverageCrystalAmplitude +/- 50 millivolt.

Returns
Returns crystal amplitude in millivolt.
See also
OSCHF_DebugGetExpectedAverageCrystalAmplitude()

Referenced by OSC_IsHPOSCEnabledWithHfDerivedLfClock().

706 {
707  uint32_t oscCfgRegCopy ;
708  uint32_t startTime ;
709  uint32_t deltaTime ;
710  uint32_t ampValue ;
711 
712  // The specified method is as follows:
713  // 1. Set minimum interval between oscillator amplitude calibrations.
714  // (Done by setting PER_M=0 and PER_E=1)
715  // 2. Wait approximately 4 milliseconds in order to measure over a
716  // moderately large number of calibrations.
717  // 3. Read out the crystal amplitude value from the peek detector.
718  // 4. Restore original oscillator amplitude calibrations interval.
719  // 5. Return crystal amplitude value converted to millivolt.
720  oscCfgRegCopy = HWREG( AON_PMCTL_BASE + AON_PMCTL_O_OSCCFG );
721  HWREG( AON_PMCTL_BASE + AON_PMCTL_O_OSCCFG ) = ( 1 << AON_PMCTL_OSCCFG_PER_E_S );
722  startTime = AONRTCCurrentCompareValueGet();
723  do {
724  deltaTime = AONRTCCurrentCompareValueGet() - startTime;
725  } while ( deltaTime < ((uint32_t)( 0.004 * FACTOR_SEC_TO_COMP_VAL_FORMAT )));
726  ampValue = ( HWREG( AUX_DDI0_OSC_BASE + DDI_0_OSC_O_STAT1 ) &
727  DDI_0_OSC_STAT1_HPM_UPDATE_AMP_M ) >>
728  DDI_0_OSC_STAT1_HPM_UPDATE_AMP_S ;
729  HWREG( AON_PMCTL_BASE + AON_PMCTL_O_OSCCFG ) = oscCfgRegCopy;
730 
731  return ( ampValue * 15 );
732 }
#define FACTOR_SEC_TO_COMP_VAL_FORMAT
Definition: aon_rtc.h:149
static uint32_t AONRTCCurrentCompareValueGet(void)
Get the current value of the RTC counter in a format that matches RTC compare values.
Definition: aon_rtc.h:818
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§ OSCHF_DebugGetCrystalStartupTime()

uint32_t OSCHF_DebugGetCrystalStartupTime ( void  )

Measure the crystal startup time.

Note
This is a debug function that should not be needed in normal operation.

This function assumes that the chip is running on RCOSC_HF when called. It then switches to XOSC_HF while measuring number of LF-clock edges before XOSC_HF has started and are ready to be used. After that, the function switches back to RCOSC_HF and returns number of LF-edges found.

The length in time between the LF clock edges is approximately 15 microseconds. Or more exactly: LF_clock_edges / ( 32768 * 2 ) seconds.

Please note that the startup time, in addition to the crystal itself also can vary depending on the time since the crystal was stopped and the frequency of the RCOSC_HF oscillator. Calling this function intensively will show a shorter startup time than in typical use cases. When running with TI-RTOS there is a background task (optional but default on) adjusting RCOSC_HF to be as equal as possible to the crystal frequency, giving the shortest possible startup time.

Returns
Returns number of LF-clock edges from starting the crystal until it's ready to be used.

Referenced by OSC_IsHPOSCEnabledWithHfDerivedLfClock().

761 {
762  uint32_t lfEdgesFound = 0 ;
763 
764  // Start operation in sync with the LF clock
765  HWREG( AON_RTC_BASE + AON_RTC_O_SYNCLF );
766 
768  while ( ! OSCHF_AttemptToSwitchToXosc() ) {
769  HWREG( AON_RTC_BASE + AON_RTC_O_SYNCLF );
770  lfEdgesFound ++ ;
771  }
773 
774  return ( lfEdgesFound );
775 }
bool OSCHF_AttemptToSwitchToXosc(void)
Switch to XOSC_HF if XOSC_HF is ready.
Definition: osc.c:257
void OSCHF_SwitchToRcOscTurnOffXosc(void)
Switch to RCOSC_HF and turn off XOSC_HF.
Definition: osc.c:295
void OSCHF_TurnOnXosc(void)
Turns on XOSC_HF (but without switching to XOSC_HF).
Definition: osc.c:240
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§ OSCHF_DebugGetExpectedAverageCrystalAmplitude()

uint32_t OSCHF_DebugGetExpectedAverageCrystalAmplitude ( void  )

Get the expected average crystal amplitude.

Note
This is a debug function only. It is hence not recommended to call this function in normal operation.

This function read the configured high and low thresholds and returns the mean value converted to millivolt.

Returns
Returns expected average crystal amplitude in millivolt.
See also
OSCHF_DebugGetCrystalAmplitude()

Referenced by OSC_IsHPOSCEnabledWithHfDerivedLfClock().

741 {
742  uint32_t ampCompTh1 ;
743  uint32_t highThreshold ;
744  uint32_t lowThreshold ;
745 
746  ampCompTh1 = HWREG( AUX_DDI0_OSC_BASE + DDI_0_OSC_O_AMPCOMPTH1 );
747  highThreshold = ( ampCompTh1 & DDI_0_OSC_AMPCOMPTH1_HPMRAMP3_HTH_M ) >>
748  DDI_0_OSC_AMPCOMPTH1_HPMRAMP3_HTH_S ;
749  lowThreshold = ( ampCompTh1 & DDI_0_OSC_AMPCOMPTH1_HPMRAMP3_LTH_M ) >>
750  DDI_0_OSC_AMPCOMPTH1_HPMRAMP3_LTH_S ;
751 
752  return ((( highThreshold + lowThreshold ) * 15 ) >> 1 );
753 }

§ OSCHF_GetStartupTime()

uint32_t OSCHF_GetStartupTime ( uint32_t  timeUntilWakeupInMs)

Returns maximum startup time (in microseconds) of XOSC_HF.

The startup time depends on several factors. This function calculates the maximum startup time based on statistical information.

Parameters
timeUntilWakeupInMsindicates how long time (milliseconds) to the startup will occur.
Returns
Time margin to use in microseconds.

Referenced by OSC_IsHPOSCEnabledWithHfDerivedLfClock().

181 {
182  uint32_t deltaTimeSinceXoscOnInMs ;
183  int32_t deltaTempSinceXoscOn ;
184  uint32_t newStartupTimeInUs ;
185 
186  // Check CCFG to determine if device is configured for TCXO.
187  if( ( HWREG( CCFG_BASE + CCFG_O_MODE_CONF ) & CCFG_MODE_CONF_XOSC_FREQ_M ) == CCFG_MODE_CONF_XOSC_FREQ_TCXO )
188  {
189  // Device configured for TCXO. Report fixed startup time located in CCFG with
190  // coversion from number of 100us to number of us.
191  newStartupTimeInUs = (( HWREG( CCFG_BASE + CCFG_O_MODE_CONF_1 ) & CCFG_MODE_CONF_1_TCXO_MAX_START_M ) >>
192  CCFG_MODE_CONF_1_TCXO_MAX_START_S ) * 100;
193  }
194  else
195  {
196  deltaTimeSinceXoscOnInMs = RTC_CV_TO_MS( AONRTCCurrentCompareValueGet() - oscHfGlobals.timeXoscOn_CV );
197  deltaTempSinceXoscOn = AONBatMonTemperatureGetDegC() - oscHfGlobals.tempXoscOff;
198 
199  if ( deltaTempSinceXoscOn < 0 ) {
200  deltaTempSinceXoscOn = -deltaTempSinceXoscOn;
201  }
202 
203  if ( (( timeUntilWakeupInMs + deltaTimeSinceXoscOnInMs ) > 3000 ) ||
204  ( deltaTempSinceXoscOn > 5 ) ||
207  {
208  newStartupTimeInUs = 2000;
209  if (( HWREG( CCFG_BASE + CCFG_O_SIZE_AND_DIS_FLAGS ) & CCFG_SIZE_AND_DIS_FLAGS_DIS_XOSC_OVR_M ) == 0 ) {
210  newStartupTimeInUs = (( HWREG( CCFG_BASE + CCFG_O_MODE_CONF_1 ) &
211  CCFG_MODE_CONF_1_XOSC_MAX_START_M ) >>
212  CCFG_MODE_CONF_1_XOSC_MAX_START_S ) * 125;
213  // Note: CCFG startup time is "in units of 100us" adding 25% margin results in *125
214  }
215  } else {
217  newStartupTimeInUs += ( newStartupTimeInUs >> 2 ); // Add 25 percent margin
218  if ( newStartupTimeInUs < oscHfGlobals.previousStartupTimeInUs ) {
219  newStartupTimeInUs = oscHfGlobals.previousStartupTimeInUs;
220  }
221  }
222 
223  if ( newStartupTimeInUs < 200 ) {
224  newStartupTimeInUs = 200;
225  }
226  if ( newStartupTimeInUs > 4000 ) {
227  newStartupTimeInUs = 4000;
228  }
229  }
230  return ( newStartupTimeInUs );
231 }
uint32_t timeXoscStable_CV
Definition: osc.c:101
int32_t AONBatMonTemperatureGetDegC(void)
Get the current temperature measurement as a signed value in Deg Celsius.
Definition: aon_batmon.c:58
uint32_t previousStartupTimeInUs
Definition: osc.c:98
static OscHfGlobals_t oscHfGlobals
Definition: osc.c:105
int32_t tempXoscOff
Definition: osc.c:102
uint32_t timeXoscOn_CV
Definition: osc.c:100
#define RTC_CV_TO_US(x)
Definition: osc.c:95
static uint32_t AONRTCCurrentCompareValueGet(void)
Get the current value of the RTC counter in a format that matches RTC compare values.
Definition: aon_rtc.h:818
#define RTC_CV_TO_MS(x)
Definition: osc.c:94
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§ OSCHF_SwitchToRcOscTurnOffXosc()

void OSCHF_SwitchToRcOscTurnOffXosc ( void  )

Switch to RCOSC_HF and turn off XOSC_HF.

This operation takes approximately 50 microseconds (can be shorter if RCOSC_HF already was running).

Returns
None

Referenced by OSC_IsHPOSCEnabledWithHfDerivedLfClock(), and OSCHF_DebugGetCrystalStartupTime().

296 {
297 #if ( defined( ROM_OSCClockSourceSet ))
299 #else
301 #endif
302 
303  // Do the switching if not already running on RCOSC_HF
304 #if ( defined( ROM_OSCClockSourceGet ))
306 #else
308 #endif
309  {
311  }
312 
315 }
static void OSCHfSourceSwitch(void)
Switch the high frequency clock.
Definition: osc.h:313
#define ROM_OSCClockSourceSet
Definition: rom.h:816
uint32_t timeXoscOff_CV
Definition: osc.c:99
#define ROM_OSCClockSourceGet
Definition: rom.h:812
int32_t AONBatMonTemperatureGetDegC(void)
Get the current temperature measurement as a signed value in Deg Celsius.
Definition: aon_batmon.c:58
uint32_t OSCClockSourceGet(uint32_t ui32SrcClk)
Get the source clock settings.
Definition: osc.c:150
#define OSC_SRC_CLK_HF
Definition: osc.h:118
#define OSC_RCOSC_HF
Definition: osc.h:121
static OscHfGlobals_t oscHfGlobals
Definition: osc.c:105
int32_t tempXoscOff
Definition: osc.c:102
void OSCClockSourceSet(uint32_t ui32SrcClk, uint32_t ui32Osc)
Configure the oscillator input to the a source clock.
Definition: osc.c:113
static uint32_t AONRTCCurrentCompareValueGet(void)
Get the current value of the RTC counter in a format that matches RTC compare values.
Definition: aon_rtc.h:818
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§ OSCHF_TurnOnXosc()

void OSCHF_TurnOnXosc ( void  )

Turns on XOSC_HF (but without switching to XOSC_HF).

This function simply indicates the need for XOSC_HF to the hardware which initiates the XOSC_HF startup.

Returns
None

Referenced by OSC_IsHPOSCEnabledWithHfDerivedLfClock(), and OSCHF_DebugGetCrystalStartupTime().

241 {
242 #if ( defined( ROM_OSCClockSourceSet ))
244 #else
246 #endif
248 }
#define ROM_OSCClockSourceSet
Definition: rom.h:816
#define OSC_SRC_CLK_HF
Definition: osc.h:118
#define OSC_XOSC_HF
Definition: osc.h:122
static OscHfGlobals_t oscHfGlobals
Definition: osc.c:105
uint32_t timeXoscOn_CV
Definition: osc.c:100
void OSCClockSourceSet(uint32_t ui32SrcClk, uint32_t ui32Osc)
Configure the oscillator input to the a source clock.
Definition: osc.c:113
static uint32_t AONRTCCurrentCompareValueGet(void)
Get the current value of the RTC counter in a format that matches RTC compare values.
Definition: aon_rtc.h:818
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§ OSCHfSourceReady()

static bool OSCHfSourceReady ( void  )
inlinestatic

Check if the HF clock source is ready to be switched.

If a request to switch the HF clock source has been made, this function can be used to check if the clock source is ready to be switched.

Once the HF clock source is ready the switch can be performed by calling the OSCHfSourceSwitch()

Returns
Returns status of HF clock source:
  • true : HF clock source is ready.
  • false : HF clock source is not ready.

Referenced by OSCHF_AttemptToSwitchToXosc().

286 {
287  // Return the readiness of the HF clock source
288  return (DDI16BitfieldRead(AUX_DDI0_OSC_BASE, DDI_0_OSC_O_STAT0,
289  DDI_0_OSC_STAT0_PENDINGSCLKHFSWITCHING_M,
290  DDI_0_OSC_STAT0_PENDINGSCLKHFSWITCHING_S)) ?
291  true : false;
292 }
uint16_t DDI16BitfieldRead(uint32_t ui32Base, uint32_t ui32Reg, uint32_t ui32Mask, uint32_t ui32Shift)
Read a bit field via the DDI using 16-bit read.
Definition: ddi.c:183
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§ OSCHfSourceSwitch()

static void OSCHfSourceSwitch ( void  )
inlinestatic

Switch the high frequency clock.

When switching the HF clock source the clock period might be prolonged leaving the clock 'stuck-at' high or low for a few cycles. To ensure that this does not coincide with a read access to the Flash, potentially freezing the device, the HF clock source switch must be executed from ROM.

Note
This function will not return until the clock source has been switched. It is left to the programmer to ensure, that there is a pending request for a HF clock source switch before this function is called.
Returns
None
See also
OSCClockSourceSet()

Referenced by OSCHF_AttemptToSwitchToXosc(), and OSCHF_SwitchToRcOscTurnOffXosc().

314 {
315  // Read target clock (lower half of the 32-bit CTL0 register)
316  uint16_t hfSrc = HWREGH(AUX_DDI0_OSC_BASE + DDI_0_OSC_O_CTL0) & DDI_0_OSC_CTL0_SCLK_HF_SRC_SEL_M;
317 
318  // If target clock source is RCOSC, change clock source for DCDC to RCOSC
319  if(hfSrc == DDI_0_OSC_CTL0_SCLK_HF_SRC_SEL_RCOSC)
320  {
321  // Force DCDC to use RCOSC before switching SCLK_HF to RCOSC
322  HWREG(AUX_DDI0_OSC_BASE + DDI_O_MASK16B + (DDI_0_OSC_O_CTL0 << 1) + 4) = DDI_0_OSC_CTL0_CLK_DCDC_SRC_SEL_M | (DDI_0_OSC_CTL0_CLK_DCDC_SRC_SEL_M >> 16);
323  // Dummy read to ensure that the write has propagated
324  HWREGH(AUX_DDI0_OSC_BASE + DDI_0_OSC_O_CTL0);
325  }
326 
327  // Switch the HF clock source
329 
330  // If target clock source is XOSC, change clock source for DCDC to "auto"
331  if(hfSrc == DDI_0_OSC_CTL0_SCLK_HF_SRC_SEL_XOSC)
332  {
333  // Set DCDC clock source back to "auto" after SCLK_HF was switched to XOSC
334  HWREG(AUX_DDI0_OSC_BASE + DDI_O_MASK16B + (DDI_0_OSC_O_CTL0 << 1) + 4) = DDI_0_OSC_CTL0_CLK_DCDC_SRC_SEL_M;
335  }
336 }
#define HapiHFSourceSafeSwitch()
Definition: rom.h:268

§ OSCXHfPowerModeSet()

static void OSCXHfPowerModeSet ( uint32_t  ui32Mode)
inlinestatic

Set Power Mode for High Frequency XTAL Oscillator.

Parameters
ui32Modeis the power mode for the HF XTAL.
Returns
None
153 {
154  // Check the arguments.
155  ASSERT((ui32Mode == LOW_POWER_XOSC) ||
156  (ui32Mode == HIGH_POWER_XOSC));
157 
158  // Change the power mode.
159  DDI16BitWrite(AUX_DDI0_OSC_BASE, DDI_0_OSC_O_CTL0, DDI_0_OSC_CTL0_XOSC_HF_POWER_MODE,
160  ui32Mode);
161 }
#define LOW_POWER_XOSC
Definition: osc.h:110
void DDI16BitWrite(uint32_t ui32Base, uint32_t ui32Reg, uint32_t ui32Mask, uint32_t ui32WrData)
Write a single bit using a 16-bit maskable write.
Definition: ddi.c:81
#define HIGH_POWER_XOSC
Definition: osc.h:111
#define ASSERT(expr)
Definition: debug.h:71
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Macro Definition Documentation

§ HIGH_POWER_XOSC

#define HIGH_POWER_XOSC   0

Referenced by OSCXHfPowerModeSet().

§ LOW_POWER_XOSC

#define LOW_POWER_XOSC   1

Referenced by OSCXHfPowerModeSet().

§ OSC_RCOSC_HF

#define OSC_RCOSC_HF   0x00000000

§ OSC_RCOSC_LF

#define OSC_RCOSC_LF   0x00000002

§ OSC_SRC_CLK_HF

§ OSC_SRC_CLK_LF

#define OSC_SRC_CLK_LF   0x00000004

§ OSC_XOSC_HF

§ OSC_XOSC_LF

#define OSC_XOSC_LF   0x00000003

§ SCLK_HF_RCOSC_HF

#define SCLK_HF_RCOSC_HF   0

§ SCLK_HF_XOSC_HF

#define SCLK_HF_XOSC_HF   1

§ SCLK_LF_FROM_RCOSC_HF

#define SCLK_LF_FROM_RCOSC_HF   0

§ SCLK_LF_FROM_RCOSC_LF

#define SCLK_LF_FROM_RCOSC_LF   2

§ SCLK_LF_FROM_XOSC_HF

#define SCLK_LF_FROM_XOSC_HF   1

§ SCLK_LF_FROM_XOSC_LF

#define SCLK_LF_FROM_XOSC_LF   3