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#define CPU_TPIU_O_SSPSR 0x00000000 |
#define CPU_TPIU_O_CSPSR 0x00000004 |
#define CPU_TPIU_O_ACPR 0x00000010 |
#define CPU_TPIU_O_SPPR 0x000000F0 |
#define CPU_TPIU_O_FFSR 0x00000300 |
#define CPU_TPIU_O_FFCR 0x00000304 |
#define CPU_TPIU_O_FSCR 0x00000308 |
#define CPU_TPIU_O_CLAIMMASK 0x00000FA0 |
#define CPU_TPIU_O_CLAIMSET 0x00000FA0 |
#define CPU_TPIU_O_CLAIMTAG 0x00000FA4 |
#define CPU_TPIU_O_CLAIMCLR 0x00000FA4 |
#define CPU_TPIU_O_LAR 0x00000FB0 |
#define CPU_TPIU_O_DEVID 0x00000FC8 |
#define CPU_TPIU_SSPSR_FOUR 0x00000008 |
#define CPU_TPIU_SSPSR_FOUR_BITN 3 |
#define CPU_TPIU_SSPSR_FOUR_M 0x00000008 |
#define CPU_TPIU_SSPSR_FOUR_S 3 |
#define CPU_TPIU_SSPSR_THREE 0x00000004 |
#define CPU_TPIU_SSPSR_THREE_BITN 2 |
#define CPU_TPIU_SSPSR_THREE_M 0x00000004 |
#define CPU_TPIU_SSPSR_THREE_S 2 |
#define CPU_TPIU_SSPSR_TWO 0x00000002 |
#define CPU_TPIU_SSPSR_TWO_BITN 1 |
#define CPU_TPIU_SSPSR_TWO_M 0x00000002 |
#define CPU_TPIU_SSPSR_TWO_S 1 |
#define CPU_TPIU_SSPSR_ONE 0x00000001 |
#define CPU_TPIU_SSPSR_ONE_BITN 0 |
#define CPU_TPIU_SSPSR_ONE_M 0x00000001 |
#define CPU_TPIU_SSPSR_ONE_S 0 |
#define CPU_TPIU_CSPSR_FOUR 0x00000008 |
#define CPU_TPIU_CSPSR_FOUR_BITN 3 |
#define CPU_TPIU_CSPSR_FOUR_M 0x00000008 |
#define CPU_TPIU_CSPSR_FOUR_S 3 |
#define CPU_TPIU_CSPSR_THREE 0x00000004 |
#define CPU_TPIU_CSPSR_THREE_BITN 2 |
#define CPU_TPIU_CSPSR_THREE_M 0x00000004 |
#define CPU_TPIU_CSPSR_THREE_S 2 |
#define CPU_TPIU_CSPSR_TWO 0x00000002 |
#define CPU_TPIU_CSPSR_TWO_BITN 1 |
#define CPU_TPIU_CSPSR_TWO_M 0x00000002 |
#define CPU_TPIU_CSPSR_TWO_S 1 |
#define CPU_TPIU_CSPSR_ONE 0x00000001 |
#define CPU_TPIU_CSPSR_ONE_BITN 0 |
#define CPU_TPIU_CSPSR_ONE_M 0x00000001 |
#define CPU_TPIU_CSPSR_ONE_S 0 |
#define CPU_TPIU_ACPR_PRESCALER_W 13 |
#define CPU_TPIU_ACPR_PRESCALER_M 0x00001FFF |
#define CPU_TPIU_ACPR_PRESCALER_S 0 |
#define CPU_TPIU_SPPR_PROTOCOL_W 2 |
#define CPU_TPIU_SPPR_PROTOCOL_M 0x00000003 |
#define CPU_TPIU_SPPR_PROTOCOL_S 0 |
#define CPU_TPIU_SPPR_PROTOCOL_SWO_NRZ 0x00000002 |
#define CPU_TPIU_SPPR_PROTOCOL_SWO_MANCHESTER 0x00000001 |
#define CPU_TPIU_SPPR_PROTOCOL_TRACEPORT 0x00000000 |
#define CPU_TPIU_FFSR_FTNONSTOP 0x00000008 |
#define CPU_TPIU_FFSR_FTNONSTOP_BITN 3 |
#define CPU_TPIU_FFSR_FTNONSTOP_M 0x00000008 |
#define CPU_TPIU_FFSR_FTNONSTOP_S 3 |
#define CPU_TPIU_FFCR_TRIGIN 0x00000100 |
#define CPU_TPIU_FFCR_TRIGIN_BITN 8 |
#define CPU_TPIU_FFCR_TRIGIN_M 0x00000100 |
#define CPU_TPIU_FFCR_TRIGIN_S 8 |
#define CPU_TPIU_FFCR_ENFCONT 0x00000002 |
#define CPU_TPIU_FFCR_ENFCONT_BITN 1 |
#define CPU_TPIU_FFCR_ENFCONT_M 0x00000002 |
#define CPU_TPIU_FFCR_ENFCONT_S 1 |
#define CPU_TPIU_FSCR_FSCR_W 32 |
#define CPU_TPIU_FSCR_FSCR_M 0xFFFFFFFF |
#define CPU_TPIU_FSCR_FSCR_S 0 |
#define CPU_TPIU_CLAIMMASK_CLAIMMASK_W 32 |
#define CPU_TPIU_CLAIMMASK_CLAIMMASK_M 0xFFFFFFFF |
#define CPU_TPIU_CLAIMMASK_CLAIMMASK_S 0 |
#define CPU_TPIU_CLAIMSET_CLAIMSET_W 32 |
#define CPU_TPIU_CLAIMSET_CLAIMSET_M 0xFFFFFFFF |
#define CPU_TPIU_CLAIMSET_CLAIMSET_S 0 |
#define CPU_TPIU_CLAIMTAG_CLAIMTAG_W 32 |
#define CPU_TPIU_CLAIMTAG_CLAIMTAG_M 0xFFFFFFFF |
#define CPU_TPIU_CLAIMTAG_CLAIMTAG_S 0 |
#define CPU_TPIU_CLAIMCLR_CLAIMCLR_W 32 |
#define CPU_TPIU_CLAIMCLR_CLAIMCLR_M 0xFFFFFFFF |
#define CPU_TPIU_CLAIMCLR_CLAIMCLR_S 0 |
#define CPU_TPIU_DEVID_NRZ_SWO 0x00000400 |
#define CPU_TPIU_DEVID_NRZ_SWO_BITN 11 |
#define CPU_TPIU_DEVID_NRZ_SWO_M 0x00000400 |
#define CPU_TPIU_DEVID_NRZ_SWO_S 11 |
#define CPU_TPIU_DEVID_MANCHESTER_SWO 0x00000200 |
#define CPU_TPIU_DEVID_MANCHESTER_SWO_BITN 10 |
#define CPU_TPIU_DEVID_MANCHESTER_SWO_M 0x00000200 |
#define CPU_TPIU_DEVID_MANCHESTER_SWO_S 10 |
#define CPU_TPIU_DEVID_PARALLEL_TRACE 0x00000100 |
#define CPU_TPIU_DEVID_PARALLEL_TRACE_BITN 9 |
#define CPU_TPIU_DEVID_PARALLEL_TRACE_M 0x00000100 |
#define CPU_TPIU_DEVID_PARALLEL_TRACE_S 9 |
#define CPU_TPIU_DEVID_FIFO_SIZE_W 2 |
#define CPU_TPIU_DEVID_FIFO_SIZE_M 0x000001C0 |
#define CPU_TPIU_DEVID_FIFO_SIZE_S 6 |
#define CPU_TPIU_DEVID_ASYNC_TRACECLKIN 0x00000020 |
#define CPU_TPIU_DEVID_ASYNC_TRACECLKIN_BITN 5 |
#define CPU_TPIU_DEVID_ASYNC_TRACECLKIN_M 0x00000020 |
#define CPU_TPIU_DEVID_ASYNC_TRACECLKIN_S 5 |
#define CPU_TPIU_DEVID_NUM_INPUTS_W 5 |
#define CPU_TPIU_DEVID_NUM_INPUTS_M 0x0000001F |
#define CPU_TPIU_DEVID_NUM_INPUTS_S 0 |
#define CPU_TPIU_DEVID_NUM_INPUTS_ONE 0x00000000 |
#define CPU_TPIU_DEVID_NUM_INPUTS_TWO 0x00000001 |