CC26xx Driver Library
Macros | Typedefs | Functions | Variables
flash.c File Reference
#include "../inc/hw_types.h"
#include "../inc/hw_ccfg.h"
#include "flash.h"
#include "rom.h"
#include "chipinfo.h"

Macros

#define CCFG_OFFSET_SECURITY   CCFG_O_BL_CONFIG
 
#define CCFG_OFFSET_SECT_PROT   CCFG_O_CCFG_PROT_31_0
 
#define CCFG_SIZE_SECURITY   0x00000014
 
#define CCFG_SIZE_SECT_PROT   0x00000004
 

Typedefs

typedef uint32_t(* FlashPrgPointer_t) (uint8_t *, uint32_t, uint32_t)
 
typedef uint32_t(* FlashSectorErasePointer_t) (uint32_t)
 

Functions

static void SetReadMode (void)
 
void FlashPowerModeSet (uint32_t ui32PowerMode, uint32_t ui32BankGracePeriod, uint32_t ui32PumpGracePeriod)
 Set power mode. More...
 
uint32_t FlashPowerModeGet (void)
 Get current configured power mode. More...
 
void FlashProtectionSet (uint32_t ui32SectorAddress, uint32_t ui32ProtectMode)
 Set sector protection. More...
 
uint32_t FlashProtectionGet (uint32_t ui32SectorAddress)
 Get sector protection. More...
 
uint32_t FlashProtectionSave (uint32_t ui32SectorAddress)
 Save sector protection to make it permanent. More...
 
uint32_t FlashSectorErase (uint32_t ui32SectorAddress)
 Erase a flash sector. More...
 
uint32_t FlashProgram (uint8_t *pui8DataBuffer, uint32_t ui32Address, uint32_t ui32Count)
 Programs unprotected flash sectors in the main bank. More...
 
bool FlashEfuseReadRow (uint32_t *pui32EfuseData, uint32_t ui32RowAddress)
 Reads efuse data from specified row. More...
 
void FlashDisableSectorsForWrite (void)
 Disables all sectors for erase and programming on the active bank. More...
 
uint32_t MemBusWrkAroundHapiProgramFlash (uint8_t *pui8DataBuffer, uint32_t ui32Address, uint32_t ui32Count)
 
uint32_t MemBusWrkAroundHapiEraseSector (uint32_t ui32Address)
 

Variables

const uint8_t g_pui8CcfgDefaultSec []
 

Macro Definition Documentation

§ CCFG_OFFSET_SECT_PROT

#define CCFG_OFFSET_SECT_PROT   CCFG_O_CCFG_PROT_31_0

Referenced by FlashProtectionSave().

§ CCFG_OFFSET_SECURITY

#define CCFG_OFFSET_SECURITY   CCFG_O_BL_CONFIG

§ CCFG_SIZE_SECT_PROT

#define CCFG_SIZE_SECT_PROT   0x00000004

Referenced by FlashProtectionSave().

§ CCFG_SIZE_SECURITY

#define CCFG_SIZE_SECURITY   0x00000014

Typedef Documentation

§ FlashPrgPointer_t

typedef uint32_t(* FlashPrgPointer_t) (uint8_t *, uint32_t, uint32_t)

§ FlashSectorErasePointer_t

typedef uint32_t(* FlashSectorErasePointer_t) (uint32_t)

Function Documentation

§ MemBusWrkAroundHapiEraseSector()

uint32_t MemBusWrkAroundHapiEraseSector ( uint32_t  ui32Address)
693 {
694  uint32_t ui32ErrorReturn;
695 
696  FlashSectorErasePointer_t FuncPointer;
697  uint32_t ui32RomAddr = HWREG(ROM_HAPI_TABLE_ADDR + (3 * 4));
698 
699  // Call ROM function
700  FuncPointer = (uint32_t (*)(uint32_t)) (ui32RomAddr);
701  ui32ErrorReturn = FuncPointer(ui32Address);
702 
703  // Enable standby in flash bank since ROM function might have disabled it
704  HWREGBITW(FLASH_BASE + FLASH_O_CFG, FLASH_CFG_DIS_STANDBY_BITN ) = 0;
705 
706  // Return status of operation.
707  return(ui32ErrorReturn);
708 }
FlashSectorErasePointer_t
uint32_t(* FlashSectorErasePointer_t)(uint32_t)
Definition: flash.c:97
ROM_HAPI_TABLE_ADDR
#define ROM_HAPI_TABLE_ADDR
Definition: rom.h:57

§ MemBusWrkAroundHapiProgramFlash()

uint32_t MemBusWrkAroundHapiProgramFlash ( uint8_t *  pui8DataBuffer,
uint32_t  ui32Address,
uint32_t  ui32Count 
)
670 {
671  uint32_t ui32ErrorReturn;
672  FlashPrgPointer_t FuncPointer;
673  uint32_t ui32RomAddr = HWREG(ROM_HAPI_TABLE_ADDR + (5 * 4));
674 
675  // Call ROM function
676  FuncPointer = (uint32_t (*)(uint8_t *, uint32_t, uint32_t)) (ui32RomAddr);
677  ui32ErrorReturn = FuncPointer( pui8DataBuffer, ui32Address, ui32Count);
678 
679  // Enable standby in flash bank since ROM function might have disabled it
680  HWREGBITW(FLASH_BASE + FLASH_O_CFG, FLASH_CFG_DIS_STANDBY_BITN ) = 0;
681 
682  // Return status of operation.
683  return(ui32ErrorReturn);
684 }
ROM_HAPI_TABLE_ADDR
#define ROM_HAPI_TABLE_ADDR
Definition: rom.h:57
FlashPrgPointer_t
uint32_t(* FlashPrgPointer_t)(uint8_t *, uint32_t, uint32_t)
Definition: flash.c:95

§ SetReadMode()

static void SetReadMode ( void  )
static

Referenced by FlashDisableSectorsForWrite().

545 {
546  uint32_t ui32TrimValue;
547  uint32_t ui32Value;
548 
549  // Configure the STANDBY_MODE_SEL, STANDBY_PW_SEL, DIS_STANDBY, DIS_IDLE,
550  // VIN_AT_X and VIN_BY_PASS for read mode
551  if(HWREG(AON_PMCTL_BASE + AON_PMCTL_O_PWRCTL) &
552  AON_PMCTL_PWRCTL_EXT_REG_MODE)
553  {
554  // Select trim values for external regulator mode:
555  // Configure STANDBY_MODE_SEL (OTP offset 0x308 bit 7)
556  // COnfigure STANDBY_PW_SEL (OTP offset 0x308 bit 6:5)
557  // Must be done while the register bit field CONFIG.DIS_STANDBY = 1
558  HWREG(FLASH_BASE + FLASH_O_CFG) |= FLASH_CFG_DIS_STANDBY;
559 
560  ui32TrimValue =
561  HWREG(FLASH_CFG_BASE + FCFG1_OFFSET + FCFG1_O_FLASH_OTP_DATA4);
562 
563  ui32Value = ((ui32TrimValue &
564  FCFG1_FLASH_OTP_DATA4_STANDBY_MODE_SEL_EXT_RD_M) >>
565  FCFG1_FLASH_OTP_DATA4_STANDBY_MODE_SEL_EXT_RD_S) <<
566  FLASH_CFG_STANDBY_MODE_SEL_S;
567 
568  ui32Value |= ((ui32TrimValue &
569  FCFG1_FLASH_OTP_DATA4_STANDBY_PW_SEL_EXT_RD_M) >>
570  FCFG1_FLASH_OTP_DATA4_STANDBY_PW_SEL_EXT_RD_S) <<
571  FLASH_CFG_STANDBY_PW_SEL_S;
572 
573  // Configure DIS_STANDBY (OTP offset 0x308 bit 4).
574  ui32Value |= ((ui32TrimValue &
575  FCFG1_FLASH_OTP_DATA4_DIS_STANDBY_EXT_RD_M) >>
576  FCFG1_FLASH_OTP_DATA4_DIS_STANDBY_EXT_RD_S) <<
577  FLASH_CFG_DIS_STANDBY_S;
578 
579  HWREG(FLASH_BASE + FLASH_O_CFG) = (HWREG(FLASH_BASE + FLASH_O_CFG) &
580  ~(FLASH_CFG_STANDBY_MODE_SEL_M |
581  FLASH_CFG_STANDBY_PW_SEL_M |
582  FLASH_CFG_DIS_STANDBY_M)) | ui32Value;
583 
584  // Configure VIN_AT_X (OTP offset 0x308 bits 2:0)
585  ui32Value = ((ui32TrimValue &
586  FCFG1_FLASH_OTP_DATA4_VIN_AT_X_EXT_RD_M) >>
587  FCFG1_FLASH_OTP_DATA4_VIN_AT_X_EXT_RD_S) <<
588  FLASH_FSEQPMP_VIN_AT_X_S;
589 
590  // Configure VIN_BY_PASS which is dependent on the VIN_AT_X value.
591  // If VIN_AT_X = 7 then VIN_BY_PASS should be 0 otherwise
592  // VIN_BY_PASS should be 1
593  if(((ui32Value & FLASH_FSEQPMP_VIN_AT_X_M) >>
594  FLASH_FSEQPMP_VIN_AT_X_S) != 0x7)
595  {
596  ui32Value |= FLASH_FSEQPMP_VIN_BY_PASS;
597  }
598 
599  HWREG(FLASH_BASE + FLASH_O_FLOCK) = 0xAAAA;
600  HWREG(FLASH_BASE + FLASH_O_FSEQPMP) =
601  (HWREG(FLASH_BASE + FLASH_O_FSEQPMP) &
602  ~(FLASH_FSEQPMP_VIN_BY_PASS_M |
603  FLASH_FSEQPMP_VIN_AT_X_M)) | ui32Value;
604  HWREG(FLASH_BASE + FLASH_O_FLOCK) = 0x55AA;
605  }
606  else
607  {
608  // Select trim values for internal regulator mode:
609  // Configure STANDBY_MODE_SEL (OTP offset 0x308 bit 15)
610  // COnfigure STANDBY_PW_SEL (OTP offset 0x308 bit 14:13)
611  // Must be done while the register bit field CONFIG.DIS_STANDBY = 1
612  HWREG(FLASH_BASE + FLASH_O_CFG) |= FLASH_CFG_DIS_STANDBY;
613 
614  ui32TrimValue =
615  HWREG(FLASH_CFG_BASE + FCFG1_OFFSET + FCFG1_O_FLASH_OTP_DATA4);
616 
617  ui32Value = ((ui32TrimValue &
618  FCFG1_FLASH_OTP_DATA4_STANDBY_MODE_SEL_INT_RD_M) >>
619  FCFG1_FLASH_OTP_DATA4_STANDBY_MODE_SEL_INT_RD_S) <<
620  FLASH_CFG_STANDBY_MODE_SEL_S;
621 
622  ui32Value |= ((ui32TrimValue &
623  FCFG1_FLASH_OTP_DATA4_STANDBY_PW_SEL_INT_RD_M) >>
624  FCFG1_FLASH_OTP_DATA4_STANDBY_PW_SEL_INT_RD_S) <<
625  FLASH_CFG_STANDBY_PW_SEL_S;
626 
627  // Configure DIS_STANDBY (OTP offset 0x308 bit 12).
628  ui32Value |= ((ui32TrimValue &
629  FCFG1_FLASH_OTP_DATA4_DIS_STANDBY_INT_RD_M) >>
630  FCFG1_FLASH_OTP_DATA4_DIS_STANDBY_INT_RD_S) <<
631  FLASH_CFG_DIS_STANDBY_S;
632 
633  HWREG(FLASH_BASE + FLASH_O_CFG) = (HWREG(FLASH_BASE + FLASH_O_CFG) &
634  ~(FLASH_CFG_STANDBY_MODE_SEL_M |
635  FLASH_CFG_STANDBY_PW_SEL_M |
636  FLASH_CFG_DIS_STANDBY_M)) | ui32Value;
637 
638  // Configure VIN_AT_X (OTP offset 0x308 bits 10:8)
639  ui32Value = (((ui32TrimValue &
640  FCFG1_FLASH_OTP_DATA4_VIN_AT_X_INT_RD_M) >>
641  FCFG1_FLASH_OTP_DATA4_VIN_AT_X_INT_RD_S) <<
642  FLASH_FSEQPMP_VIN_AT_X_S);
643 
644  // Configure VIN_BY_PASS which is dependent on the VIN_AT_X value.
645  // If VIN_AT_X = 7 then VIN_BY_PASS should be 0 otherwise
646  // VIN_BY_PASS should be 1
647  if(((ui32Value & FLASH_FSEQPMP_VIN_AT_X_M) >>
648  FLASH_FSEQPMP_VIN_AT_X_S) != 0x7)
649  {
650  ui32Value |= FLASH_FSEQPMP_VIN_BY_PASS;
651  }
652 
653  HWREG(FLASH_BASE + FLASH_O_FLOCK) = 0xAAAA;
654  HWREG(FLASH_BASE + FLASH_O_FSEQPMP) =
655  (HWREG(FLASH_BASE + FLASH_O_FSEQPMP) &
656  ~(FLASH_FSEQPMP_VIN_BY_PASS_M |
657  FLASH_FSEQPMP_VIN_AT_X_M)) | ui32Value;
658  HWREG(FLASH_BASE + FLASH_O_FLOCK) = 0x55AA;
659  }
660 }
FCFG1_OFFSET
#define FCFG1_OFFSET
Definition: flash.h:149

Variable Documentation

§ g_pui8CcfgDefaultSec

const uint8_t g_pui8CcfgDefaultSec[]
Initial value:
= {0xFF, 0xFF, 0xFF, 0xC5,
0xFF, 0xFF, 0xFF, 0xFF,
0xC5, 0xFF, 0xFF, 0xFF,
0xC5, 0xC5, 0xC5, 0xFF,
0xC5, 0xC5, 0xC5, 0xFF
}