SPICC26XXDMA Hardware attributes. More...
#include <SPICC26XXDMA.h>
Data Fields | |
uint32_t | baseAddr |
uint8_t | intNum |
uint8_t | intPriority |
SPI CC26XXDMA Peripheral's interrupt priority. More... | |
uint32_t | swiPriority |
SPI SWI priority. The higher the number, the higher the priority. The minimum is 0 and the maximum is 15 by default. The maximum can be reduced to save RAM by adding or modifying Swi.numPriorities in the kernel configuration file. More... | |
PowerCC26XX_Resource | powerMngrId |
uint16_t | defaultTxBufValue |
uint32_t | rxChannelBitMask |
uint32_t | txChannelBitMask |
PIN_Id | mosiPin |
PIN_Id | misoPin |
PIN_Id | clkPin |
PIN_Id | csnPin |
uint32_t | minDmaTransferSize |
SPICC26XXDMA Hardware attributes.
These fields, with the exception of intPriority, are used by driverlib APIs and therefore must be populated by driverlib macro definitions. For CC26xxWare these definitions are found in:
intPriority is the SPI peripheral's interrupt priority, as defined by the underlying OS. It is passed unmodified to the underlying OS's interrupt handler creation code, so you need to refer to the OS documentation for usage. For example, for SYS/BIOS applications, refer to the ti.sysbios.family.arm.m3.Hwi documentation for SYS/BIOS usage of interrupt priorities. If the driver uses the ti.dpl interface instead of making OS calls directly, then the HwiP port handles the interrupt priority in an OS specific way. In the case of the SYS/BIOS port, intPriority is passed unmodified to Hwi_create().
A sample structure is shown below:
uint32_t SPICC26XXDMA_HWAttrsV1::baseAddr |
SPI Peripheral's base address
uint8_t SPICC26XXDMA_HWAttrsV1::intNum |
SPI CC26XXDMA Peripheral's interrupt vector
uint8_t SPICC26XXDMA_HWAttrsV1::intPriority |
SPI CC26XXDMA Peripheral's interrupt priority.
The CC26xx uses three of the priority bits, meaning ~0 has the same effect as (7 << 5).
(7 << 5) will apply the lowest priority.
(1 << 5) will apply the highest priority.
Setting the priority to 0 is not supported by this driver.
HWI's with priority 0 ignore the HWI dispatcher to support zero-latency interrupts, thus invalidating the critical sections in this driver.
uint32_t SPICC26XXDMA_HWAttrsV1::swiPriority |
SPI SWI priority. The higher the number, the higher the priority. The minimum is 0 and the maximum is 15 by default. The maximum can be reduced to save RAM by adding or modifying Swi.numPriorities in the kernel configuration file.
PowerCC26XX_Resource SPICC26XXDMA_HWAttrsV1::powerMngrId |
SPI Peripheral's power manager ID
uint16_t SPICC26XXDMA_HWAttrsV1::defaultTxBufValue |
Default TX value if txBuf == NULL
uint32_t SPICC26XXDMA_HWAttrsV1::rxChannelBitMask |
uDMA controlTable channel index
uint32_t SPICC26XXDMA_HWAttrsV1::txChannelBitMask |
uDMA controlTable channel index
PIN_Id SPICC26XXDMA_HWAttrsV1::mosiPin |
SPI MOSI pin
PIN_Id SPICC26XXDMA_HWAttrsV1::misoPin |
SPI MISO pin
PIN_Id SPICC26XXDMA_HWAttrsV1::clkPin |
SPI CLK pin
PIN_Id SPICC26XXDMA_HWAttrsV1::csnPin |
SPI CSN pin
uint32_t SPICC26XXDMA_HWAttrsV1::minDmaTransferSize |
Minimum transfer size for DMA based transfer