[aux_adc.h] AUX Analog to Digital Converter

Functions
void	AUXADCDisable (void)
	Disables the ADC. More...
void	AUXADCEnableAsync (uint32_t refSource, uint32_t trigger)
	Enables the ADC for asynchronous operation. More...
void	AUXADCEnableSync (uint32_t refSource, uint32_t sampleTime, uint32_t trigger)
	Enables the ADC for synchronous operation. More...
void	AUXADCEnableSyncNoBugWorkaround (uint32_t refSource, uint32_t sampleTime, uint32_t trigger)
	Enables the ADC for synchronous operation. More...
void	AUXADCDisableInputScaling (void)
	Disables scaling of the ADC input. More...
void	AUXADCFlushFifo (void)
	Flushes the ADC FIFO. More...
static void	AUXADCGenManualTrigger (void)
	Generates a single manual ADC trigger. More...
static uint32_t	AUXADCGetFifoStatus (void)
	Returns flags indicating the status of the ADC FIFO. More...
uint32_t	AUXADCReadFifo (void)
	Waits for and returns the first sample in the ADC FIFO. More...
uint32_t	AUXADCPopFifo (void)
	Returns the first sample in the ADC FIFO, without waiting. More...
static void	AUXADCSelectInput (uint32_t input)
	Selects internal or external input for the ADC. More...
int32_t	AUXADCGetAdjustmentGain (uint32_t refSource)
	Returns the gain value used when adjusting for ADC gain/offset. More...
int32_t	AUXADCGetAdjustmentOffset (uint32_t refSource)
	Returns the offset value used when adjusting for ADC gain/offset. More...
int32_t	AUXADCValueToMicrovolts (int32_t fixedRefVoltage, int32_t adcValue)
	Converts an "adjusted" ADC value to microvolts. More...
int32_t	AUXADCMicrovoltsToValue (int32_t fixedRefVoltage, int32_t microvolts)
	Converts a number of microvolts to corresponding "adjusted" ADC value. More...
int32_t	AUXADCAdjustValueForGainAndOffset (int32_t adcValue, int32_t gain, int32_t offset)
	Performs ADC value gain and offset adjustment. More...
int32_t	AUXADCUnadjustValueForGainAndOffset (int32_t adcValue, int32_t gain, int32_t offset)
	Performs the inverse of the ADC value gain and offset adjustment. More...

Detailed Description

Function Documentation

int32_t AUXADCAdjustValueForGainAndOffset	(	int32_t	adcValue,
		int32_t	gain,
		int32_t	offset
	)

Performs ADC value gain and offset adjustment.

This function takes a measured ADC value compensates for the internal gain and offset in the ADC.

Parameters

adcValue	12-bit ADC unadjusted value
gain	Gain adjustment value provided by AUXADCGetAdjustmentGain()
offset	Offset adjustment value provided by AUXADCGetAdjustmentOffset()

Returns

12-bit ADC adjusted value

{
    // Apply gain and offset adjustment
    adcValue = (((adcValue + offset) * gain) + 16384) / 32768;

    // Saturate
    if (adcValue < 0) {
        return 0;
    } else if (adcValue > 4095) {
        return 4095;
    } else {
        return adcValue;
    }
}

void AUXADCDisable

(

void

)

Disables the ADC.

This function must be called:

• Before re-enabling the ADC using AUXADCEnableAsync() or AUXADCEnableSync()
• Before entering system standby

{
    // Disable the ADC reference
    ADI8BitsClear(AUX_ADI4_BASE, ADI_4_AUX_O_ADCREF0, ADI_4_AUX_ADCREF0_EN_M | ADI_4_AUX_ADCREF0_REF_ON_IDLE_M | ADI_4_AUX_ADCREF0_SRC_M);

    // Assert reset and disable the ADC
    ADI8BitsClear(AUX_ADI4_BASE, ADI_4_AUX_O_ADC0, ADI_4_AUX_ADC0_EN_M | ADI_4_AUX_ADC0_RESET_N_M | ADI_4_AUX_ADC0_SMPL_MODE_M | ADI_4_AUX_ADC0_SMPL_CYCLE_EXP_M);

    // Ensure that scaling is enabled by default before next use of the ADC
    ADI8BitsClear(AUX_ADI4_BASE, ADI_4_AUX_O_ADC1, ADI_4_AUX_ADC1_SCALE_DIS_M);

    // Flush the FIFO before disabling the clocks
    HWREGBITW(AUX_ANAIF_BASE + AUX_ANAIF_O_ADCCTL, 1) = 1; // CMD: EN(1) -> FLUSH(3)
    HWREGBITW(AUX_ANAIF_BASE + AUX_ANAIF_O_ADCCTL, 1) = 0; // CMD: FLUSH(3) -> EN(1)

    // Disable the ADC clock (no need to wait since IOB_WUC_ADCCLKCTL_ACK goes low immediately)
    HWREG(AUX_SYSIF_BASE + AUX_SYSIF_O_ADCCLKCTL) = 0;

    // Disable the ADC data interface
    HWREG(AUX_ANAIF_BASE + AUX_ANAIF_O_ADCCTL) = 0;
}

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void AUXADCDisableInputScaling

(

void

)

Disables scaling of the ADC input.

By default, the ADC operates internally on a version of the input signal that has been scaled down by a factor 1408 / 4095. This function disables that scaling, allowing for a trade-off between dynamic range and and resolution.

Note

This function must only be called while the ADC is disabled, before calling AUXADCEnableSync() or AUXADCEnableAsync().

Different input maximum ratings apply when input scaling is disabled. Violating these may damage the device.

{
    ADI8BitsSet(AUX_ADI4_BASE, ADI_4_AUX_O_ADC1, ADI_4_AUX_ADC1_SCALE_DIS_M);
}

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void AUXADCEnableAsync	(	uint32_t	refSource,
		uint32_t	trigger
	)

Enables the ADC for asynchronous operation.

In asynchronous operation, the ADC samples continuously between conversions.

The ADC trigger starts the conversion. Note that the first conversion may be invalid if the sampling period is too short.

ADC input scaling is enabled by default after device reset, and is also re- enabled by AUXADCDisable(). To disable input scaling, call AUXADCDisableInputScaling() before calling AUXADCEnableAsync().

Parameters

refSource	ADC reference source: AUXADC_REF_FIXED (nominally 4.3 V) AUXADC_REF_VDDS_REL (nominally VDDS)
trigger	ADC conversion trigger: AUXADC_TRIGGER_MANUAL AUXADC_TRIGGER_GPT0A AUXADC_TRIGGER_GPT0B AUXADC_TRIGGER_GPT1A AUXADC_TRIGGER_GPT1B AUXADC_TRIGGER_GPT2A AUXADC_TRIGGER_GPT2B AUXADC_TRIGGER_GPT3A AUXADC_TRIGGER_GPT3B

{
    // Enable the ADC reference, with the following options:
    // - SRC: Set when using relative reference
    // - REF_ON_IDLE: Always cleared since there is no idle state in asynchronous operation
    ADI8BitsSet(AUX_ADI4_BASE, ADI_4_AUX_O_ADCREF0, refSource | ADI_4_AUX_ADCREF0_EN_M);

    // Enable the ADC clock
    HWREG(AUX_SYSIF_BASE + AUX_SYSIF_O_ADCCLKCTL) = AUX_SYSIF_ADCCLKCTL_REQ_M;
    while (!(HWREG(AUX_SYSIF_BASE + AUX_SYSIF_O_ADCCLKCTL) & AUX_SYSIF_ADCCLKCTL_ACK_M));

    // Enable the ADC data interface
    if (trigger == AUXADC_TRIGGER_MANUAL) {
        // Manual trigger: No need to configure event routing from GPT
        HWREG(AUX_ANAIF_BASE + AUX_ANAIF_O_ADCCTL) = AUX_ANAIF_ADCCTL_START_SRC_NO_EVENT | AUX_ANAIF_ADCCTL_CMD_EN;
    } else {
        // GPT trigger: Configure event routing via MCU_EV to the AUX domain
        HWREG(EVENT_BASE + EVENT_O_AUXSEL0) = trigger;
        HWREG(AUX_ANAIF_BASE + AUX_ANAIF_O_ADCCTL) = AUX_ANAIF_ADCCTL_START_SRC_MCU_EV | AUX_ANAIF_ADCCTL_CMD_EN;
    }

    // Configure the ADC
    ADI8BitsSet(AUX_ADI4_BASE, ADI_4_AUX_O_ADC0, ADI_4_AUX_ADC0_SMPL_MODE_M);

    // Release reset and enable the ADC
    ADI8BitsSet(AUX_ADI4_BASE, ADI_4_AUX_O_ADC0, ADI_4_AUX_ADC0_EN_M | ADI_4_AUX_ADC0_RESET_N_M);
}

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void AUXADCEnableSync	(	uint32_t	refSource,
		uint32_t	sampleTime,
		uint32_t	trigger
	)

Enables the ADC for synchronous operation.

In synchronous operation, the ADC is idle between a conversion and subsequent samplings.

The ADC trigger starts sampling with specified duration, followed by the conversion. Note that the first conversion may be invalid if the initial sampling period is too short.

ADC input scaling is enabled by default after device reset, and is also re- enabled by AUXADCDisable(). To disable input scaling, call AUXADCDisableInputScaling() before calling AUXADCEnableSync().

Parameters

refSource	ADC reference source: AUXADC_REF_FIXED (nominally 4.3 V) AUXADC_REF_VDDS_REL (nominally VDDS)
sampleTime	ADC sampling time: AUXADC_SAMPLE_TIME_2P7_US AUXADC_SAMPLE_TIME_5P3_US AUXADC_SAMPLE_TIME_10P6_US AUXADC_SAMPLE_TIME_21P3_US AUXADC_SAMPLE_TIME_42P6_US AUXADC_SAMPLE_TIME_85P3_US AUXADC_SAMPLE_TIME_170_US AUXADC_SAMPLE_TIME_341_US AUXADC_SAMPLE_TIME_682_US AUXADC_SAMPLE_TIME_1P37_MS AUXADC_SAMPLE_TIME_2P73_MS AUXADC_SAMPLE_TIME_5P46_MS AUXADC_SAMPLE_TIME_10P9_MS
trigger	ADC conversion trigger: AUXADC_TRIGGER_MANUAL AUXADC_TRIGGER_GPT0A AUXADC_TRIGGER_GPT0B AUXADC_TRIGGER_GPT1A AUXADC_TRIGGER_GPT1B AUXADC_TRIGGER_GPT2A AUXADC_TRIGGER_GPT2B AUXADC_TRIGGER_GPT3A AUXADC_TRIGGER_GPT3B

{
    // The original AUXADCEnableSync() implementation requires a workaround,
    // consisting of a delay, after its invocation. This delay is implemented by
    // repeating the last ADI write operation three times.
    //
    // We need to make a call to the ROM symbol directly. Otherwise, the
    // current build process will call the implementation in flash instead even
    // if a ROM version is available.
#if defined(ROM_AUXADCEnableSyncNoBugWorkaround) && !defined(DRIVERLIB_NOROM) && !defined(DOXYGEN)
    ROM_AUXADCEnableSyncNoBugWorkaround(refSource, sampleTime, trigger);
#else
    AUXADCEnableSyncNoBugWorkaround(refSource, sampleTime, trigger);
#endif


    // Repeat this write another three times to add a delay. This is required
    // to prevent the device from hanging if we generate a manual ADC trigger
    // immediately after enabling the ADC and the Sensor Controller turns on
    // or off the XOSC_HF as a reference for the TDC at the same time.
    ADI8BitsSet(AUX_ADI4_BASE, ADI_4_AUX_O_ADC0, ADI_4_AUX_ADC0_EN_M | ADI_4_AUX_ADC0_RESET_N_M);
    ADI8BitsSet(AUX_ADI4_BASE, ADI_4_AUX_O_ADC0, ADI_4_AUX_ADC0_EN_M | ADI_4_AUX_ADC0_RESET_N_M);
    ADI8BitsSet(AUX_ADI4_BASE, ADI_4_AUX_O_ADC0, ADI_4_AUX_ADC0_EN_M | ADI_4_AUX_ADC0_RESET_N_M);
}

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void AUXADCEnableSyncNoBugWorkaround	(	uint32_t	refSource,
		uint32_t	sampleTime,
		uint32_t	trigger
	)

Enables the ADC for synchronous operation.

The device can hang if we generate a manual ADC trigger immediately after enabling the ADC with this function and the Sensor Controller turns on or off the XOSC_HF as a reference for the TDC at the same time.

An application should be calling AUXADCEnableSync() instead.

In synchronous operation, the ADC is idle between a conversion and subsequent samplings.

The ADC trigger starts sampling with specified duration, followed by the conversion. Note that the first conversion may be invalid if the initial sampling period is too short.

ADC input scaling is enabled by default after device reset, and is also re- enabled by AUXADCDisable(). To disable input scaling, call AUXADCDisableInputScaling() before calling AUXADCEnableSync().

Parameters

refSource	ADC reference source: AUXADC_REF_FIXED (nominally 4.3 V) AUXADC_REF_VDDS_REL (nominally VDDS)
sampleTime	ADC sampling time: AUXADC_SAMPLE_TIME_2P7_US AUXADC_SAMPLE_TIME_5P3_US AUXADC_SAMPLE_TIME_10P6_US AUXADC_SAMPLE_TIME_21P3_US AUXADC_SAMPLE_TIME_42P6_US AUXADC_SAMPLE_TIME_85P3_US AUXADC_SAMPLE_TIME_170_US AUXADC_SAMPLE_TIME_341_US AUXADC_SAMPLE_TIME_682_US AUXADC_SAMPLE_TIME_1P37_MS AUXADC_SAMPLE_TIME_2P73_MS AUXADC_SAMPLE_TIME_5P46_MS AUXADC_SAMPLE_TIME_10P9_MS
trigger	ADC conversion trigger: AUXADC_TRIGGER_MANUAL AUXADC_TRIGGER_GPT0A AUXADC_TRIGGER_GPT0B AUXADC_TRIGGER_GPT1A AUXADC_TRIGGER_GPT1B AUXADC_TRIGGER_GPT2A AUXADC_TRIGGER_GPT2B AUXADC_TRIGGER_GPT3A AUXADC_TRIGGER_GPT3B

Referenced by AUXADCEnableSync().

{
    // Enable the ADC reference, with the following options:
    // - SRC: Set when using relative reference
    // - REF_ON_IDLE: Set when using fixed reference and sample time < 21.3 us
    uint8_t adcref0 = refSource | ADI_4_AUX_ADCREF0_EN_M;
    if (!refSource && (sampleTime < AUXADC_SAMPLE_TIME_21P3_US)) {
        adcref0 |= ADI_4_AUX_ADCREF0_REF_ON_IDLE_M;
    }
    ADI8BitsSet(AUX_ADI4_BASE, ADI_4_AUX_O_ADCREF0, adcref0);

    // Enable the ADC clock
    HWREG(AUX_SYSIF_BASE + AUX_SYSIF_O_ADCCLKCTL) = AUX_SYSIF_ADCCLKCTL_REQ_M;
    while (!(HWREG(AUX_SYSIF_BASE + AUX_SYSIF_O_ADCCLKCTL) & AUX_SYSIF_ADCCLKCTL_ACK_M));

    // Enable the ADC data interface
    if (trigger == AUXADC_TRIGGER_MANUAL) {
        // Manual trigger: No need to configure event routing from GPT
        HWREG(AUX_ANAIF_BASE + AUX_ANAIF_O_ADCCTL) = AUX_ANAIF_ADCCTL_START_SRC_NO_EVENT | AUX_ANAIF_ADCCTL_CMD_EN;
    } else {
        // GPT trigger: Configure event routing via MCU_EV to the AUX domain
        HWREG(EVENT_BASE + EVENT_O_AUXSEL0) = trigger;
        HWREG(AUX_ANAIF_BASE + AUX_ANAIF_O_ADCCTL) = AUX_ANAIF_ADCCTL_START_SRC_MCU_EV | AUX_ANAIF_ADCCTL_CMD_EN;
    }

    // Configure the ADC
    ADI8BitsSet(AUX_ADI4_BASE, ADI_4_AUX_O_ADC0, sampleTime << ADI_4_AUX_ADC0_SMPL_CYCLE_EXP_S);

    // Release reset and enable the ADC
    ADI8BitsSet(AUX_ADI4_BASE, ADI_4_AUX_O_ADC0, ADI_4_AUX_ADC0_EN_M | ADI_4_AUX_ADC0_RESET_N_M);
}

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void AUXADCFlushFifo

(

void

)

Flushes the ADC FIFO.

This empties the FIFO and clears the underflow/overflow flags.

Note: This function must only be called while the ADC is enabled.

{
    HWREGBITW(AUX_ANAIF_BASE + AUX_ANAIF_O_ADCCTL, 1) = 1; // CMD: EN(1) -> FLUSH(3)
    HWREGBITW(AUX_ANAIF_BASE + AUX_ANAIF_O_ADCCTL, 1) = 0; // CMD: FLUSH(3) -> EN(1)
}

static void AUXADCGenManualTrigger ( void  )

inlinestatic

Generates a single manual ADC trigger.

For synchronous mode, the trigger starts sampling followed by conversion. For asynchronous mode, the trigger starts conversion.

{
    HWREG(AUX_ANAIF_BASE + AUX_ANAIF_O_ADCTRIG) = 0;
}

int32_t AUXADCGetAdjustmentGain

(

uint32_t

refSource

)

Returns the gain value used when adjusting for ADC gain/offset.

The function returns the gain value to be used with AUXADCAdjustValueForGainAndOffset() or AUXADCUnadjustValueForGainAndOffset(). The gain value is found during chip manufacturing and is stored in the factory configuration, FCFG1.

Parameters

refSource

ADC reference source: AUXADC_REF_FIXED (nominally 4.3 V) AUXADC_REF_VDDS_REL (nominally VDDS)

Returns

The gain value to be used in adjustments

{
    int32_t gain;
    if (refSource == AUXADC_REF_FIXED) {
        // AUXADC_REF_FIXED ==> ABS_GAIN
        gain = (HWREG(FCFG1_BASE + FCFG1_O_SOC_ADC_ABS_GAIN) & FCFG1_SOC_ADC_ABS_GAIN_SOC_ADC_ABS_GAIN_TEMP1_M) >> FCFG1_SOC_ADC_ABS_GAIN_SOC_ADC_ABS_GAIN_TEMP1_S;
    } else {
      // AUXADC_REF_VDDS_REL ==> REL_GAIN
        gain = (HWREG(FCFG1_BASE + FCFG1_O_SOC_ADC_REL_GAIN) & FCFG1_SOC_ADC_REL_GAIN_SOC_ADC_REL_GAIN_TEMP1_M) >> FCFG1_SOC_ADC_REL_GAIN_SOC_ADC_REL_GAIN_TEMP1_S;
    }
    return gain;
}

int32_t AUXADCGetAdjustmentOffset

(

uint32_t

refSource

)

Returns the offset value used when adjusting for ADC gain/offset.

The function returns the offset value to be used with AUXADCAdjustValueForGainAndOffset() or AUXADCUnadjustValueForGainAndOffset(). The offset value is found during chip manufacturing and is stored in the factory configuration, FCFG1.

Parameters

refSource

ADC reference source: AUXADC_REF_FIXED (nominally 4.3 V) AUXADC_REF_VDDS_REL (nominally VDDS)

Returns

The offset value to be used in adjustments

{
    int8_t offset;
    if ( refSource == AUXADC_REF_FIXED ) {
        // AUXADC_REF_FIXED ==> ABS_OFFSET
        offset = HWREG(FCFG1_BASE + FCFG1_O_SOC_ADC_OFFSET_INT) >> FCFG1_SOC_ADC_OFFSET_INT_SOC_ADC_ABS_OFFSET_TEMP1_S;
    } else {
        // AUXADC_REF_VDDS_REL ==> REL_OFFSET
        offset = HWREG(FCFG1_BASE + FCFG1_O_SOC_ADC_OFFSET_INT) >> FCFG1_SOC_ADC_OFFSET_INT_SOC_ADC_REL_OFFSET_TEMP1_S;
    }
    return offset;
}

static uint32_t AUXADCGetFifoStatus ( void  )

inlinestatic

Returns flags indicating the status of the ADC FIFO.

The flags indicate FIFO empty, full and almost full, and whether overflow/underflow has occurred.

Returns

A combination (bitwise OR) of the following flags:

• AUXADC_FIFO_EMPTY_M
• AUXADC_FIFO_ALMOST_FULL_M
• AUXADC_FIFO_FULL_M
• AUXADC_FIFO_UNDERFLOW_M
• AUXADC_FIFO_OVERFLOW_M

{
    return HWREG(AUX_ANAIF_BASE + AUX_ANAIF_O_ADCFIFOSTAT);
}

int32_t AUXADCMicrovoltsToValue	(	int32_t	fixedRefVoltage,
		int32_t	microvolts
	)

Converts a number of microvolts to corresponding "adjusted" ADC value.

This function can only be used when measuring with fixed ADC reference (AUXADC_REF_FIXED). The specified reference voltage accounts for whether the sampled ADC input is scaled down before conversion or not.

Parameters

fixedRefVoltage	Fixed reference voltage, in microvolts AUXADC_FIXED_REF_VOLTAGE_NORMAL when using scaled input (normal) AUXADC_FIXED_REF_VOLTAGE_UNSCALED when using unscaled input
microvolts	The number of microvolts

Returns

The corresponding expected ADC value (adjusted for ADC gain/offset)

{
    // Chop off 4 bits during calculations to avoid 32-bit overflow
    fixedRefVoltage >>= 4;
    microvolts >>= 4;
    return ((microvolts * 4095) + (fixedRefVoltage / 2)) / fixedRefVoltage;
}

uint32_t AUXADCPopFifo

(

void

)

Returns the first sample in the ADC FIFO, without waiting.

This function does not wait, and must only be called when there is at least one sample in the ADC FIFO. Otherwise the call will generate FIFO underflow (AUXADC_FIFO_UNDERFLOW_M).

Returns

The first (12-bit) sample from the ADC FIFO, or an undefined value if the FIFO is empty

                    {

    // Return the first sample from the FIFO. If the FIFO is empty, this
    // generates ADC FIFO underflow
    return HWREG(AUX_ANAIF_BASE + AUX_ANAIF_O_ADCFIFO);
}

uint32_t AUXADCReadFifo

(

void

)

Waits for and returns the first sample in the ADC FIFO.

This function waits until there is at least one sample in the ADC FIFO. It then pops and returns the first sample from the FIFO.

Note

This procedure will deadlock if called without setting up ADC trigger generation in advance. The trigger can either be manual or periodical (using a GPT).

Returns

The first (12-bit) sample from the ADC FIFO

                     {

    // Wait until there is at least one sample in the FIFO
    while (HWREG(AUX_ANAIF_BASE + AUX_ANAIF_O_ADCFIFOSTAT) & AUX_ANAIF_ADCFIFOSTAT_EMPTY_M);

    // Return the first sample from the FIFO
    return HWREG(AUX_ANAIF_BASE + AUX_ANAIF_O_ADCFIFO);
}

static void AUXADCSelectInput ( uint32_t  input )

inlinestatic

Selects internal or external input for the ADC.

Note that calling this function also selects the same input for AUX_COMPB.

Parameters

input

Internal/external input selection: ADC_COMPB_IN_DCOUPL ADC_COMPB_IN_VSS ADC_COMPB_IN_VDDS ADC_COMPB_IN_AUXIO7 ADC_COMPB_IN_AUXIO6 ADC_COMPB_IN_AUXIO5 ADC_COMPB_IN_AUXIO4 ADC_COMPB_IN_AUXIO3 ADC_COMPB_IN_AUXIO2 ADC_COMPB_IN_AUXIO1 ADC_COMPB_IN_AUXIO0

{
    HapiSelectADCCompBInput(input);
}

int32_t AUXADCUnadjustValueForGainAndOffset	(	int32_t	adcValue,
		int32_t	gain,
		int32_t	offset
	)

Performs the inverse of the ADC value gain and offset adjustment.

This function finds the expected measured ADC value, without gain and offset compensation, for a given "ideal" ADC value. The function can for example be used to find ADC value thresholds to be used in Sensor Controller task configurations.

Parameters

adcValue	12-bit ADC adjusted value
gain	Gain adjustment value provided by AUXADCGetAdjustmentGain()
offset	Offset adjustment value provided by AUXADCGetAdjustmentOffset()

Returns

12-bit ADC unadjusted value

{
    // Apply inverse gain and offset adjustment
    adcValue = (((adcValue * 32768) + (gain / 2)) / gain) - offset;

    // Saturate
    if (adcValue < 0) {
        return 0;
    } else if (adcValue > 4095) {
        return 4095;
    } else {
        return adcValue;
    }
}

int32_t AUXADCValueToMicrovolts	(	int32_t	fixedRefVoltage,
		int32_t	adcValue
	)

Converts an "adjusted" ADC value to microvolts.

This function can only be used when measuring with fixed ADC reference (AUXADC_REF_FIXED). The specified reference voltage accounts for whether the sampled ADC input is scaled down before conversion or not.

Parameters

fixedRefVoltage	Fixed reference voltage, in microvolts AUXADC_FIXED_REF_VOLTAGE_NORMAL when using scaled input (normal) AUXADC_FIXED_REF_VOLTAGE_UNSCALED when using unscaled input
adcValue	The ADC value

Returns

The corresponding number of microvolts

{
    // Chop off 4 bits during calculations to avoid 32-bit overflow
    fixedRefVoltage >>= 4;
    return (((adcValue * fixedRefVoltage) + 2047) / 4095) << 4;
}

Macro Definition Documentation

#define AUXADC_FIFO_ALMOST_FULL_M   (AUX_ANAIF_ADCFIFOSTAT_ALMOST_FULL_M)

#define AUXADC_FIFO_EMPTY_M   (AUX_ANAIF_ADCFIFOSTAT_EMPTY_M)

#define AUXADC_FIFO_FULL_M   (AUX_ANAIF_ADCFIFOSTAT_FULL_M)

#define AUXADC_FIFO_OVERFLOW_M   (AUX_ANAIF_ADCFIFOSTAT_OVERFLOW_M)

#define AUXADC_FIFO_UNDERFLOW_M   (AUX_ANAIF_ADCFIFOSTAT_UNDERFLOW_M)

#define AUXADC_FIXED_REF_VOLTAGE_NORMAL   4300000

#define AUXADC_FIXED_REF_VOLTAGE_UNSCALED   1478500

#define AUXADC_REF_FIXED   (0 << ADI_4_AUX_ADCREF0_SRC_S)

Referenced by AUXADCGetAdjustmentGain(), and AUXADCGetAdjustmentOffset().

#define AUXADC_REF_VDDS_REL   (1 << ADI_4_AUX_ADCREF0_SRC_S)

#define AUXADC_SAMPLE_TIME_10P6_US   5

#define AUXADC_SAMPLE_TIME_10P9_MS   15

#define AUXADC_SAMPLE_TIME_170_US   9

#define AUXADC_SAMPLE_TIME_1P37_MS   12

#define AUXADC_SAMPLE_TIME_21P3_US   6

Referenced by AUXADCEnableSyncNoBugWorkaround().

#define AUXADC_SAMPLE_TIME_2P73_MS   13

#define AUXADC_SAMPLE_TIME_2P7_US   3

#define AUXADC_SAMPLE_TIME_341_US   10

#define AUXADC_SAMPLE_TIME_42P6_US   7

#define AUXADC_SAMPLE_TIME_5P3_US   4

#define AUXADC_SAMPLE_TIME_5P46_MS   14

#define AUXADC_SAMPLE_TIME_682_US   11

#define AUXADC_SAMPLE_TIME_85P3_US   8

#define AUXADC_TRIGGER_GPT0A   (EVENT_AUXSEL0_EV_GPT0A)

#define AUXADC_TRIGGER_GPT0A_CMP   (EVENT_AUXSEL0_EV_GPT0A_CMP)

#define AUXADC_TRIGGER_GPT0B   (EVENT_AUXSEL0_EV_GPT0B)

#define AUXADC_TRIGGER_GPT0B_CMP   (EVENT_AUXSEL0_EV_GPT0B_CMP)

#define AUXADC_TRIGGER_GPT1A   (EVENT_AUXSEL0_EV_GPT1A)

#define AUXADC_TRIGGER_GPT1A_CMP   (EVENT_AUXSEL0_EV_GPT1A_CMP)

#define AUXADC_TRIGGER_GPT1B   (EVENT_AUXSEL0_EV_GPT1B)

#define AUXADC_TRIGGER_GPT1B_CMP   (EVENT_AUXSEL0_EV_GPT1B_CMP)

#define AUXADC_TRIGGER_GPT2A   (EVENT_AUXSEL0_EV_GPT2A)

#define AUXADC_TRIGGER_GPT2A_CMP   (EVENT_AUXSEL0_EV_GPT2A_CMP)

#define AUXADC_TRIGGER_GPT2B   (EVENT_AUXSEL0_EV_GPT2B)

#define AUXADC_TRIGGER_GPT2B_CMP   (EVENT_AUXSEL0_EV_GPT2B_CMP)

#define AUXADC_TRIGGER_GPT3A   (EVENT_AUXSEL0_EV_GPT3A)

#define AUXADC_TRIGGER_GPT3A_CMP   (EVENT_AUXSEL0_EV_GPT3A_CMP)

#define AUXADC_TRIGGER_GPT3B   (EVENT_AUXSEL0_EV_GPT3B)

#define AUXADC_TRIGGER_GPT3B_CMP   (EVENT_AUXSEL0_EV_GPT3B_CMP)

#define AUXADC_TRIGGER_MANUAL   (EVENT_AUXSEL0_EV_NONE)

Referenced by AUXADCEnableAsync(), and AUXADCEnableSyncNoBugWorkaround().