CC26xx Driver Library
setup.c File Reference
#include "../inc/hw_types.h"
#include "../inc/hw_memmap.h"
#include "../inc/hw_adi.h"
#include "../inc/hw_adi_2_refsys.h"
#include "../inc/hw_adi_3_refsys.h"
#include "../inc/hw_adi_4_aux.h"
#include "../inc/hw_aon_ioc.h"
#include "../inc/hw_aon_pmctl.h"
#include "../inc/hw_aon_rtc.h"
#include "../inc/hw_ddi_0_osc.h"
#include "../inc/hw_ddi.h"
#include "../inc/hw_ccfg.h"
#include "../inc/hw_fcfg1.h"
#include "../inc/hw_flash.h"
#include "../inc/hw_prcm.h"
#include "../inc/hw_vims.h"
#include "aux_sysif.h"
#include "chipinfo.h"
#include "setup.h"
#include "setup_rom.h"

Macros

#define ADI_4_AUX_O_LPMBIAS   0x0000000E
 
#define ADI_4_AUX_LPMBIAS_LPM_TRIM_IOUT_M   0x0000003F
 
#define ADI_4_AUX_LPMBIAS_LPM_TRIM_IOUT_S   0
 
#define ADI_4_AUX_COMP_LPM_BIAS_WIDTH_TRIM_M   0x00000038
 
#define ADI_4_AUX_COMP_LPM_BIAS_WIDTH_TRIM_S   3
 
#define CPU_DELAY_MICRO_SECONDS(x)   CPUdelay(((uint32_t)((( x ) * 48.0 ) / 5.0 )) - 1 )
 

Functions

static void TrimAfterColdReset (void)
 Trims to be applied when coming from PIN_RESET. More...
 
static void TrimAfterColdResetWakeupFromShutDown (uint32_t ui32Fcfg1Revision)
 Trims to be applied when coming from SHUTDOWN (also called when coming from PIN_RESET). More...
 
static void TrimAfterColdResetWakeupFromShutDownWakeupFromPowerDown (void)
 Trims to be applied when coming from POWER_DOWN (also called when coming from SHUTDOWN and PIN_RESET). More...
 
void SetupTrimDevice (void)
 Performs the necessary trim of the device which is not done in ROM boot code. More...
 

Macro Definition Documentation

#define ADI_4_AUX_COMP_LPM_BIAS_WIDTH_TRIM_M   0x00000038
#define ADI_4_AUX_COMP_LPM_BIAS_WIDTH_TRIM_S   3
#define ADI_4_AUX_LPMBIAS_LPM_TRIM_IOUT_M   0x0000003F
#define ADI_4_AUX_LPMBIAS_LPM_TRIM_IOUT_S   0
#define ADI_4_AUX_O_LPMBIAS   0x0000000E
#define CPU_DELAY_MICRO_SECONDS (   x)    CPUdelay(((uint32_t)((( x ) * 48.0 ) / 5.0 )) - 1 )

Function Documentation

static void TrimAfterColdReset ( void  )
static

Trims to be applied when coming from PIN_RESET.

Returns
None

Referenced by SetupTrimDevice().

342 {
343  // Currently no specific trim for Cold Reset
344 }
static void TrimAfterColdResetWakeupFromShutDown ( uint32_t  ui32Fcfg1Revision)
static

Trims to be applied when coming from SHUTDOWN (also called when coming from PIN_RESET).

Parameters
ui32Fcfg1Revision
Returns
None

Referenced by SetupTrimDevice().

243 {
244  uint32_t ccfg_ModeConfReg ;
245 
246  // Check in CCFG for alternative DCDC setting
247  if (( HWREG( CCFG_BASE + CCFG_O_SIZE_AND_DIS_FLAGS ) & CCFG_SIZE_AND_DIS_FLAGS_DIS_ALT_DCDC_SETTING ) == 0 ) {
248  // ADI_3_REFSYS:DCDCCTL5[3] (=DITHER_EN) = CCFG_MODE_CONF_1[19] (=ALT_DCDC_DITHER_EN)
249  // ADI_3_REFSYS:DCDCCTL5[2:0](=IPEAK ) = CCFG_MODE_CONF_1[18:16](=ALT_DCDC_IPEAK )
250  // Using a single 4-bit masked write since layout is equal for both source and destination
251  HWREGB( ADI3_BASE + ADI_O_MASK4B + ( ADI_3_REFSYS_O_DCDCCTL5 * 2 )) = ( 0xF0 |
252  ( HWREG( CCFG_BASE + CCFG_O_MODE_CONF_1 ) >> CCFG_MODE_CONF_1_ALT_DCDC_IPEAK_S ));
253 
254  }
255 
256  // TBD - Temporarily removed for CC13x2 / CC26x2
257 
258  // Force DCDC to use RCOSC before starting up XOSC.
259  // Clock loss detector does not use XOSC until SCLK_HF actually switches
260  // and thus DCDC is not protected from clock loss on XOSC in that time frame.
261  // The force must be released when the switch to XOSC has happened. This is done
262  // in OSCHfSourceSwitch().
263  HWREG(AUX_DDI0_OSC_BASE + DDI_O_MASK16B + (DDI_0_OSC_O_CTL0 << 1) + 4) = DDI_0_OSC_CTL0_CLK_DCDC_SRC_SEL_M | (DDI_0_OSC_CTL0_CLK_DCDC_SRC_SEL_M >> 16);
264  // Dummy read to ensure that the write has propagated
265  HWREGH(AUX_DDI0_OSC_BASE + DDI_0_OSC_O_CTL0);
266 
267  // read the MODE_CONF register in CCFG
268  ccfg_ModeConfReg = HWREG( CCFG_BASE + CCFG_O_MODE_CONF );
269 
270  // First part of trim done after cold reset and wakeup from shutdown:
271  // -Adjust the VDDR_TRIM_SLEEP value.
272  // -Configure DCDC.
273  SetupAfterColdResetWakeupFromShutDownCfg1( ccfg_ModeConfReg );
274 
275  // Addition to the CC1352 boost mode for HWREV >= 2.0
276  // The combination VDDR_EXT_LOAD=0 and VDDS_BOD_LEVEL=1 is defined to select boost mode
277  if ((( ccfg_ModeConfReg & CCFG_MODE_CONF_VDDR_EXT_LOAD ) == 0 ) &&
278  (( ccfg_ModeConfReg & CCFG_MODE_CONF_VDDS_BOD_LEVEL ) != 0 ) )
279  {
280  HWREGB( ADI3_BASE + ADI_3_REFSYS_O_DCDCCTL3 ) = ADI_3_REFSYS_DCDCCTL3_VDDR_BOOST_COMP_BOOST ;
281  }
282 
283  // Second part of trim done after cold reset and wakeup from shutdown:
284  // -Configure XOSC.
285 #if ( CCFG_BASE == CCFG_BASE_DEFAULT )
286  SetupAfterColdResetWakeupFromShutDownCfg2( ui32Fcfg1Revision, ccfg_ModeConfReg );
287 #else
288  NOROM_SetupAfterColdResetWakeupFromShutDownCfg2( ui32Fcfg1Revision, ccfg_ModeConfReg );
289 #endif
290 
291  {
292  uint32_t trimReg ;
293  uint32_t ui32TrimValue ;
294 
295  //--- Propagate the LPM_BIAS trim ---
296  trimReg = HWREG( FCFG1_BASE + FCFG1_O_DAC_BIAS_CNF );
297  ui32TrimValue = (( trimReg & FCFG1_DAC_BIAS_CNF_LPM_TRIM_IOUT_M ) >>
298  FCFG1_DAC_BIAS_CNF_LPM_TRIM_IOUT_S ) ;
299  HWREGB( AUX_ADI4_BASE + ADI_4_AUX_O_LPMBIAS ) = (( ui32TrimValue << ADI_4_AUX_LPMBIAS_LPM_TRIM_IOUT_S ) &
301  // Set LPM_BIAS_BACKUP_EN according to FCFG1 configuration
302  if ( trimReg & FCFG1_DAC_BIAS_CNF_LPM_BIAS_BACKUP_EN ) {
303  HWREGB( ADI3_BASE + ADI_O_SET + ADI_3_REFSYS_O_AUX_DEBUG ) = ADI_3_REFSYS_AUX_DEBUG_LPM_BIAS_BACKUP_EN;
304  } else {
305  HWREGB( ADI3_BASE + ADI_O_CLR + ADI_3_REFSYS_O_AUX_DEBUG ) = ADI_3_REFSYS_AUX_DEBUG_LPM_BIAS_BACKUP_EN;
306  }
307  // Set LPM_BIAS_WIDTH_TRIM according to FCFG1 configuration
308  {
309  uint32_t widthTrim = (( trimReg & FCFG1_DAC_BIAS_CNF_LPM_BIAS_WIDTH_TRIM_M ) >> FCFG1_DAC_BIAS_CNF_LPM_BIAS_WIDTH_TRIM_S );
310  HWREGH( AUX_ADI4_BASE + ADI_O_MASK8B + ( ADI_4_AUX_O_COMP * 2 )) = // Set LPM_BIAS_WIDTH_TRIM = 3
311  (( ADI_4_AUX_COMP_LPM_BIAS_WIDTH_TRIM_M << 8 ) | // Set mask (bits to be written) in [15:8]
312  ( widthTrim << ADI_4_AUX_COMP_LPM_BIAS_WIDTH_TRIM_S ) ); // Set value (in correct bit pos) in [7:0]
313  }
314  }
315 
316  // Third part of trim done after cold reset and wakeup from shutdown:
317  // -Configure HPOSC.
318  // -Setup the LF clock.
319 #if ( CCFG_BASE == CCFG_BASE_DEFAULT )
320  SetupAfterColdResetWakeupFromShutDownCfg3( ccfg_ModeConfReg );
321 #else
322  NOROM_SetupAfterColdResetWakeupFromShutDownCfg3( ccfg_ModeConfReg );
323 #endif
324 
325  // Set AUX into power down active mode
327 
328  // Disable EFUSE clock
329  HWREGBITW( FLASH_BASE + FLASH_O_CFG, FLASH_CFG_DIS_EFUSECLK_BITN ) = 1;
330 }
#define ADI_4_AUX_O_LPMBIAS
Definition: setup.c:47
void SetupAfterColdResetWakeupFromShutDownCfg3(uint32_t ccfg_ModeConfReg)
Third part of configuration required after cold reset and when waking up from shutdown.
Definition: setup_rom.c:324
#define ADI_4_AUX_COMP_LPM_BIAS_WIDTH_TRIM_S
Definition: setup.c:51
#define ADI_4_AUX_COMP_LPM_BIAS_WIDTH_TRIM_M
Definition: setup.c:50
#define AUX_SYSIF_OPMODE_TARGET_PDA
Definition: aux_sysif.h:99
void SetupAfterColdResetWakeupFromShutDownCfg1(uint32_t ccfg_ModeConfReg)
First part of configuration required after cold reset and when waking up from shutdown.
Definition: setup_rom.c:167
void AUXSYSIFOpModeChange(uint32_t targetOpMode)
Changes the AUX operational mode to the requested target mode.
Definition: aux_sysif.c:67
#define ADI_4_AUX_LPMBIAS_LPM_TRIM_IOUT_S
Definition: setup.c:49
void SetupAfterColdResetWakeupFromShutDownCfg2(uint32_t ui32Fcfg1Revision, uint32_t ccfg_ModeConfReg)
Second part of configuration required after cold reset and when waking up from shutdown.
Definition: setup_rom.c:222
#define ADI_4_AUX_LPMBIAS_LPM_TRIM_IOUT_M
Definition: setup.c:48

Here is the call graph for this function:

static void TrimAfterColdResetWakeupFromShutDownWakeupFromPowerDown ( void  )
static

Trims to be applied when coming from POWER_DOWN (also called when coming from SHUTDOWN and PIN_RESET).

Returns
None

Referenced by SetupTrimDevice().

227 {
228  // Currently no specific trim for Powerdown
229 }