CC26xx Driver Library
[i2s.h] Inter-IC Sound

Data Structures

struct  I2SControlTable
 A structure that defines an audio control table. Note: Memory for this structure must be initialized by user application. See detailed description! More...
 

Functions

void I2SEnable (uint32_t ui32Base)
 Enables the I2S module for operation. More...
 
static void I2SDisable (uint32_t ui32Base)
 Disables the I2S module for operation. More...
 
void I2SAudioFormatConfigure (uint32_t ui32Base, uint32_t ui32FmtCfg, uint32_t ui32BitClkDelay)
 Configures the I2S module. More...
 
void I2SChannelConfigure (uint32_t ui32Base, uint32_t ui32Chan0Cfg, uint32_t ui32Chan1Cfg)
 Setup the audio channel configuration. More...
 
static void I2SClockConfigure (uint32_t ui32Base, uint32_t ui32ClkConfig)
 Configure the I2S frame clock. More...
 
void I2SBufferConfig (uint32_t ui32Base, uint32_t ui32InBufBase, uint32_t ui32OutBufBase, uint16_t ui16DMABufSize, uint16_t ui16ChanBufSize)
 Set the input buffer pointers. More...
 
void I2SPointerUpdate (uint32_t ui32Base, bool bInput)
 Update the buffer pointers. More...
 
void I2SPointerSet (uint32_t ui32Base, bool bInput, void *pNextPointer)
 Set a buffer pointer (input or output) directly. More...
 
static void I2SIntRegister (uint32_t ui32Base, void(*pfnHandler)(void))
 Registers an interrupt handler for an I2S interrupt in the dynamic interrupt table. More...
 
static void I2SIntUnregister (uint32_t ui32Base)
 Unregisters an interrupt handler for a I2S interrupt in the dynamic interrupt table. More...
 
void I2SSampleStampConfigure (uint32_t ui32Base, bool bInput, bool bOutput)
 Configure the sample stamp generator. More...
 
static void I2SIntEnable (uint32_t ui32Base, uint32_t ui32IntFlags)
 Enables individual I2S interrupt sources. More...
 
static void I2SIntDisable (uint32_t ui32Base, uint32_t ui32IntFlags)
 Disables individual I2S interrupt sources. More...
 
static uint32_t I2SIntStatus (uint32_t ui32Base, bool bMasked)
 Gets the current interrupt status. More...
 
static void I2SIntClear (uint32_t ui32Base, uint32_t ui32IntFlags)
 Clears I2S interrupt sources. More...
 
static void I2SSampleStampEnable (uint32_t ui32Base)
 Enable the Sample Stamp generator. More...
 
static void I2SSampleStampDisable (uint32_t ui32Base)
 Disable the Sample Stamp generator. More...
 
uint32_t I2SSampleStampGet (uint32_t ui32Base, uint32_t ui32Channel)
 Get the current value of a sample stamp counter. More...
 
static void I2SStart (uint32_t ui32Base, uint8_t ui8FixDMALength)
 Starts the I2S. More...
 
static void I2SStop (uint32_t ui32Base)
 Stops the I2S module for operation. More...
 
static void I2SFormatConfigure (uint32_t ui32Base, uint8_t ui8iDataDelay, uint8_t ui8iMemory24Bits, uint8_t ui8iSamplingEdge, bool boolDualPhase, uint8_t ui8BitsPerSample, uint16_t ui16transmissionDelay)
 Configure the serial format of the I2S module. More...
 
static void I2SFrameConfigure (uint32_t ui32Base, uint8_t ui8StatusAD0, uint8_t ui8ChanAD0, uint8_t ui8StatusAD1, uint8_t ui8ChanAD1)
 Setup the two interfaces SD0 and SD1 (also called AD0 and AD1). More...
 
static void I2SWclkConfigure (uint32_t ui32Base, bool boolMaster, bool boolWCLKInvert)
 Configure the I2S frame clock (also called WCLK or WS). More...
 
static void I2SInPointerSet (uint32_t ui32Base, uint32_t ui32NextPointer)
 Set the input buffer pointer. More...
 
static void I2SOutPointerSet (uint32_t ui32Base, uint32_t ui32NextPointer)
 Set the output buffer pointer. More...
 
static uint32_t I2SInPointerNextGet (uint32_t ui32Base)
 Get value stored in PTR NEXT IN register. More...
 
static uint32_t I2SOutPointerNextGet (uint32_t ui32Base)
 Get value stored in PTR NEXT OUT register. More...
 
static uint32_t I2SInPointerGet (uint32_t ui32Base)
 Get value stored in PTR IN register. More...
 
static uint32_t I2SOutPointerGet (uint32_t ui32Base)
 Get value stored in PTR OUT register. More...
 
static void I2SSampleStampInConfigure (uint32_t ui32Base, uint16_t ui16TrigValue)
 Configure the IN sample stamp generator. More...
 
static void I2SSampleStampOutConfigure (uint32_t ui32Base, uint16_t ui16TrigValue)
 Configure the OUT sample stamp generator. More...
 
static void I2SWclkCounterConfigure (uint32_t ui32Base, int16_t i16Value)
 Add the specified value to the WCLK count. More...
 
static void I2SWclkCounterReset (uint32_t ui32Base)
 Reset the WCLK count. More...
 

Variables

I2SControlTableg_pControlTable
 

Detailed Description

Introduction

The I2S API provides a set of functions for using the I2S module. This module provides a standardized serial interface to transfer audio samples from and to external audio devices such as a codec, DAC, or ADC.

The I2S module has the following features:

The I2S module is configured through the functions I2SFormatConfigure(), I2SFrameConfigure() and I2SWclkConfigure(). Transfers are enabled using I2SStart(). Transfers are disabled using I2SStop(). Please note that a specific procedure exists in order to disable transfers without losing data (refer to I2SStop()).

Data are transmitted using the two double-buffered pointers. For each interface, two registers are set with the address of the data to transfer. These registers are named INPTR and INPTRNEXT for the input interface and OUTPTR and OUTPTRNEXT for the output. When PTR is consumed, the hardware copies the content of PTRNEXT into PTR and the next transfer begins. The address of the next value to write or to read in memory (i.e. to receive or to send out) is set using I2SInPointerSet() and I2SOutPointerSet(). The values contented by INPTRNEXT, OUTPTRNEXT, INPTR and OUTPTR can be read using I2SInPointerNextGet(), I2SOutPointerNextGet(), I2SInPointerGet() and I2SOutPointerGet() functions.

Interrupts can help the user to refresh pointers on time. Interrupts can also be used to detect I2S errors. I2SIntEnable() and I2SIntDisable() activate and deactivate interrupt(s). Interrupt status can be read through I2SIntStatus() and a pending interrupt can be acquitted by I2SIntClear() function.

The sample stamps generator can be configured to slightly delay the emission or the reception of the data (based on the number of WCLK cycles) using I2SSampleStampInConfigure(), I2SSampleStampOutConfigure(), I2SWclkCounterReset() and I2SWclkCounterConfigure(). The current sample stamp can be computed using I2SSampleStampGet(). To finish, the sample stamps generator can be enable and disable using the following functions: I2SSampleStampEnable() and I2SSampleStampDisable(). The sample stamps generator must be enabled prior to any transfer.

Note: Other functions contained in the PRCM API are required to handle I2S.

API

Two APIs are coexisting. It is recommended to only use the new API as the old one is deprecated and will be removed soon.

New API: Functions to perform I2S configuration:

Functions to perform transfers:

Functions to handle interruptions:

Functions to handle sample stamps

Old API: I2SEnable(), I2SDisable(), I2SAudioFormatConfigure(), I2SChannelConfigure(), I2SClockConfigure(), I2SBufferConfig(), I2SIntEnable(), I2SIntDisable(), I2SIntStatus(), I2SIntClear(), I2SSampleStampEnable(), I2SSampleStampDisable(), I2SSampleStampGet(), I2SPointerSet (), I2SPointerUpdate(), I2SSampleStampConfigure(), I2SIntRegister(), I2SIntUnregister()

Function Documentation

void I2SAudioFormatConfigure ( uint32_t  ui32Base,
uint32_t  ui32FmtCfg,
uint32_t  ui32BitClkDelay 
)

Configures the I2S module.

Deprecated:
This function will be removed in a future release.

The word length defines the size of the word transmitted on the data lines. For single phased formats I2S_WORD_LENGTH_x is the exact number of bits per word. In dual phased format this is the maximum number of bits per word. The size is set using I2S_WORD_LENGTH_8, I2S_WORD_LENGTH_16 or I2S_WORD_LENGTH_24.

Parameters
ui32Baseis the I2S module base address.
ui32FmtCfgis the bitwise OR of several options:
ui32BitClkDelaydefines the bit clock delay by setting the number of bit clock periods between the positive word clock edge and the MSB of the first word in a phase. The bit clock delay is determined by the ratio between the bit clock and the frame clock and the chosen audio format. The bit clock delay must be configured depending on the chosen audio format:
  • 0 : Left Justified Format (LJF).
  • 1 : I2S and DSP format.
  • 2-255 : Right Justified format (RJF).
Returns
None
See also
I2SChannelConfigure()
108 {
109  // Check the arguments.
110  ASSERT(I2SBaseValid(ui32Base));
111  ASSERT(ui32BitClkDelay <= 255);
112 
113  // Save the length of the audio words stored in memory.
114  g_pControlTable->ui16MemLen = (ui32FmtCfg & I2S_MEM_LENGTH_24) ? 24 : 16;
115 
116  // Write the configuration.
117  HWREG(I2S0_BASE + I2S_O_AIFFMTCFG) = ui32FmtCfg | (ui32BitClkDelay << I2S_AIFFMTCFG_DATA_DELAY_S);
118 }
#define I2S_MEM_LENGTH_24
Definition: i2s.h:217
uint16_t ui16MemLen
Length of the audio words stored in memory.
Definition: i2s.h:125
#define ASSERT(expr)
Definition: debug.h:73
I2SControlTable * g_pControlTable
Definition: i2s.c:71
void I2SBufferConfig ( uint32_t  ui32Base,
uint32_t  ui32InBufBase,
uint32_t  ui32OutBufBase,
uint16_t  ui16DMABufSize,
uint16_t  ui16ChanBufSize 
)

Set the input buffer pointers.

Deprecated:
This function will be removed in a future release.

The next pointer should always be written while the DMA is using the previous written pointer. If not written in time an I2S_INT_PTR_ERR will occur and all outputs will be disabled.

Note
At startup the next data pointer should be written just before and just after calling the I2SEnable().
Parameters
ui32Baseis the base address of the I2S module.
ui32InBufBaseis the address of the input buffer.
ui32OutBufBaseis the address of the output buffer.
ui16DMABufSizeis the size of the DMA buffers. Must be greater than 0!
ui16ChanBufSizeis the size of the channel buffers.
Returns
None
217 {
218  // Check the arguments.
219  ASSERT(I2SBaseValid(ui32Base));
220  ASSERT(ui16DMABufSize > 0);
221 
222  // Setup the input data pointer and buffer sizes.
223  g_pControlTable->ui16DMABufSize = ui16DMABufSize;
224  g_pControlTable->ui16ChBufSize = ui16ChanBufSize;
225  g_pControlTable->ui32InBase = ui32InBufBase;
226  g_pControlTable->ui32OutBase = ui32OutBufBase;
227 }
uint16_t ui16DMABufSize
Size of DMA buffer in number of samples.
Definition: i2s.h:121
uint32_t ui32OutBase
Base address of the output buffer.
Definition: i2s.h:128
#define ASSERT(expr)
Definition: debug.h:73
uint32_t ui32InBase
Base address of the input buffer.
Definition: i2s.h:126
I2SControlTable * g_pControlTable
Definition: i2s.c:71
uint16_t ui16ChBufSize
Size of Channel buffer.
Definition: i2s.h:122
void I2SChannelConfigure ( uint32_t  ui32Base,
uint32_t  ui32Chan0Cfg,
uint32_t  ui32Chan1Cfg 
)

Setup the audio channel configuration.

Deprecated:
This function will be removed in a future release.

The channel configuration is a bitwise OR of the input/output mode of each data line and the active audio channels within a specific audio frame.

Setting up the input/output mode use one of:

For dual phased audio (LJF,RJF,I2S) only mono and stereo modes are allowed. For single phased audio format (DSP) up to 8 active channels are allowed on a single data line. For setting up the active channels in a frame use:

Note
The audio format and the clock configuration should be set using I2SAudioFormatConfigure()
Parameters
ui32Baseis base address of the I2S module.
ui32Chan0Cfgdefines the channel configuration for data line 0.
ui32Chan1Cfgdefines the channel configuration for data line 1.
Returns
None
See also
I2SAudioFormatConfigure()
128 {
129  uint32_t ui32InChan;
130  uint32_t ui32OutChan;
131  uint32_t ui32ChanMask;
132 
133  // Check the arguments.
134  ASSERT(I2SBaseValid(ui32Base));
135  ASSERT(ui32Chan0Cfg & (I2S_CHAN_CFG_MASK | I2S_LINE_MASK))
136  ASSERT(ui32Chan1Cfg & (I2S_CHAN_CFG_MASK | I2S_LINE_MASK))
137 
138  ui32InChan = 0;
139  ui32OutChan = 0;
140 
141  // Configure input/output channels.
142  HWREG(I2S0_BASE + I2S_O_AIFDIRCFG) = (
143  (( ui32Chan0Cfg << I2S_AIFDIRCFG_AD0_S) & I2S_AIFDIRCFG_AD0_M ) |
144  (( ui32Chan1Cfg << I2S_AIFDIRCFG_AD1_S) & I2S_AIFDIRCFG_AD1_M ) );
145 
146  // Configure the valid channel mask.
147  HWREG(I2S0_BASE + I2S_O_AIFWMASK0) = (ui32Chan0Cfg >> 8) & I2S_AIFWMASK0_MASK_M;
148  HWREG(I2S0_BASE + I2S_O_AIFWMASK1) = (ui32Chan1Cfg >> 8) & I2S_AIFWMASK1_MASK_M;
149 
150  // Resolve and save the number of input and output channels.
151  ui32ChanMask = (ui32Chan0Cfg & I2S_CHAN_CFG_MASK) >> 8;
152  if(ui32Chan0Cfg & I2S_LINE_INPUT)
153  {
154  while(ui32ChanMask)
155  {
156  if(ui32ChanMask & 0x1)
157  {
158  ui32InChan++;
159  }
160  // Shift down channel mask
161  ui32ChanMask >>= 1;
162  }
163 
164  }
165  else if(ui32Chan0Cfg & I2S_LINE_OUTPUT)
166  {
167  while(ui32ChanMask)
168  {
169  if(ui32ChanMask & 0x1)
170  {
171  ui32OutChan++;
172  }
173  // Shift down channel mask
174  ui32ChanMask >>= 1;
175  }
176  }
177 
178  ui32ChanMask = (ui32Chan1Cfg & I2S_CHAN_CFG_MASK) >> 8;
179  if(ui32Chan1Cfg & I2S_LINE_INPUT)
180  {
181  while(ui32ChanMask)
182  {
183  if(ui32ChanMask & 0x1)
184  {
185  ui32InChan++;
186  }
187  // Shift down channel mask
188  ui32ChanMask >>= 1;
189  }
190  }
191  else if(ui32Chan1Cfg & I2S_LINE_OUTPUT)
192  {
193  while(ui32ChanMask)
194  {
195  if(ui32ChanMask & 0x1)
196  {
197  ui32OutChan++;
198  }
199  // Shift down channel mask
200  ui32ChanMask >>= 1;
201  }
202  }
203 
204  g_pControlTable->ui8InChan = (uint8_t)ui32InChan;
205  g_pControlTable->ui8OutChan = (uint8_t)ui32OutChan;
206 }
#define I2S_LINE_MASK
Definition: i2s.h:180
#define I2S_CHAN_CFG_MASK
Definition: i2s.h:199
#define I2S_LINE_INPUT
Definition: i2s.h:178
uint8_t ui8InChan
Input Channel.
Definition: i2s.h:123
#define ASSERT(expr)
Definition: debug.h:73
uint8_t ui8OutChan
Output Channel.
Definition: i2s.h:124
#define I2S_LINE_OUTPUT
Definition: i2s.h:179
I2SControlTable * g_pControlTable
Definition: i2s.c:71
static void I2SClockConfigure ( uint32_t  ui32Base,
uint32_t  ui32ClkConfig 
)
inlinestatic

Configure the I2S frame clock.

Deprecated:
This function will be removed in a future release.

Configure I2S clock to be either internal or external and either normal or inverted.

Note
The bit clock configuration is done externally, but the internal/ external setting must match what is chosen internally in the I2S module for the frame clock.
Parameters
ui32Baseis the base address of the I2S module.
ui32ClkConfigis the clock configuration parameter. Bitwise OR'ed combination of clock source and clock polarity:
Returns
None
456 {
457  // Check the arguments.
458  ASSERT(I2SBaseValid(ui32Base));
459 
460  // Setup register WCLK Source.
461  HWREG(I2S0_BASE + I2S_O_AIFWCLKSRC) = ui32ClkConfig &
464 }
#define ASSERT(expr)
Definition: debug.h:73
static void I2SDisable ( uint32_t  ui32Base)
inlinestatic

Disables the I2S module for operation.

Deprecated:
This function will be removed in a future release.

This function will immediately disable the I2S module. To ensure that all buffer operations are completed before shutting down, the correct procedure is:

  1. Do not update the data pointers using I2SPointerUpdate().
  2. Await next interrupt resulting in I2S_INT_PTR_ERR.
  3. Disable the I2S using I2SDisable() and clear the pointer error using I2SIntClear().
  4. Disable bit clock source (done externally).
Parameters
ui32Baseis the I2S module base address.
Returns
None
325 {
326  // Check the arguments.
327  ASSERT(I2SBaseValid(ui32Base));
328 
329  // Disable the I2S module.
330  HWREG(I2S0_BASE + I2S_O_AIFDMACFG) = 0x0;
331 }
#define ASSERT(expr)
Definition: debug.h:73
void I2SEnable ( uint32_t  ui32Base)

Enables the I2S module for operation.

Deprecated:
This function will be removed in a future release.
Note
The module should only be enabled after configuration. When the module is disabled, no data or clocks will be generated on the I2S signals.
Immediately after enabling the module the programmer should update the DMA data pointer registers using I2SPointerUpdate() to ensure a new pointer is written before the DMA transfer completes. Failure to update the pointer in time will result in an I2S_INT_PTR_ERR.
Parameters
ui32Baseis the I2S module base address.
Returns
None
80 {
81  // Check the arguments.
82  ASSERT(I2SBaseValid(ui32Base));
83 
84  // Make sure the control table pointer is setup to a memory location.
85  if(!(g_pControlTable))
86  {
87  return;
88  }
89 
90  // Write the address to the first input/output buffer.
95 
96  // Enable the I2S module.
97  HWREG(I2S0_BASE + I2S_O_AIFDMACFG) = (uint32_t)g_pControlTable->ui16DMABufSize - 1;
98 }
uint16_t ui16DMABufSize
Size of DMA buffer in number of samples.
Definition: i2s.h:121
uint32_t ui32InOffset
Value of the current input pointer offset.
Definition: i2s.h:127
uint32_t ui32OutOffset
Value of the current output pointer offset.
Definition: i2s.h:129
uint32_t ui32OutBase
Base address of the output buffer.
Definition: i2s.h:128
#define ASSERT(expr)
Definition: debug.h:73
uint32_t ui32InBase
Base address of the input buffer.
Definition: i2s.h:126
I2SControlTable * g_pControlTable
Definition: i2s.c:71
static void I2SFormatConfigure ( uint32_t  ui32Base,
uint8_t  ui8iDataDelay,
uint8_t  ui8iMemory24Bits,
uint8_t  ui8iSamplingEdge,
bool  boolDualPhase,
uint8_t  ui8BitsPerSample,
uint16_t  ui16transmissionDelay 
)
inlinestatic

Configure the serial format of the I2S module.

The word length defines the size of the word transmitted on the data lines. For single phased formats ui8BitsPerSample is the exact number of bits per word. In dual phased format this is the maximum number of bits per word.

Parameters
ui32Baseis the I2S module base address.
ui8iDataDelayis the number of BCLK periods between the first WCLK edge and the MSB of the first audio channel data transferred during the phase.
ui8iMemory24Bitsselects if the samples in memory are coded on 16 bits or 24 bits. Possible values are:
ui8iSamplingEdgeselects if sampling on falling or rising edges. Possible values are:
boolDualPhasemust be set to true for dual phase and to false for single phase and user-defined phase.
ui8BitsPerSampleis the number of bits transmitted for each sample. If this number does not match with the memory length selected (16 bits or24 bits), samples will be truncated or padded.
ui16transmissionDelayis the number of WCLK periods before the first transmission.
Returns
None
See also
I2SFrameConfigure()
964 {
965  // Check the arguments.
966  ASSERT(I2SBaseValid(ui32Base));
967  ASSERT(ui8BitsPerSample <= I2S_AIFFMTCFG_WORD_LEN_MAX);
968  ASSERT(ui8BitsPerSample >= I2S_AIFFMTCFG_WORD_LEN_MIN);
969 
970  // Setup register AIFFMTCFG Source.
971  HWREGH(I2S0_BASE + I2S_O_AIFFMTCFG) =
972  (ui8iDataDelay << I2S_AIFFMTCFG_DATA_DELAY_S) |
973  (ui8iMemory24Bits << I2S_AIFFMTCFG_MEM_LEN_24_S) |
974  (ui8iSamplingEdge << I2S_AIFFMTCFG_SMPL_EDGE_S ) |
975  (boolDualPhase << I2S_AIFFMTCFG_DUAL_PHASE_S) |
976  (ui8BitsPerSample << I2S_AIFFMTCFG_WORD_LEN_S );
977 
978  // Number of WCLK periods before the first read / write
979  HWREGH(I2S0_BASE + I2S_O_STMPWPER) = ui16transmissionDelay;
980 }
#define ASSERT(expr)
Definition: debug.h:73
static void I2SFrameConfigure ( uint32_t  ui32Base,
uint8_t  ui8StatusAD0,
uint8_t  ui8ChanAD0,
uint8_t  ui8StatusAD1,
uint8_t  ui8ChanAD1 
)
inlinestatic

Setup the two interfaces SD0 and SD1 (also called AD0 and AD1).

This function sets interface's direction and activated channels.

Parameters
ui32Baseis base address of the I2S module.
ui8StatusAD0defines the usage of AD0 0x00: AD0 is disabled 0x01, AD0 is an input 0x02, AD0 is an output
ui8ChanAD0defines the channel mask for AD0. Use a bitwise OR'ed combination of:
ui8StatusAD1defines the usage of AD1 0x00: AD1 is disabled 0x10, AD1 is an input 0x20, AD1 is an output
ui8ChanAD1defines the channel mask for AD1. Use a bitwise OR'ed combination of:
Returns
None
See also
I2SFormatConfigure()
1027 {
1028  // Check the arguments.
1029  ASSERT(I2SBaseValid(ui32Base));
1030 
1031  // Configure input/output channels.
1032  HWREGB(I2S0_BASE + I2S_O_AIFDIRCFG) = (ui8StatusAD0 | ui8StatusAD1);
1033 
1034  // Configure the valid channel mask.
1035  HWREGB(I2S0_BASE + I2S_O_AIFWMASK0) = ui8ChanAD0;
1036  HWREGB(I2S0_BASE + I2S_O_AIFWMASK1) = ui8ChanAD1;
1037 }
#define ASSERT(expr)
Definition: debug.h:73
static uint32_t I2SInPointerGet ( uint32_t  ui32Base)
inlinestatic

Get value stored in PTR IN register.

Parameters
ui32Baseis the base address of the I2S module.
Returns
the value of PTR IN.
1184 {
1185  // Check the arguments.
1186  ASSERT(I2SBaseValid(ui32Base));
1187 
1188  return (HWREG(I2S0_BASE + I2S_O_AIFINPTR));
1189 }
#define ASSERT(expr)
Definition: debug.h:73
static uint32_t I2SInPointerNextGet ( uint32_t  ui32Base)
inlinestatic

Get value stored in PTR NEXT IN register.

Parameters
ui32Baseis the base address of the I2S module.
Returns
the value of PTR NEXT IN.
1147 {
1148  // Check the arguments.
1149  ASSERT(I2SBaseValid(ui32Base));
1150 
1151  return (HWREG(I2S0_BASE + I2S_O_AIFINPTRNEXT));
1152 }
#define ASSERT(expr)
Definition: debug.h:73
static void I2SInPointerSet ( uint32_t  ui32Base,
uint32_t  ui32NextPointer 
)
inlinestatic

Set the input buffer pointer.

The next pointer should always be written while the DMA is using the previous written pointer. If not written in time an I2S_INT_PTR_ERR will occur and all inputs and outputs will be disabled. This function relies on pointer is pointing to a valid address.

Note
It is recommended that the pointer update is done in an interrupt context to ensure that the update is performed before the buffer is full.
Parameters
ui32Baseis the base address of the I2S module.
ui32NextPointeris the adress of the data
Returns
None
See also
I2SOutPointerSet()
1100 {
1101  // Check the arguments.
1102  ASSERT(I2SBaseValid(ui32Base));
1103 
1104  HWREG(I2S0_BASE + I2S_O_AIFINPTRNEXT) = ui32NextPointer;
1105 }
#define ASSERT(expr)
Definition: debug.h:73
static void I2SIntClear ( uint32_t  ui32Base,
uint32_t  ui32IntFlags 
)
inlinestatic

Clears I2S interrupt sources.

The specified I2S interrupt sources are cleared, so that they no longer assert. This function must be called in the interrupt handler to keep the interrupt from being recognized again immediately upon exit.

Note
Due to write buffers and synchronizers in the system it may take several clock cycles from a register write clearing an event in a module and until the event is actually cleared in the NVIC of the system CPU. It is recommended to clear the event source early in the interrupt service routine (ISR) to allow the event clear to propagate to the NVIC before returning from the ISR. At the same time, an early event clear allows new events of the same type to be pended instead of ignored if the event is cleared later in the ISR. It is the responsibility of the programmer to make sure that enough time has passed before returning from the ISR to avoid false re-triggering of the cleared event. A simple, although not necessarily optimal, way of clearing an event before returning from the ISR is:
  1. Write to clear event (interrupt source). (buffered write)
  2. Dummy read from the event source module. (making sure the write has propagated)
  3. Wait two system CPU clock cycles (user code or two NOPs). (allowing cleared event to propagate through any synchronizers)
Parameters
ui32Baseis the base address of the I2S port.
ui32IntFlagsis a bit mask of the interrupt sources to be cleared. The parameter is the bitwise OR of any of the following:
Returns
None
795 {
796  // Check the arguments.
797  ASSERT(I2SBaseValid(ui32Base));
798 
799  // Clear the requested interrupt sources.
800  HWREG(I2S0_BASE + I2S_O_IRQCLR) = ui32IntFlags;
801 }
#define ASSERT(expr)
Definition: debug.h:73
static void I2SIntDisable ( uint32_t  ui32Base,
uint32_t  ui32IntFlags 
)
inlinestatic

Disables individual I2S interrupt sources.

This function disables the indicated I2S interrupt sources. Only the sources that are enabled can be reflected to the processor interrupt; disabled sources have no effect on the processor.

Parameters
ui32Baseis the base address of the I2S port.
ui32IntFlagsis the bit mask of the interrupt sources to be disabled. The parameter is the bitwise OR of any of the following:
Returns
None.
705 {
706  // Check the arguments.
707  ASSERT(I2SBaseValid(ui32Base));
708 
709  // Disable the specified interrupts.
710  HWREG(I2S0_BASE + I2S_O_IRQMASK) &= ~ui32IntFlags;
711 }
#define ASSERT(expr)
Definition: debug.h:73
static void I2SIntEnable ( uint32_t  ui32Base,
uint32_t  ui32IntFlags 
)
inlinestatic

Enables individual I2S interrupt sources.

This function enables the indicated I2S interrupt sources. Only the sources that are enabled can be reflected to the processor interrupt; disabled sources have no effect on the processor.

Parameters
ui32Baseis the base address of the I2S port.
ui32IntFlagsis the bit mask of the interrupt sources to be enabled. The parameter is the bitwise OR of any of the following:
Returns
None.
673 {
674  // Check the arguments.
675  ASSERT(I2SBaseValid(ui32Base));
676 
677  // Enable the specified interrupts.
678  HWREG(I2S0_BASE + I2S_O_IRQMASK) |= ui32IntFlags;
679 }
#define ASSERT(expr)
Definition: debug.h:73
static void I2SIntRegister ( uint32_t  ui32Base,
void(*)(void)  pfnHandler 
)
inlinestatic

Registers an interrupt handler for an I2S interrupt in the dynamic interrupt table.

Deprecated:
This function will be removed in a future release.
Note
Only use this function if you want to use the dynamic vector table (in SRAM)!

This function registers a function as the interrupt handler for a specific interrupt and enables the corresponding interrupt in the interrupt controller.

Specific I2S interrupts must be enabled via I2SIntEnable(). It is the interrupt handler's responsibility to clear the interrupt source.

Parameters
ui32Baseis the base address of the I2S module.
pfnHandleris a pointer to the function to be called when the I2S interrupt occurs.
Returns
None
See also
IntRegister() for important information about registering interrupt handlers.
583 {
584  // Check the arguments.
585  ASSERT(I2SBaseValid(ui32Base));
586 
587  // Register the interrupt handler.
588  IntRegister(INT_I2S_IRQ, pfnHandler);
589 
590  // Enable the I2S interrupt.
591  IntEnable(INT_I2S_IRQ);
592 }
#define ASSERT(expr)
Definition: debug.h:73
void IntRegister(uint32_t ui32Interrupt, void(*pfnHandler)(void))
Registers a function as an interrupt handler in the dynamic vector table.
Definition: interrupt.c:153
void IntEnable(uint32_t ui32Interrupt)
Enables an interrupt or system exception.
Definition: interrupt.c:283

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static uint32_t I2SIntStatus ( uint32_t  ui32Base,
bool  bMasked 
)
inlinestatic

Gets the current interrupt status.

This function returns the interrupt status for the specified I2S. Either the raw interrupt status or the status of interrupts that are allowed to reflect to the processor can be returned.

Parameters
ui32Baseis the base address of the I2S port
bMaskedselects between raw and masked interrupt status:
  • false : Raw interrupt status is required.
  • true : Masked interrupt status is required.
Returns
Returns the current interrupt status as a vector of:
737 {
738  uint32_t ui32Mask;
739 
740  // Check the arguments.
741  ASSERT(I2SBaseValid(ui32Base));
742 
743  // Return either the interrupt status or the raw interrupt status as
744  // requested.
745  if(bMasked)
746  {
747  ui32Mask = HWREG(I2S0_BASE + I2S_O_IRQFLAGS);
748  return(ui32Mask & HWREG(I2S0_BASE + I2S_O_IRQMASK));
749  }
750  else
751  {
752  return(HWREG(I2S0_BASE + I2S_O_IRQFLAGS));
753  }
754 }
#define ASSERT(expr)
Definition: debug.h:73
static void I2SIntUnregister ( uint32_t  ui32Base)
inlinestatic

Unregisters an interrupt handler for a I2S interrupt in the dynamic interrupt table.

Deprecated:
This function will be removed in a future release.

This function does the actual unregistering of the interrupt handler. It clears the handler to be called when an I2S interrupt occurs. This function also masks off the interrupt in the interrupt controller so that the interrupt handler no longer is called.

Parameters
ui32Baseis the base address of the I2S port.
Returns
None
See also
IntRegister() for important information about registering interrupt handlers.
617 {
618  // Check the arguments.
619  ASSERT(I2SBaseValid(ui32Base));
620 
621  // Disable the interrupt.
622  IntDisable(INT_I2S_IRQ);
623 
624  // Unregister the interrupt handler.
625  IntUnregister(INT_I2S_IRQ);
626 }
#define ASSERT(expr)
Definition: debug.h:73
void IntUnregister(uint32_t ui32Interrupt)
Unregisters an interrupt handler in the dynamic vector table.
Definition: interrupt.c:189
void IntDisable(uint32_t ui32Interrupt)
Disables an interrupt or system exception.
Definition: interrupt.c:327

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static uint32_t I2SOutPointerGet ( uint32_t  ui32Base)
inlinestatic

Get value stored in PTR OUT register.

Parameters
ui32Baseis the base address of the I2S module.
Returns
the value of PTR OUT.
1202 {
1203  // Check the arguments.
1204  ASSERT(I2SBaseValid(ui32Base));
1205 
1206  return (HWREG(I2S0_BASE + I2S_O_AIFOUTPTR));
1207 }
#define ASSERT(expr)
Definition: debug.h:73
static uint32_t I2SOutPointerNextGet ( uint32_t  ui32Base)
inlinestatic

Get value stored in PTR NEXT OUT register.

Parameters
ui32Baseis the base address of the I2S module.
Returns
the value of PTR NEXT OUT.
1166 {
1167  // Check the arguments.
1168  ASSERT(I2SBaseValid(ui32Base));
1169 
1170  return (HWREG(I2S0_BASE + I2S_O_AIFOUTPTRNEXT));
1171 }
#define ASSERT(expr)
Definition: debug.h:73
static void I2SOutPointerSet ( uint32_t  ui32Base,
uint32_t  ui32NextPointer 
)
inlinestatic

Set the output buffer pointer.

The next pointer should always be written while the DMA is using the previous written pointer. If not written in time an I2S_INT_PTR_ERR will occur and all inputs and outputs will be disabled. This function relies on pointer is pointing to a valid address.

Note
It is recommended that the pointer update is done in an interrupt context to ensure that the update is performed before the buffer is full.
Parameters
ui32Baseis the base address of the I2S module.
ui32NextPointeris the adress of the data
Returns
None
See also
I2SInPointerSet()
1129 {
1130  // Check the arguments.
1131  ASSERT(I2SBaseValid(ui32Base));
1132 
1133  HWREG(I2S0_BASE + I2S_O_AIFOUTPTRNEXT) = ui32NextPointer;
1134 }
#define ASSERT(expr)
Definition: debug.h:73
void I2SPointerSet ( uint32_t  ui32Base,
bool  bInput,
void *  pNextPointer 
)

Set a buffer pointer (input or output) directly.

Deprecated:
This function will be removed in a future release.

This function allows bypassing of the pointers in the global control table.

The next pointer should always be written while the DMA is using the previous written pointer. If not written in time an I2S_INT_PTR_ERR will occur and all outputs will be disabled. Nothing is preventing the pointers from being identical, but this function relies on both pointers (input or output pointers) are pointing to a valid address.

Note
It is recommended that the pointer update is done in an interrupt context to ensure that the update is performed before the buffer is full.
Parameters
ui32Baseis the base address of the I2S module.
bInputdetermines whether to update input or output pointer.
  • true : Update input pointer.
  • false : Update output pointer
pNextPointeris a void pointer to user defined buffer.
Returns
None
See also
I2SPointerUpdate()
236 {
237  // Check the arguments.
238  ASSERT(I2SBaseValid(ui32Base));
239 
240  // Update the next input/output pointer with the correct address.
241  if(bInput == true)
242  {
243  HWREG(I2S0_BASE + I2S_O_AIFINPTRNEXT) = (uint32_t)pNextPointer;
244  }
245  else
246  {
247  HWREG(I2S0_BASE + I2S_O_AIFOUTPTRNEXT) = (uint32_t)pNextPointer;
248  }
249 }
#define ASSERT(expr)
Definition: debug.h:73
void I2SPointerUpdate ( uint32_t  ui32Base,
bool  bInput 
)

Update the buffer pointers.

Deprecated:
This function will be removed in a future release.

The next pointer should always be written while the DMA is using the previous written pointer. If not written in time an I2S_INT_PTR_ERR will occur and all outputs will be disabled. Nothing is preventing the pointers from being identical, but this function relies on both pointers (input or output pointers) are pointing to a valid address.

Note
It is recommended that the pointer update is done in an interrupt context to ensure that the update is performed before the buffer is full.
Parameters
ui32Baseis the base address of the I2S module.
bInputdetermines whether to update input or output pointer.
  • true : Update input pointer.
  • false : Update output pointer
Returns
None
See also
I2SPointerSet()
258 {
259  uint32_t ui32NextPtr;
260 
261  // Check the arguments.
262  ASSERT(I2SBaseValid(ui32Base));
263 
264  // Update the next input/output pointer with the correct address.
265  if(bInput == true)
266  {
267  ui32NextPtr = (g_pControlTable->ui8InChan *
268  (g_pControlTable->ui16MemLen >> 3)) *
271  ui32NextPtr) %
275  }
276  else
277  {
278  ui32NextPtr = (g_pControlTable->ui8OutChan *
279  (g_pControlTable->ui16MemLen >> 3)) *
282  ui32NextPtr) %
284  HWREG(I2S0_BASE + I2S_O_AIFOUTPTRNEXT) =
287  }
288 }
uint16_t ui16DMABufSize
Size of DMA buffer in number of samples.
Definition: i2s.h:121
uint32_t ui32InOffset
Value of the current input pointer offset.
Definition: i2s.h:127
uint32_t ui32OutOffset
Value of the current output pointer offset.
Definition: i2s.h:129
uint32_t ui32OutBase
Base address of the output buffer.
Definition: i2s.h:128
uint16_t ui16MemLen
Length of the audio words stored in memory.
Definition: i2s.h:125
uint8_t ui8InChan
Input Channel.
Definition: i2s.h:123
#define ASSERT(expr)
Definition: debug.h:73
uint32_t ui32InBase
Base address of the input buffer.
Definition: i2s.h:126
uint8_t ui8OutChan
Output Channel.
Definition: i2s.h:124
I2SControlTable * g_pControlTable
Definition: i2s.c:71
uint16_t ui16ChBufSize
Size of Channel buffer.
Definition: i2s.h:122
void I2SSampleStampConfigure ( uint32_t  ui32Base,
bool  bInput,
bool  bOutput 
)

Configure the sample stamp generator.

Deprecated:
This function will be removed in a future release.

Use this function to configure the sample stamp generator.

Parameters
ui32Baseis the base address of the I2S module.
bInputenables triggering of the sample stamp generator on input.
bOutputenables triggering of the sample stamp generator on output.
Returns
None
297 {
298  uint32_t ui32Trigger;
299 
300  // Check the arguments.
301  ASSERT(I2SBaseValid(ui32Base));
302 
303  ui32Trigger = HWREG(I2S0_BASE + I2S_O_STMPWCNT);
304  ui32Trigger = (ui32Trigger + 2) % g_pControlTable->ui16ChBufSize;
305 
306  // Setup the sample stamp trigger for input streams.
307  if(bInput)
308  {
309  HWREG(I2S0_BASE + I2S_O_STMPINTRIG) = ui32Trigger;
310  }
311 
312  // Setup the sample stamp trigger for output streams.
313  if(bOutput)
314  {
315  HWREG(I2S0_BASE + I2S_O_STMPOUTTRIG) = ui32Trigger;
316  }
317 
318 }
#define ASSERT(expr)
Definition: debug.h:73
I2SControlTable * g_pControlTable
Definition: i2s.c:71
uint16_t ui16ChBufSize
Size of Channel buffer.
Definition: i2s.h:122
static void I2SSampleStampDisable ( uint32_t  ui32Base)
inlinestatic

Disable the Sample Stamp generator.

Use this function to disable the sample stamp generators. When the sample stamp generator is disabled, the clock counters are automatically cleared.

Returns
None
839 {
840  // Check the arguments.
841  ASSERT(I2SBaseValid(ui32Base));
842 
843  // Clear the enable bit.
844  HWREG(I2S0_BASE + I2S_O_STMPCTL) = 0;
845 
846 }
#define ASSERT(expr)
Definition: debug.h:73
static void I2SSampleStampEnable ( uint32_t  ui32Base)
inlinestatic

Enable the Sample Stamp generator.

Use this function to enable the sample stamp generators.

Note
It is the user's responsibility to ensure that the sample stamp generator is properly configured before it is enabled. It is the setting of the Input and Output triggers configured using I2SSampleStampConfigure() that triggers the start point of the audio streams.
Returns
None
819 {
820  // Check the arguments.
821  ASSERT(I2SBaseValid(ui32Base));
822 
823  // Set the enable bit.
825 }
#define ASSERT(expr)
Definition: debug.h:73
uint32_t I2SSampleStampGet ( uint32_t  ui32Base,
uint32_t  ui32Channel 
)

Get the current value of a sample stamp counter.

Parameters
ui32Baseis the base address of the I2S module.
ui32Channelis the sample stamp counter to sample
Returns
Returns the current value of the selected sample stamp channel.
327 {
328  uint32_t ui32FrameClkCnt;
329  uint32_t ui32SysClkCnt;
330  uint32_t ui32PeriodSysClkCnt;
331  uint32_t ui32SampleStamp;
332 
333  // Get the number of Frame clock counts since last stamp.
334  ui32FrameClkCnt = HWREG(I2S0_BASE + I2S_O_STMPWCNTCAPT0);
335 
336  // Get the number of system clock ticks since last frame clock edge.
337  ui32SysClkCnt = HWREG(I2S0_BASE + I2S_O_STMPXCNTCAPT0);
338 
339  // Get the number system clock ticks in the last frame clock period.
340  ui32PeriodSysClkCnt = HWREG(I2S0_BASE + I2S_O_STMPXPER);
341 
342  // Calculate the sample stamp.
343  ui32SampleStamp = (ui32SysClkCnt << 16) / ui32PeriodSysClkCnt;
344  ui32SampleStamp = (ui32SampleStamp > I2S_STMP_SATURATION) ?
345  I2S_STMP_SATURATION : ui32SampleStamp;
346  ui32SampleStamp |= (ui32FrameClkCnt << 16);
347 
348  return (ui32SampleStamp);
349 }
#define I2S_STMP_SATURATION
Definition: i2s.h:235
static void I2SSampleStampInConfigure ( uint32_t  ui32Base,
uint16_t  ui16TrigValue 
)
inlinestatic

Configure the IN sample stamp generator.

Use this function to configure the sample stamp generator.

Parameters
ui32Baseis the base address of the I2S module.
ui16TrigValuevalue used to set the trigger.
Returns
None
1223 {
1224  // Check the arguments.
1225  ASSERT(I2SBaseValid(ui32Base));
1226 
1227  // Setup the sample stamp trigger for input streams.
1228  HWREGH(I2S0_BASE + I2S_O_STMPINTRIG) = ui16TrigValue;
1229 }
#define ASSERT(expr)
Definition: debug.h:73
static void I2SSampleStampOutConfigure ( uint32_t  ui32Base,
uint16_t  ui16TrigValue 
)
inlinestatic

Configure the OUT sample stamp generator.

Use this function to configure the sample stamp generator.

Parameters
ui32Baseis the base address of the I2S module.
ui16TrigValuevalue used to set the trigger.
Returns
None
1245 {
1246  // Check the arguments.
1247  ASSERT(I2SBaseValid(ui32Base));
1248 
1249  // Setup the sample stamp trigger for output streams.
1250  HWREGH(I2S0_BASE + I2S_O_STMPOUTTRIG) = ui16TrigValue;
1251 }
#define ASSERT(expr)
Definition: debug.h:73
static void I2SStart ( uint32_t  ui32Base,
uint8_t  ui8FixDMALength 
)
inlinestatic

Starts the I2S.

I2S must be configured before it is started.

Note
Immediately after enabling the module the programmer must update the DMA data pointer registers using I2SInPointerSet() and I2SOutPointerSet() to ensure a new pointer is written before the DMA transfer completes. Failure to update the pointer in time will result in an I2S_INT_PTR_ERR.
Parameters
ui32Baseis the I2S module base address.
ui8FixDMALengthis the length of the DMA buffer: this will allow the DMA to read ui8FixDMALength between to pointer refreshes.
Returns
None
See also
I2SStop()
882 {
883  // Check the arguments.
884  ASSERT(I2SBaseValid(ui32Base));
885 
886  // Enable the I2S module.
887  HWREG(I2S0_BASE + I2S_O_AIFDMACFG) = ui8FixDMALength;
888 }
#define ASSERT(expr)
Definition: debug.h:73
static void I2SStop ( uint32_t  ui32Base)
inlinestatic

Stops the I2S module for operation.

This function will immediately disable the I2S module. To ensure that all buffer operations are completed before shutting down, the correct procedure is:

  1. Do not update the data pointers using I2SInPointerSet() and I2SOutPointerSet().
  2. Await that values returned by I2SInPointerNextGet(), I2SOutPointerNextGet(), I2SInPointerGet() and I2SOutPointerGet() are zero.
  3. Disable the I2S using I2SStop() and clear the pointer error using I2SIntClear().
  4. Disable bit clock source (done externally).
Parameters
ui32Baseis the I2S module base address.
Returns
None
See also
I2SStart()
914 {
915  // Check the arguments.
916  ASSERT(I2SBaseValid(ui32Base));
917 
918  // Disable the I2S module.
919  HWREG(I2S0_BASE + I2S_O_AIFDMACFG) = 0x00;
920 }
#define ASSERT(expr)
Definition: debug.h:73
static void I2SWclkConfigure ( uint32_t  ui32Base,
bool  boolMaster,
bool  boolWCLKInvert 
)
inlinestatic

Configure the I2S frame clock (also called WCLK or WS).

Configure WCLK clock to be either internal (master) or external (slave). Configure WCLK clock either normal or inverted.

Note
The bit clock configuration is done externally, but the internal/ external setting must match what is chosen internally in the I2S module for the frame clock.
Parameters
ui32Baseis the base address of the I2S module.
boolMasterfalse: the device is a slave (external clock) true: the device is a master (internal clock)
boolWCLKInvertfalse: WCLK is not inverted true: WCLK is internally inverted
Returns
None
1063 {
1064  // Check the arguments.
1065  ASSERT(I2SBaseValid(ui32Base));
1066  ASSERT(ui8ClkSource < I2S_AIFWCLKSRC_WCLK_SRC_RESERVED);
1067 
1068  // if(boolMaster == 0) then ui8ClkSource = 1
1069  // if(boolMaster == 1) then ui8ClkSource = 2
1070  uint8_t ui8ClkSource = (uint8_t)boolMaster + 0x01;
1071 
1072  // Setup register WCLK Source.
1073  HWREGB(I2S0_BASE + I2S_O_AIFWCLKSRC) =
1074  ((ui8ClkSource << I2S_AIFWCLKSRC_WCLK_SRC_S) |
1075  (boolWCLKInvert << I2S_AIFWCLKSRC_WCLK_INV_S ));
1076 }
#define ASSERT(expr)
Definition: debug.h:73
static void I2SWclkCounterConfigure ( uint32_t  ui32Base,
int16_t  i16Value 
)
inlinestatic

Add the specified value to the WCLK count.

Parameters
ui32Baseis the base address of the I2S module.
i16Valueis the offset to add to the counter (this value can be negative)
Returns
None
1265 {
1266  uint16_t ui16MinusValue;
1267 
1268  // Check the arguments.
1269  ASSERT(I2SBaseValid(ui32Base));
1270 
1271  if (i16Value >= 0)
1272  {
1273  HWREGH(I2S0_BASE + I2S_O_STMPWADD) = i16Value;
1274  }
1275  else
1276  {
1277  ui16MinusValue = (uint16_t)(-i16Value);
1278  HWREGH(I2S0_BASE + I2S_O_STMPWADD) = HWREGH(I2S0_BASE + I2S_O_STMPWPER) - ui16MinusValue;
1279  }
1280 }
#define ASSERT(expr)
Definition: debug.h:73
static void I2SWclkCounterReset ( uint32_t  ui32Base)
inlinestatic

Reset the WCLK count.

Parameters
ui32Baseis the base address of the I2S module.
Returns
None
1293 {
1294  // Check the arguments.
1295  ASSERT(I2SBaseValid(ui32Base));
1296 
1297  HWREGH(I2S0_BASE + I2S_O_STMPWSET) = 0;
1298 }
#define ASSERT(expr)
Definition: debug.h:73

Macro Definition Documentation

#define I2S_CHAN0_ACT   0x00000100
#define I2S_CHAN0_MASK   0x00000001
#define I2S_CHAN1_ACT   0x00000200
#define I2S_CHAN1_MASK   0x00000002
#define I2S_CHAN2_ACT   0x00000400
#define I2S_CHAN2_MASK   0x00000004
#define I2S_CHAN3_ACT   0x00000800
#define I2S_CHAN3_MASK   0x00000008
#define I2S_CHAN4_ACT   0x00001000
#define I2S_CHAN4_MASK   0x00000010
#define I2S_CHAN5_ACT   0x00002000
#define I2S_CHAN5_MASK   0x00000020
#define I2S_CHAN6_ACT   0x00004000
#define I2S_CHAN6_MASK   0x00000040
#define I2S_CHAN7_ACT   0x00008000
#define I2S_CHAN7_MASK   0x00000080
#define I2S_CHAN_CFG_MASK   0x0000FF00

Referenced by I2SChannelConfigure().

#define I2S_DMA_BUF_SIZE_128   0x00000080
#define I2S_DMA_BUF_SIZE_256   0x00000100
#define I2S_DMA_BUF_SIZE_64   0x00000040
#define I2S_DUAL_PHASE_FMT   0x00000020
#define I2S_EXT_WCLK   0x00000001
#define I2S_INT_ALL   0x0000003F
#define I2S_INT_BUS_ERR   0x00000004
#define I2S_INT_DMA_IN   0x00000020
#define I2S_INT_DMA_OUT   0x00000010
#define I2S_INT_PTR_ERR   0x00000001
#define I2S_INT_TIMEOUT   0x00000008
#define I2S_INT_WCLK   0x00000002
#define I2S_INT_WCLK_ERR   0x00000002
#define I2S_INVERT_WCLK   0x00000004
#define I2S_LINE_INPUT   0x00000001

Referenced by I2SChannelConfigure().

#define I2S_LINE_MASK   0x00000003

Referenced by I2SChannelConfigure().

#define I2S_LINE_OUTPUT   0x00000002

Referenced by I2SChannelConfigure().

#define I2S_LINE_UNUSED   0x00000000
#define I2S_MEM_LENGTH_16   0x00000000
#define I2S_MEM_LENGTH_24   0x00000080

Referenced by I2SAudioFormatConfigure().

#define I2S_MONO_MODE   0x00000100
#define I2S_NEG_EDGE   0x00000000
#define I2S_NORMAL_WCLK   0x00000000
#define I2S_POS_EDGE   0x00000040
#define I2S_SINGLE_PHASE_FMT   0x00000000
#define I2S_STEREO_MODE   0x00000300
#define I2S_STMP0   0x00000001
#define I2S_STMP1   0x00000002
#define I2S_STMP_SATURATION   0x0000FFFF

Referenced by I2SSampleStampGet().

#define I2S_WORD_LENGTH_16   0x00000010
#define I2S_WORD_LENGTH_24   0x00000018
#define I2S_WORD_LENGTH_8   0x00000008

Variable Documentation

I2SControlTable* g_pControlTable